Index: llvm/lib/Analysis/DependenceAnalysis.cpp =================================================================== --- llvm/lib/Analysis/DependenceAnalysis.cpp +++ llvm/lib/Analysis/DependenceAnalysis.cpp @@ -782,7 +782,7 @@ void DependenceAnalysis::unifySubscriptType(ArrayRef Pairs) { unsigned widestWidthSeen = 0; - Type *widestType; + Type *widestType = nullptr; // Go through each pair and find the widest bit to which we need // to extend all of them. Index: llvm/lib/Analysis/InstructionSimplify.cpp =================================================================== --- llvm/lib/Analysis/InstructionSimplify.cpp +++ llvm/lib/Analysis/InstructionSimplify.cpp @@ -1774,7 +1774,7 @@ // If we have: ((V + N) & C1) | (V & C2) // .. and C2 = ~C1 and C2 is 0+1+ and (N & C2) == 0 // replace with V+N. - Value *V1, *V2; + Value *V1 = nullptr, *V2 = nullptr; if ((C2->getValue() & (C2->getValue() + 1)) == 0 && // C2 == 0+1+ match(A, m_Add(m_Value(V1), m_Value(V2)))) { // Add commutes, try both ways. @@ -2809,8 +2809,13 @@ // Simplify comparisons involving max/min. Value *A, *B; CmpInst::Predicate P = CmpInst::BAD_ICMP_PREDICATE; - CmpInst::Predicate EqP; // Chosen so that "A == max/min(A,B)" iff "A EqP B". + // Initialized to BAD_ICMP_PREDICATE so we don't use garbage in the + // next switch statement. + // Chosen so that "A == max/min(A,B)" iff "A EqP B". + CmpInst::Predicate EqP = CmpInst::BAD_ICMP_PREDICATE; + + // Signed variants on "max(a,b)>=a -> true". if (match(LHS, m_SMax(m_Value(A), m_Value(B))) && (A == RHS || B == RHS)) { if (A != RHS) std::swap(A, B); // smax(A, B) pred A. @@ -3305,9 +3310,9 @@ Value *CmpLHS = ICI->getOperand(0); Value *CmpRHS = ICI->getOperand(1); APInt MinSignedValue = APInt::getSignBit(BitWidth); - Value *X; - const APInt *Y; - bool TrueWhenUnset; + Value *X = nullptr; + const APInt *Y = nullptr; + bool TrueWhenUnset = false; bool IsBitTest = false; if (ICmpInst::isEquality(Pred) && match(CmpLHS, m_And(m_Value(X), m_APInt(Y))) && Index: llvm/lib/AsmParser/LLParser.cpp =================================================================== --- llvm/lib/AsmParser/LLParser.cpp +++ llvm/lib/AsmParser/LLParser.cpp @@ -2982,7 +2982,7 @@ unsigned Opc = Lex.getUIntVal(); SmallVector Elts; bool InBounds = false; - Type *Ty; + Type *Ty = nullptr; Lex.Lex(); if (Opc == Instruction::GetElementPtr) Index: llvm/lib/Bitcode/Reader/BitcodeReader.cpp =================================================================== --- llvm/lib/Bitcode/Reader/BitcodeReader.cpp +++ llvm/lib/Bitcode/Reader/BitcodeReader.cpp @@ -1730,7 +1730,7 @@ /// Parse the value symbol table at either the current parsing location or /// at the given bit offset if provided. std::error_code BitcodeReader::parseValueSymbolTable(uint64_t Offset) { - uint64_t CurrentBit; + uint64_t CurrentBit = 0; // Pass in the Offset to distinguish between calling for the module-level // VST (where we want to jump to the VST offset) and the function-level // VST (where we don't). Index: llvm/lib/CodeGen/AtomicExpandPass.cpp =================================================================== --- llvm/lib/CodeGen/AtomicExpandPass.cpp +++ llvm/lib/CodeGen/AtomicExpandPass.cpp @@ -102,7 +102,7 @@ if (TLI->getInsertFencesForAtomic()) { auto FenceOrdering = Monotonic; - bool IsStore, IsLoad; + bool IsStore = false, IsLoad = false; if (LI && isAtLeastAcquire(LI->getOrdering())) { FenceOrdering = LI->getOrdering(); LI->setOrdering(Monotonic); @@ -632,7 +632,7 @@ CI->isWeak() ? FailureBB : RetryBB); Builder.SetInsertPoint(ReleasedLoadBB); - Value *SecondLoad; + Value *SecondLoad = false; if (HasReleasedLoadBB) { SecondLoad = TLI->emitLoadLinked(Builder, Addr, MemOpOrder); ShouldStore = Builder.CreateICmpEQ(SecondLoad, CI->getCompareOperand(), Index: llvm/lib/CodeGen/LiveInterval.cpp =================================================================== --- llvm/lib/CodeGen/LiveInterval.cpp +++ llvm/lib/CodeGen/LiveInterval.cpp @@ -990,7 +990,7 @@ // Start a new segment if necessary. if (!ConstructingSegment) { // Determine value number for the segment. - VNInfo *VNI; + VNInfo *VNI = nullptr; if (IsDef) { VNI = getNextValue(Pos, VNIAllocator); } else { Index: llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp =================================================================== --- llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp +++ llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp @@ -569,8 +569,8 @@ Optional Personality; Optional AugmentationLength; - uint32_t StartAugmentationOffset; - uint32_t EndAugmentationOffset; + uint32_t StartAugmentationOffset = 0; + uint32_t EndAugmentationOffset = 0; // Walk the augmentation string to get all the augmentation data. for (unsigned i = 0, e = AugmentationString.size(); i != e; ++i) { Index: llvm/lib/IR/Core.cpp =================================================================== --- llvm/lib/IR/Core.cpp +++ llvm/lib/IR/Core.cpp @@ -2891,7 +2891,7 @@ LLVMValueRef PTR, LLVMValueRef Val, LLVMAtomicOrdering ordering, LLVMBool singleThread) { - AtomicRMWInst::BinOp intop; + AtomicRMWInst::BinOp intop = AtomicRMWInst::BAD_BINOP; switch (op) { case LLVMAtomicRMWBinOpXchg: intop = AtomicRMWInst::Xchg; break; case LLVMAtomicRMWBinOpAdd: intop = AtomicRMWInst::Add; break; Index: llvm/lib/MC/MCAsmStreamer.cpp =================================================================== --- llvm/lib/MC/MCAsmStreamer.cpp +++ llvm/lib/MC/MCAsmStreamer.cpp @@ -990,7 +990,7 @@ if (PrologueEnd) OS << " prologue_end"; - unsigned OldIsStmt = getContext().getCurrentCVLoc().isStmt(); + bool OldIsStmt = getContext().getCurrentCVLoc().isStmt(); if (IsStmt != OldIsStmt) { OS << " is_stmt "; Index: llvm/lib/MC/MachObjectWriter.cpp =================================================================== --- llvm/lib/MC/MachObjectWriter.cpp +++ llvm/lib/MC/MachObjectWriter.cpp @@ -328,7 +328,7 @@ bool IsAlias = Symbol != AliasedSymbol; const MCSymbol &OrigSymbol = *Symbol; - MachSymbolData *AliaseeInfo; + MachSymbolData *AliaseeInfo = nullptr; if (IsAlias) { AliaseeInfo = findSymbolData(*AliasedSymbol); if (AliaseeInfo) Index: llvm/lib/Support/Windows/Path.inc =================================================================== --- llvm/lib/Support/Windows/Path.inc +++ llvm/lib/Support/Windows/Path.inc @@ -491,7 +491,7 @@ if (FileHandle == INVALID_HANDLE_VALUE) return make_error_code(errc::bad_file_descriptor); - DWORD flprotect; + DWORD flprotect = 0; switch (Mode) { case readonly: flprotect = PAGE_READONLY; break; case readwrite: flprotect = PAGE_READWRITE; break; @@ -508,7 +508,7 @@ return ec; } - DWORD dwDesiredAccess; + DWORD dwDesiredAccess = 0; switch (Mode) { case readonly: dwDesiredAccess = FILE_MAP_READ; break; case readwrite: dwDesiredAccess = FILE_MAP_WRITE; break; Index: llvm/lib/Support/YAMLParser.cpp =================================================================== --- llvm/lib/Support/YAMLParser.cpp +++ llvm/lib/Support/YAMLParser.cpp @@ -1508,7 +1508,7 @@ unsigned BlockExitIndent, unsigned &LineBreaks, bool &IsDone) { unsigned MaxAllSpaceLineCharacters = 0; - StringRef::iterator LongestAllSpaceLine; + StringRef::iterator LongestAllSpaceLine = nullptr; while (true) { advanceWhile(&Scanner::skip_s_space); Index: llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp =================================================================== --- llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp +++ llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp @@ -304,8 +304,8 @@ // Check if we need a copy for the source registers. unsigned OrigSrc0 = MI->getOperand(1).getReg(); unsigned OrigSrc1 = MI->getOperand(2).getReg(); - unsigned Src0 = 0, SubReg0; - unsigned Src1 = 0, SubReg1; + unsigned Src0 = 0, SubReg0 = 0; + unsigned Src1 = 0, SubReg1 = 0; if (!MRI->def_empty(OrigSrc0)) { MachineRegisterInfo::def_instr_iterator Def = MRI->def_instr_begin(OrigSrc0); Index: llvm/lib/Target/AArch64/AArch64FastISel.cpp =================================================================== --- llvm/lib/Target/AArch64/AArch64FastISel.cpp +++ llvm/lib/Target/AArch64/AArch64FastISel.cpp @@ -2498,7 +2498,7 @@ if (!SI->getType()->isIntegerTy(1)) return false; - const Value *Src1Val, *Src2Val; + const Value *Src1Val = nullptr, *Src2Val = nullptr; unsigned Opc = 0; bool NeedExtraOp = false; if (auto *CI = dyn_cast(SI->getTrueValue())) { Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp =================================================================== --- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -1555,7 +1555,7 @@ } } SDValue Cmp; - AArch64CC::CondCode AArch64CC; + AArch64CC::CondCode AArch64CC = AArch64CC::Invalid; if ((CC == ISD::SETEQ || CC == ISD::SETNE) && isa(RHS)) { const ConstantSDNode *RHSC = cast(RHS); Index: llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp =================================================================== --- llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -2929,7 +2929,7 @@ bool AArch64AsmParser::parseSymbolicImmVal(const MCExpr *&ImmVal) { MCAsmParser &Parser = getParser(); bool HasELFModifier = false; - AArch64MCExpr::VariantKind RefKind; + AArch64MCExpr::VariantKind RefKind = AArch64MCExpr::VK_INVALID; if (Parser.getTok().is(AsmToken::Colon)) { Parser.Lex(); // Eat ':" Index: llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp =================================================================== --- llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp +++ llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp @@ -825,7 +825,7 @@ MachineBasicBlock *SccBeginMBB = nullptr; int SccNumBlk = 0; // The number of active blocks, init to a // maximum possible number. - int SccNumIter; // Number of iteration in this SCC. + int SccNumIter = 0; // Number of iteration in this SCC. while (It != E) { MBB = *It; Index: llvm/lib/Target/AMDGPU/R600InstrInfo.cpp =================================================================== --- llvm/lib/Target/AMDGPU/R600InstrInfo.cpp +++ llvm/lib/Target/AMDGPU/R600InstrInfo.cpp @@ -554,7 +554,7 @@ std::vector > > IGSrcs; ValidSwizzle.clear(); - unsigned ConstCount; + unsigned ConstCount = 0; BankSwizzle TransBS = ALU_VEC_012_SCL_210; for (unsigned i = 0, e = IG.size(); i < e; ++i) { IGSrcs.push_back(ExtractSrcs(IG[i], PV, ConstCount)); Index: llvm/lib/Target/ARM/ARMFastISel.cpp =================================================================== --- llvm/lib/Target/ARM/ARMFastISel.cpp +++ llvm/lib/Target/ARM/ARMFastISel.cpp @@ -2689,7 +2689,13 @@ // 16-bit Thumb instructions always set CPSR (unless they're in an IT block). bool setsCPSR = &ARM::tGPRRegClass == RC; unsigned LSLOpc = isThumb2 ? ARM::tLSLri : ARM::MOVsi; - unsigned ResultReg; + + // 0 is treated as a failure code all the way up. We intialize ResultReg + // to 0, so that if the forthcoming loop does not execute, we're already + // returning a failure code. This will trigger an assertion in several + // places, which is much better than returning garbage. + unsigned ResultReg = 0; + // MOVsi encodes shift and immediate in shift operand addressing mode. // The following condition has the same value when emitting two // instruction sequences: both are shifts. @@ -2764,7 +2770,7 @@ return false; unsigned Opc = ARM::MOVsr; - unsigned ShiftImm; + unsigned ShiftImm = 0; Value *Src2Value = I->getOperand(1); if (const ConstantInt *CI = dyn_cast(Src2Value)) { ShiftImm = CI->getZExtValue(); @@ -2916,7 +2922,7 @@ const uint64_t Imm = MI->getOperand(2).getImm(); bool Found = false; - bool isZExt; + bool isZExt = false; for (unsigned i = 0, e = array_lengthof(FoldableLoadExtends); i != e; ++i) { if (FoldableLoadExtends[i].Opc[isThumb2] == MI->getOpcode() && Index: llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp =================================================================== --- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -5270,7 +5270,8 @@ return true; } - uint8_t CurrentFormat; + // (~Prefix->SupportedFormats & 255) should always fail? + uint8_t CurrentFormat = 255; switch (getContext().getObjectFileInfo()->getObjectFileType()) { case MCObjectFileInfo::IsMachO: CurrentFormat = MACHO; Index: llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp =================================================================== --- llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp +++ llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp @@ -827,7 +827,7 @@ assert(Offset + NumBytes <= DataSize && "Invalid fixup offset!"); // Used to point to big endian bytes. - unsigned FullSizeBytes; + unsigned FullSizeBytes = 0; if (!IsLittleEndian) { FullSizeBytes = getFixupKindContainerSizeBytes(Fixup.getKind()); assert((Offset + FullSizeBytes) <= DataSize && "Invalid fixup size!"); Index: llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCShuffler.cpp =================================================================== --- llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCShuffler.cpp +++ llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCShuffler.cpp @@ -170,7 +170,7 @@ } bool doneShuffling = false; - unsigned shuffleError; + unsigned shuffleError = HexagonShuffler::SHUFFLE_ERROR_UNKNOWN; while (possibleDuplexes.size() > 0 && (!doneShuffling)) { // case of Duplex Found DuplexCandidate duplexToTry = possibleDuplexes.pop_back_val(); Index: llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp =================================================================== --- llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -2712,7 +2712,10 @@ unsigned ZeroSrcOpcode, ZeroTrgOpcode; bool ReverseOrderSLT, IsUnsigned, IsLikely, AcceptsEquality; - unsigned TrgReg; + // TrgReg should never normally be assigned NUM_TARGET_REGS. + // If you end up with NUM_TARGET_REGS, you have a bug. + // FIXME: is there a better way to ensure TrgReg is assigned something? + unsigned TrgReg = Mips::NUM_TARGET_REGS; if (TrgOp.isReg()) TrgReg = TrgOp.getReg(); else if (TrgOp.isImm()) { Index: llvm/lib/Target/Mips/MipsAsmPrinter.cpp =================================================================== --- llvm/lib/Target/Mips/MipsAsmPrinter.cpp +++ llvm/lib/Target/Mips/MipsAsmPrinter.cpp @@ -886,7 +886,7 @@ // .global xxxx // OutStreamer->EmitSymbolAttribute(MSymbol, MCSA_Global); - const char *RetType; + const char *RetType = ""; // // make the comment field identifying the return and parameter // types of the floating point stub @@ -909,7 +909,7 @@ RetType = ""; break; } - const char *Parms; + const char *Parms = ""; switch (Signature->ParamSig) { case FSig: Parms = "float"; Index: llvm/lib/Target/TargetRecip.cpp =================================================================== --- llvm/lib/Target/TargetRecip.cpp +++ llvm/lib/Target/TargetRecip.cpp @@ -79,7 +79,7 @@ RefStepString = ArgSub.substr(RefPos + 1); ArgSub = ArgSub.substr(0, RefPos); } - bool Enable; + bool Enable = false; bool UseDefaults; if (ArgSub == "all") { UseDefaults = false; Index: llvm/lib/Target/X86/X86FastISel.cpp =================================================================== --- llvm/lib/Target/X86/X86FastISel.cpp +++ llvm/lib/Target/X86/X86FastISel.cpp @@ -2595,8 +2595,8 @@ CI->getZExtValue()); } - unsigned RHSReg; - bool RHSIsKill; + unsigned RHSReg = 0; + bool RHSIsKill = false; if (!ResultReg) { RHSReg = getRegForValue(RHS); if (RHSReg == 0) Index: llvm/lib/Target/X86/X86FixupLEAs.cpp =================================================================== --- llvm/lib/Target/X86/X86FixupLEAs.cpp +++ llvm/lib/Target/X86/X86FixupLEAs.cpp @@ -261,7 +261,7 @@ return false; if (isLEASimpleIncOrDec(MI) && TII->isSafeToClobberEFLAGS(*MFI, I)) { - int NewOpcode; + int NewOpcode = X86::INSTRUCTION_LIST_END; bool isINC = MI->getOperand(4).getImm() == 1; switch (Opcode) { case X86::LEA16r: Index: llvm/lib/Target/X86/X86ISelLowering.cpp =================================================================== --- llvm/lib/Target/X86/X86ISelLowering.cpp +++ llvm/lib/Target/X86/X86ISelLowering.cpp @@ -6516,7 +6516,7 @@ } else if (VT == MVT::v8i32 || VT == MVT::v16i16) { // Try to match an AVX2 horizontal add/sub of signed integers. SDValue InVec2, InVec3; - unsigned X86Opcode; + unsigned X86Opcode = 0; bool CanFold = true; if (isHorizontalBinOp(BV, ISD::ADD, DAG, 0, Half, InVec0, InVec1) && @@ -9363,7 +9363,7 @@ // a half by taking the sum of the half with three inputs and subtracting // the sum of the actual three inputs. The difference is the remaining // slot. - int ADWord, BDWord; + int ADWord = 0, BDWord = 0; int &TripleDWord = ThreeAInputs ? ADWord : BDWord; int &OneInputDWord = ThreeAInputs ? BDWord : ADWord; int TripleInputOffset = ThreeAInputs ? AOffset : BOffset; @@ -15034,7 +15034,7 @@ unsigned Opc = 0; bool Unsigned = false; bool Swap = false; - unsigned SSECC; + unsigned SSECC = 0; switch (SetCCOpcode) { default: llvm_unreachable("Unexpected SETCC condition"); case ISD::SETNE: SSECC = 4; break; Index: llvm/lib/Target/X86/X86InstrInfo.cpp =================================================================== --- llvm/lib/Target/X86/X86InstrInfo.cpp +++ llvm/lib/Target/X86/X86InstrInfo.cpp @@ -3565,7 +3565,7 @@ } const uint16_t *FoundOpcodesGroup = nullptr; - size_t FormIndex; + size_t FormIndex = 0; // Look for the input opcode in the corresponding opcodes table. for (size_t GroupIndex = 0; GroupIndex < GroupsNum && !FoundOpcodesGroup; Index: llvm/lib/Target/X86/X86WinEHState.cpp =================================================================== --- llvm/lib/Target/X86/X86WinEHState.cpp +++ llvm/lib/Target/X86/X86WinEHState.cpp @@ -634,7 +634,7 @@ // Fill in InitialStates and FinalStates for BasicBlocks with call-sites. for (BasicBlock *BB : RPOT) { int InitialState = OverdefinedState; - int FinalState; + int FinalState = 0; if (&F.getEntryBlock() == BB) InitialState = FinalState = ParentBaseState; for (Instruction &I : *BB) { Index: llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp =================================================================== --- llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp +++ llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp @@ -1176,8 +1176,8 @@ if (ConstantInt *CRHS = dyn_cast(RHS)) { // (X & FF00) + xx00 -> (X+xx00) & FF00 - Value *X; - ConstantInt *C2; + Value *X = nullptr; + ConstantInt *C2 = nullptr; if (LHS->hasOneUse() && match(LHS, m_And(m_Value(X), m_ConstantInt(C2))) && CRHS->getValue() == (CRHS->getValue() & C2->getValue())) { @@ -1400,7 +1400,7 @@ match(RHS, m_Select(m_Value(C2), m_Value(A2), m_Value(B2)))) { if (C1 == C2) { Constant *Z1=nullptr, *Z2=nullptr; - Value *A, *B, *C=C1; + Value *A = nullptr, *B = nullptr, *C=C1; if (match(A1, m_AnyZero()) && match(B2, m_AnyZero())) { Z1 = dyn_cast(A1); A = A2; Z2 = dyn_cast(B2); B = B1; Index: llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp =================================================================== --- llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp +++ llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp @@ -930,7 +930,7 @@ if (LHSCC == ICmpInst::ICMP_EQ && LHSCC == RHSCC && LHS->hasOneUse() && RHS->hasOneUse()) { Value *V; - ConstantInt *AndCst, *SmallCst = nullptr, *BigCst = nullptr; + ConstantInt *AndCst = nullptr, *SmallCst = nullptr, *BigCst = nullptr; // (trunc x) == C1 & (and x, CA) == C2 // (and x, CA) == C2 & (trunc x) == C1 Index: llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp =================================================================== --- llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp +++ llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp @@ -545,9 +545,9 @@ { unsigned BitWidth = DL.getTypeSizeInBits(TrueVal->getType()); APInt MinSignedValue = APInt::getSignBit(BitWidth); - Value *X; - const APInt *Y, *C; - bool TrueWhenUnset; + Value *X = nullptr; + const APInt *Y = nullptr, *C; + bool TrueWhenUnset = false; bool IsBitTest = false; if (ICmpInst::isEquality(Pred) && match(CmpLHS, m_And(m_Value(X), m_Power2(Y))) && Index: llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp =================================================================== --- llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp +++ llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp @@ -2829,7 +2829,7 @@ AK = AK_Memory; if (AK == AK_FloatingPoint && FpOffset >= AMD64FpEndOffset) AK = AK_Memory; - Value *Base; + Value *Base = nullptr; switch (AK) { case AK_GeneralPurpose: Base = getShadowPtrForVAArgument(A->getType(), IRB, GpOffset); @@ -3099,7 +3099,7 @@ AK = AK_Memory; if (AK == AK_FloatingPoint && VrOffset >= AArch64VrEndOffset) AK = AK_Memory; - Value *Base; + Value *Base = nullptr; switch (AK) { case AK_GeneralPurpose: Base = getShadowPtrForVAArgument(A->getType(), IRB, GrOffset); @@ -3114,6 +3114,7 @@ Base = getShadowPtrForVAArgument(A->getType(), IRB, OverflowOffset); OverflowOffset += alignTo(ArgSize, 8); break; + } IRB.CreateAlignedStore(MSV.getShadow(A), Base, kShadowTLSAlignment); } Index: llvm/lib/Transforms/Scalar/SROA.cpp =================================================================== --- llvm/lib/Transforms/Scalar/SROA.cpp +++ llvm/lib/Transforms/Scalar/SROA.cpp @@ -1512,7 +1512,7 @@ // never are able to compute one directly that has the correct type, we'll // fall back to it, so keep it and the base it was computed from around here. Value *OffsetPtr = nullptr; - Value *OffsetBasePtr; + Value *OffsetBasePtr = nullptr; // Remember any i8 pointer we come across to re-use if we need to do a raw // byte offset. Index: llvm/lib/Transforms/Utils/MemorySSA.cpp =================================================================== --- llvm/lib/Transforms/Utils/MemorySSA.cpp +++ llvm/lib/Transforms/Utils/MemorySSA.cpp @@ -518,7 +518,7 @@ // Phi nodes are attached to basic blocks if (MemoryPhi *MP = getMemoryAccess(&B)) { for (User *U : MP->users()) { - BasicBlock *UseBlock; + BasicBlock *UseBlock = nullptr; // Phi operands are used on edges, we simulate the right domination by // acting as if the use occurred at the end of the predecessor block. if (MemoryPhi *P = dyn_cast(U)) { @@ -543,7 +543,7 @@ continue; for (User *U : MD->users()) { - BasicBlock *UseBlock; + BasicBlock *UseBlock = nullptr; // Things are allowed to flow to phi nodes over their predecessor edge. if (auto *P = dyn_cast(U)) { for (const auto &Arg : P->operands()) { Index: llvm/tools/clang/include/clang/Sema/Lookup.h =================================================================== --- llvm/tools/clang/include/clang/Sema/Lookup.h +++ llvm/tools/clang/include/clang/Sema/Lookup.h @@ -422,7 +422,7 @@ Paths = nullptr; } } else { - AmbiguityKind SavedAK; + AmbiguityKind SavedAK = Ambiguity; bool WasAmbiguous = false; if (ResultKind == Ambiguous) { SavedAK = Ambiguity; Index: llvm/tools/clang/lib/AST/ExprConstant.cpp =================================================================== --- llvm/tools/clang/lib/AST/ExprConstant.cpp +++ llvm/tools/clang/lib/AST/ExprConstant.cpp @@ -6773,7 +6773,7 @@ APFloat Val(0.0); if (!EvaluateFloat(E->getArg(5), Val, Info)) return false; - unsigned Arg; + unsigned Arg = ~0; switch (Val.getCategory()) { case APFloat::fcNaN: Arg = 0; break; case APFloat::fcInfinity: Arg = 1; break; Index: llvm/tools/clang/lib/AST/MicrosoftMangle.cpp =================================================================== --- llvm/tools/clang/lib/AST/MicrosoftMangle.cpp +++ llvm/tools/clang/lib/AST/MicrosoftMangle.cpp @@ -2492,7 +2492,7 @@ raw_ostream &Out) { if (!Adjustment.Virtual.isEmpty()) { Out << '$'; - char AccessSpec; + char AccessSpec = '\0'; switch (MD->getAccess()) { case AS_none: llvm_unreachable("Unsupported access specifier"); Index: llvm/tools/clang/lib/CodeGen/CGCleanup.h =================================================================== --- llvm/tools/clang/lib/CodeGen/CGCleanup.h +++ llvm/tools/clang/lib/CodeGen/CGCleanup.h @@ -516,7 +516,7 @@ EHScope &operator*() const { return *get(); } iterator &operator++() { - size_t Size; + size_t Size = 0; switch (get()->getKind()) { case EHScope::Catch: Size = EHCatchScope::getSizeForNumHandlers( Index: llvm/tools/clang/lib/CodeGen/CGExprScalar.cpp =================================================================== --- llvm/tools/clang/lib/CodeGen/CGExprScalar.cpp +++ llvm/tools/clang/lib/CodeGen/CGExprScalar.cpp @@ -2979,7 +2979,7 @@ Value *ScalarExprEmitter::VisitBinAssign(const BinaryOperator *E) { bool Ignore = TestAndClearIgnoreResultAssign(); - Value *RHS; + Value *RHS = nullptr; LValue LHS; switch (E->getLHS()->getType().getObjCLifetime()) { Index: llvm/tools/clang/lib/CodeGen/CGRecordLayoutBuilder.cpp =================================================================== --- llvm/tools/clang/lib/CodeGen/CGRecordLayoutBuilder.cpp +++ llvm/tools/clang/lib/CodeGen/CGRecordLayoutBuilder.cpp @@ -375,7 +375,7 @@ // Tail is the offset of the first bit off the end of the current run. It's // used to determine if the ASTRecordLayout is treating these two bitfields as // contiguous. StartBitOffset is offset of the beginning of the Run. - uint64_t StartBitOffset, Tail = 0; + uint64_t StartBitOffset = 0, Tail = 0; if (isDiscreteBitFieldABI()) { for (; Field != FieldEnd; ++Field) { uint64_t BitOffset = getFieldBitOffset(*Field); Index: llvm/tools/clang/lib/CodeGen/CodeGenAction.cpp =================================================================== --- llvm/tools/clang/lib/CodeGen/CodeGenAction.cpp +++ llvm/tools/clang/lib/CodeGen/CodeGenAction.cpp @@ -307,7 +307,7 @@ if (D.getLoc() != SMLoc()) Loc = ConvertBackendLocation(D, Context->getSourceManager()); - unsigned DiagID; + unsigned DiagID = 0; switch (D.getKind()) { case llvm::SourceMgr::DK_Error: DiagID = diag::err_fe_inline_asm; @@ -382,7 +382,7 @@ bool BackendConsumer::InlineAsmDiagHandler(const llvm::DiagnosticInfoInlineAsm &D) { - unsigned DiagID; + unsigned DiagID = 0; ComputeDiagID(D.getSeverity(), inline_asm, DiagID); std::string Message = D.getMsgStr().str(); Index: llvm/tools/clang/lib/CodeGen/TargetInfo.cpp =================================================================== --- llvm/tools/clang/lib/CodeGen/TargetInfo.cpp +++ llvm/tools/clang/lib/CodeGen/TargetInfo.cpp @@ -4953,7 +4953,7 @@ if (!Attr) return; - const char *Kind; + const char *Kind = ""; switch (Attr->getInterrupt()) { case ARMInterruptAttr::Generic: Kind = ""; break; case ARMInterruptAttr::IRQ: Kind = "IRQ"; break; @@ -6062,7 +6062,7 @@ if (!Attr) return; - const char *Kind; + const char *Kind = ""; switch (Attr->getInterrupt()) { case MipsInterruptAttr::eic: Kind = "eic"; break; case MipsInterruptAttr::sw0: Kind = "sw0"; break; Index: llvm/tools/clang/lib/Driver/ToolChain.cpp =================================================================== --- llvm/tools/clang/lib/Driver/ToolChain.cpp +++ llvm/tools/clang/lib/Driver/ToolChain.cpp @@ -546,7 +546,7 @@ } ToolChain::CXXStdlibType ToolChain::GetCXXStdlibType(const ArgList &Args) const{ - ToolChain::CXXStdlibType Type; + ToolChain::CXXStdlibType Type = ToolChain::CST_Libcxx; bool HasValidType = false; const Arg *A = Args.getLastArg(options::OPT_stdlib_EQ); Index: llvm/tools/clang/lib/Lex/Preprocessor.cpp =================================================================== --- llvm/tools/clang/lib/Lex/Preprocessor.cpp +++ llvm/tools/clang/lib/Lex/Preprocessor.cpp @@ -718,7 +718,7 @@ void Preprocessor::Lex(Token &Result) { // We loop here until a lex function returns a token; this avoids recursion. - bool ReturnedToken; + bool ReturnedToken = false; do { switch (CurLexerKind) { case CLK_Lexer: Index: llvm/tools/clang/lib/Parse/ParseObjc.cpp =================================================================== --- llvm/tools/clang/lib/Parse/ParseObjc.cpp +++ llvm/tools/clang/lib/Parse/ParseObjc.cpp @@ -1172,7 +1172,6 @@ ObjCDeclSpec::ObjCDeclQualifier Qual; NullabilityKind Nullability; switch (i) { - default: llvm_unreachable("Unknown decl qualifier"); case objc_in: Qual = ObjCDeclSpec::DQ_In; break; case objc_out: Qual = ObjCDeclSpec::DQ_Out; break; case objc_inout: Qual = ObjCDeclSpec::DQ_Inout; break; Index: llvm/tools/clang/lib/Sema/SemaDecl.cpp =================================================================== --- llvm/tools/clang/lib/Sema/SemaDecl.cpp +++ llvm/tools/clang/lib/Sema/SemaDecl.cpp @@ -934,7 +934,7 @@ if (!Result.empty()) { bool IsFunctionTemplate; - bool IsVarTemplate; + bool IsVarTemplate = false; TemplateName Template; if (Result.end() - Result.begin() > 1) { IsFunctionTemplate = true; Index: llvm/tools/clang/lib/Sema/SemaDeclAttr.cpp =================================================================== --- llvm/tools/clang/lib/Sema/SemaDeclAttr.cpp +++ llvm/tools/clang/lib/Sema/SemaDeclAttr.cpp @@ -6041,7 +6041,8 @@ const ObjCPropertyDecl *ObjCProperty, bool ObjCPropertyAccess) { // Diagnostics for deprecated or unavailable. - unsigned diag, diag_message, diag_fwdclass_message; + // FIXME: What're reasonable defaults for these three? + unsigned diag = 0, diag_message = 0, diag_fwdclass_message = 0; unsigned diag_available_here = diag::note_availability_specified_here; // Matches 'diag::note_property_attribute' options. Index: llvm/tools/clang/lib/Sema/SemaDeclCXX.cpp =================================================================== --- llvm/tools/clang/lib/Sema/SemaDeclCXX.cpp +++ llvm/tools/clang/lib/Sema/SemaDeclCXX.cpp @@ -6039,7 +6039,9 @@ if (!SubRD) return true; - CXXMethodDecl *Selected; + // If we had SAL, we might be able to assume that findTrivialSpecialMember + // properly initializes the _Outptr_ parameter, but alas, we don't, we can't. + CXXMethodDecl *Selected = nullptr; if (findTrivialSpecialMember(S, SubRD, CSM, SubType.getCVRQualifiers(), ConstRHS, Diagnose ? &Selected : nullptr)) return true; Index: llvm/tools/clang/lib/Sema/SemaInit.cpp =================================================================== --- llvm/tools/clang/lib/Sema/SemaInit.cpp +++ llvm/tools/clang/lib/Sema/SemaInit.cpp @@ -3461,7 +3461,7 @@ DeclContext::lookup_result Ctors = S.LookupConstructors(DestRecordDecl); OverloadingResult Result = OR_No_Viable_Function; - OverloadCandidateSet::iterator Best; + OverloadCandidateSet::iterator Best = nullptr; bool AsInitializerList = false; // C++11 [over.match.list]p1, per DR1467: Index: llvm/tools/clang/lib/Sema/SemaLambda.cpp =================================================================== --- llvm/tools/clang/lib/Sema/SemaLambda.cpp +++ llvm/tools/clang/lib/Sema/SemaLambda.cpp @@ -980,7 +980,7 @@ if (C->InitCaptureType.get().isNull()) continue; - unsigned InitStyle; + unsigned InitStyle = 0; switch (C->InitKind) { case LambdaCaptureInitKind::NoInit: llvm_unreachable("not an init-capture?"); Index: llvm/tools/clang/lib/Sema/SemaLookup.cpp =================================================================== --- llvm/tools/clang/lib/Sema/SemaLookup.cpp +++ llvm/tools/clang/lib/Sema/SemaLookup.cpp @@ -2819,7 +2819,7 @@ CanQualType CanTy = Context.getCanonicalType(Context.getTagDeclType(RD)); DeclarationName Name; Expr *Arg = nullptr; - unsigned NumArgs; + unsigned NumArgs = 0; QualType ArgType = CanTy; ExprValueKind VK = VK_LValue; @@ -4954,7 +4954,7 @@ << (int)MIK << Decl << Modules[0]->getFullModuleName(); } - unsigned DiagID; + unsigned DiagID = 0; switch (MIK) { case MissingImportKind::Declaration: DiagID = diag::note_previous_declaration; Index: llvm/tools/clang/lib/Sema/SemaStmtAttr.cpp =================================================================== --- llvm/tools/clang/lib/Sema/SemaStmtAttr.cpp +++ llvm/tools/clang/lib/Sema/SemaStmtAttr.cpp @@ -165,6 +165,8 @@ case LoopHintAttr::UnrollCount: Category = Unroll; break; + default: + llvm_unreachable("Unexpected OptionType!"); }; auto &CategoryState = HintAttrs[Category]; Index: llvm/tools/clang/lib/Serialization/ASTReader.cpp =================================================================== --- llvm/tools/clang/lib/Serialization/ASTReader.cpp +++ llvm/tools/clang/lib/Serialization/ASTReader.cpp @@ -5044,12 +5044,13 @@ size_t Count = M.NumPreprocessedEntities; size_t Half; pp_iterator First = pp_begin; - pp_iterator PPI; + pp_iterator PPI = nullptr; if (EndsAfter) { PPI = std::upper_bound(pp_begin, pp_end, Loc, PPEntityComp<&PPEntityOffset::Begin>(*this, M)); } else { + assert(Count > 0 && "PPI will not be set if this loop doesn't execute!"); // Do a binary search manually instead of using std::lower_bound because // The end locations of entities may be unordered (when a macro expansion // is inside another macro argument), but for this case it is not important @@ -5062,6 +5063,8 @@ Loc)) { First = PPI; ++First; + assert(Count > Half && "size_t is unsigned, subtracing (Half + 1) from Count" + "will cause unsigned integer wraparound!"); Count = Count - Half - 1; } else Count = Half; Index: llvm/tools/clang/lib/Serialization/ASTReaderStmt.cpp =================================================================== --- llvm/tools/clang/lib/Serialization/ASTReaderStmt.cpp +++ llvm/tools/clang/lib/Serialization/ASTReaderStmt.cpp @@ -1757,7 +1757,7 @@ } OMPClause *OMPClauseReader::readClause() { - OMPClause *C; + OMPClause *C = nullptr; switch (Record[Idx++]) { case OMPC_if: C = new (Context) OMPIfClause(); Index: llvm/tools/clang/lib/StaticAnalyzer/Checkers/ObjCContainersASTChecker.cpp =================================================================== --- llvm/tools/clang/lib/StaticAnalyzer/Checkers/ObjCContainersASTChecker.cpp +++ llvm/tools/clang/lib/StaticAnalyzer/Checkers/ObjCContainersASTChecker.cpp @@ -100,7 +100,7 @@ return; const Expr *Arg = nullptr; - unsigned ArgNum; + unsigned ArgNum = 0; if (Name.equals("CFArrayCreate") || Name.equals("CFSetCreate")) { if (CE->getNumArgs() != 4) Index: llvm/tools/clang/lib/StaticAnalyzer/Core/CheckerManager.cpp =================================================================== --- llvm/tools/clang/lib/StaticAnalyzer/Core/CheckerManager.cpp +++ llvm/tools/clang/lib/StaticAnalyzer/Core/CheckerManager.cpp @@ -197,7 +197,7 @@ void runChecker(CheckerManager::CheckObjCMessageFunc checkFn, NodeBuilder &Bldr, ExplodedNode *Pred) { - bool IsPreVisit; + bool IsPreVisit = false; switch (Kind) { case ObjCMessageVisitKind::Pre: Index: llvm/tools/clang/lib/StaticAnalyzer/Core/SymbolManager.cpp =================================================================== --- llvm/tools/clang/lib/StaticAnalyzer/Core/SymbolManager.cpp +++ llvm/tools/clang/lib/StaticAnalyzer/Core/SymbolManager.cpp @@ -455,7 +455,7 @@ return true; } - bool KnownLive; + bool KnownLive = false; switch (sym->getKind()) { case SymExpr::SymbolRegionValueKind: