Index: llvm/trunk/lib/Target/AMDGPU/SIInstructions.td =================================================================== --- llvm/trunk/lib/Target/AMDGPU/SIInstructions.td +++ llvm/trunk/lib/Target/AMDGPU/SIInstructions.td @@ -172,7 +172,7 @@ defm S_BITSET1_B32 : SOP1_32 , "s_bitset1_b32", []>; defm S_BITSET1_B64 : SOP1_64 , "s_bitset1_b64", []>; defm S_GETPC_B64 : SOP1_64_0 , "s_getpc_b64", []>; -defm S_SETPC_B64 : SOP1_64 , "s_setpc_b64", []>; +defm S_SETPC_B64 : SOP1_1 , "s_setpc_b64", []>; defm S_SWAPPC_B64 : SOP1_64 , "s_swappc_b64", []>; defm S_RFE_B64 : SOP1_64 , "s_rfe_b64", []>; Index: llvm/trunk/test/MC/AMDGPU/sop1.s =================================================================== --- llvm/trunk/test/MC/AMDGPU/sop1.s +++ llvm/trunk/test/MC/AMDGPU/sop1.s @@ -133,8 +133,8 @@ s_getpc_b64 s[2:3] // CHECK: s_getpc_b64 s[2:3] ; encoding: [0x00,0x1f,0x82,0xbe] -s_setpc_b64 s[2:3], s[4:5] -// CHECK: s_setpc_b64 s[2:3], s[4:5] ; encoding: [0x04,0x20,0x82,0xbe] +s_setpc_b64 s[4:5] +// CHECK: s_setpc_b64 s[4:5] ; encoding: [0x04,0x20,0x80,0xbe] s_swappc_b64 s[2:3], s[4:5] // CHECK: s_swappc_b64 s[2:3], s[4:5] ; encoding: [0x04,0x21,0x82,0xbe]