Index: lib/Target/PowerPC/PPC.td =================================================================== --- lib/Target/PowerPC/PPC.td +++ lib/Target/PowerPC/PPC.td @@ -151,6 +151,12 @@ SubtargetFeature<"float128", "HasFloat128", "true", "Enable the __float128 data type for IEEE-754R Binary128.", [FeatureVSX]>; +def FeatureCharCmp : + SubtargetFeature<"char-cmp", "HasCharCmp", "true", + "Enable the Character-Type compare instructions">; +def FeatureCTTZ : + SubtargetFeature<"cttz", "HasCTTZ", "true", + "Enable count trailing zeros instructions">; def DeprecatedDST : SubtargetFeature<"", "DeprecatedDST", "true", "Treat vector data stream cache control instructions as deprecated">; @@ -186,6 +192,8 @@ FeatureFusion]; list Power8FeatureList = !listconcat(Power7FeatureList, Power8SpecificFeatures); + list Power9SpecificFeatures = + [FeatureP9Altivec, FeatureP9Vector, FeatureCharCmp, FeatureCTTZ]; } // Note: Future features to add when support is extended to more Index: lib/Target/PowerPC/PPCInstr64Bit.td =================================================================== --- lib/Target/PowerPC/PPCInstr64Bit.td +++ lib/Target/PowerPC/PPCInstr64Bit.td @@ -564,6 +564,13 @@ def CMPLDI : DForm_6_ext<10, (outs crrc:$dst), (ins g8rc:$src1, u16imm64:$src2), "cmpldi $dst, $src1, $src2", IIC_IntCompare>, isPPC64; + def CMPRB : X_BF3_L1_RS5_RS5<31, 192, (outs crbitrc:$BF), + (ins u1imm:$L, g8rc:$rA, g8rc:$rB), + "cmprb $BF, $L, $rA, $rB", IIC_IntCompare>, + Requires<[HasCharCmp]>; + def CMPEQB : X_BF3_RS5_RS5<31, 224, (outs crbitrc:$BF), + (ins g8rc:$rA, g8rc:$rB), "cmpeqb $BF, $rA, $rB", + IIC_IntCompare>, Requires<[HasCharCmp]>; } let hasSideEffects = 0 in { @@ -580,6 +587,9 @@ let Interpretation64Bit = 1, isCodeGenOnly = 1 in { defm CNTLZW8 : XForm_11r<31, 26, (outs g8rc:$rA), (ins g8rc:$rS), "cntlzw", "$rA, $rS", IIC_IntGeneral, []>; +defm CNTTZW8 : XForm_11r<31, 538, (outs g8rc:$rA), (ins g8rc:$rS), + "cnttzw", "$rA, $rS", IIC_IntGeneral, []>, + Requires<[HasCTTZ]>; defm EXTSB8 : XForm_11r<31, 954, (outs g8rc:$rA), (ins g8rc:$rS), "extsb", "$rA, $rS", IIC_IntSimple, @@ -613,9 +623,12 @@ defm SRADI : XSForm_1rc<31, 413, (outs g8rc:$rA), (ins g8rc:$rS, u6imm:$SH), "sradi", "$rA, $rS, $SH", IIC_IntRotateDI, [(set i64:$rA, (sra i64:$rS, (i32 imm:$SH)))]>, isPPC64; -defm CNTLZD : XForm_11r<31, 58, (outs g8rc:$rA), (ins g8rc:$rS), +defm CNTLZD : XForm_11r<31, 58, (outs g8rc:$rA), (ins g8rc:$rS), "cntlzd", "$rA, $rS", IIC_IntGeneral, [(set i64:$rA, (ctlz i64:$rS))]>; +defm CNTTZD : XForm_11r<31, 570, (outs g8rc:$rA), (ins g8rc:$rS), + "cnttzd", "$rA, $rS", IIC_IntGeneral, + [(set i64:$rA, (cttz i64:$rS))]>, Requires<[HasCTTZ]>; def POPCNTD : XForm_11<31, 506, (outs g8rc:$rA), (ins g8rc:$rS), "popcntd $rA, $rS", IIC_IntGeneral, [(set i64:$rA, (ctpop i64:$rS))]>; Index: lib/Target/PowerPC/PPCInstrFormats.td =================================================================== --- lib/Target/PowerPC/PPCInstrFormats.td +++ lib/Target/PowerPC/PPCInstrFormats.td @@ -747,6 +747,39 @@ let Inst{31} = RC; } +class X_BF3_L1_RS5_RS5 opcode, bits<10> xo, dag OOL, dag IOL, + string asmstr, InstrItinClass itin> + : I { + bits<3> BF; + bits<1> L; + bits<5> RA; + bits<5> RB; + + let Inst{6-8} = BF; + let Inst{9} = 0; + let Inst{10} = L; + let Inst{11-15} = RA; + let Inst{16-20} = RB; + let Inst{21-30} = xo; + let Inst{31} = 0; +} + +// Same as XForm_17 but with GPR's and new naming convention +class X_BF3_RS5_RS5 opcode, bits<10> xo, dag OOL, dag IOL, + string asmstr, InstrItinClass itin> + : I { + bits<3> BF; + bits<5> RA; + bits<5> RB; + + let Inst{6-8} = BF; + let Inst{9-10} = 0; + let Inst{11-15} = RA; + let Inst{16-20} = RB; + let Inst{21-30} = xo; + let Inst{31} = 0; +} + // e.g. [PO VRT XO VRB XO /] or [PO VRT XO VRB XO RO] class X_RD5_XO5_RS5 opcode, bits<5> xo2, bits<10> xo, dag OOL, dag IOL, string asmstr, InstrItinClass itin, list pattern> Index: lib/Target/PowerPC/PPCInstrInfo.td =================================================================== --- lib/Target/PowerPC/PPCInstrInfo.td +++ lib/Target/PowerPC/PPCInstrInfo.td @@ -746,6 +746,8 @@ def NaNsFPMath : Predicate<"!TM.Options.NoNaNsFPMath">; def HasBPERMD : Predicate<"PPCSubTarget->hasBPERMD()">; def HasExtDiv : Predicate<"PPCSubTarget->hasExtDiv()">; +def HasCharCmp : Predicate<"PPCSubTarget->hasCharCmp()">; +def HasCTTZ : Predicate<"PPCSubTarget->hasCTTZ()">; //===----------------------------------------------------------------------===// // PowerPC Multiclass Definitions. @@ -2000,6 +2002,9 @@ defm CNTLZW : XForm_11r<31, 26, (outs gprc:$rA), (ins gprc:$rS), "cntlzw", "$rA, $rS", IIC_IntGeneral, [(set i32:$rA, (ctlz i32:$rS))]>; +defm CNTTZW : XForm_11r<31, 538, (outs gprc:$rA), (ins gprc:$rS), + "cnttzw", "$rA, $rS", IIC_IntGeneral, + [(set i32:$rA, (cttz i32:$rS))]>, Requires<[HasCTTZ]>; defm EXTSB : XForm_11r<31, 954, (outs gprc:$rA), (ins gprc:$rS), "extsb", "$rA, $rS", IIC_IntSimple, [(set i32:$rA, (sext_inreg i32:$rS, i8))]>; Index: lib/Target/PowerPC/PPCSubtarget.h =================================================================== --- lib/Target/PowerPC/PPCSubtarget.h +++ lib/Target/PowerPC/PPCSubtarget.h @@ -124,6 +124,8 @@ bool HasHTM; bool HasFusion; bool HasFloat128; + bool HasCharCmp; + bool HasCTTZ; /// When targeting QPX running a stock PPC64 Linux kernel where the stack /// alignment has not been changed, we need to keep the 16-byte alignment @@ -265,6 +267,8 @@ bool hasHTM() const { return HasHTM; } bool hasFusion() const { return HasFusion; } bool hasFloat128() const { return HasFloat128; } + bool hasCharCmp() const { return HasCharCmp; } + bool hasCTTZ() const { return HasCTTZ; } const Triple &getTargetTriple() const { return TargetTriple; } Index: lib/Target/PowerPC/PPCSubtarget.cpp =================================================================== --- lib/Target/PowerPC/PPCSubtarget.cpp +++ lib/Target/PowerPC/PPCSubtarget.cpp @@ -105,6 +105,8 @@ HasHTM = false; HasFusion = false; HasFloat128 = false; + HasCharCmp = false; + HasCTTZ = false; } void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) { Index: lib/Target/PowerPC/README_P9.txt =================================================================== --- lib/Target/PowerPC/README_P9.txt +++ lib/Target/PowerPC/README_P9.txt @@ -116,3 +116,10 @@ . Provide builtin? (set f128:$vT, (int_ppc_vsx_xsrqpxp f128:$vB)) +Fixed Point Facility: + +- Exploit cmprb and cmpeqb (perhaps for something like + isalpha/isdigit/isupper/islower and isspace respectivelly). This can + perhaps be done through a builtin. + +- Provide testing for cnttz[dw] Index: test/MC/Disassembler/PowerPC/ppc64-encoding.txt =================================================================== --- test/MC/Disassembler/PowerPC/ppc64-encoding.txt +++ test/MC/Disassembler/PowerPC/ppc64-encoding.txt @@ -415,6 +415,24 @@ # CHECK: cmplw 2, 3, 4 0x7d 0x03 0x20 0x40 +# CHECK: cmprb 3, 1, 7, 17 +0x7d 0xa7 0x89 0x80 + +# CHECK: cmpeqb 3, 7, 17 +0x7d 0x87 0x89 0xc0 + +# CHECK: cnttzw 7, 17 +0x7e 0x27 0x04 0x34 + +# CHECK: cnttzw. 7, 17 +0x7e 0x27 0x04 0x35 + +# CHECK: cnttzd 7, 17 +0x7e 0x27 0x04 0x74 + +# CHECK: cnttzd. 7, 17 +0x7e 0x27 0x04 0x75 + # CHECK: twllti 3, 4 0x0c 0x43 0x00 0x04 Index: test/MC/PowerPC/ppc64-encoding.s =================================================================== --- test/MC/PowerPC/ppc64-encoding.s +++ test/MC/PowerPC/ppc64-encoding.s @@ -530,6 +530,24 @@ # CHECK-BE: cmplw 2, 3, 4 # encoding: [0x7d,0x03,0x20,0x40] # CHECK-LE: cmplw 2, 3, 4 # encoding: [0x40,0x20,0x03,0x7d] cmpl 2, 0, 3, 4 +# CHECK-BE: cmprb 3, 1, 7, 17 # encoding: [0x7d,0xa7,0x89,0x80] +# CHECK-LE: cmprb 3, 1, 7, 17 # encoding: [0x80,0x89,0xa7,0x7d] + cmprb 3, 1, 7, 17 +# CHECK-BE: cmpeqb 3, 7, 17 # encoding: [0x7d,0x87,0x89,0xc0] +# CHECK-LE: cmpeqb 3, 7, 17 # encoding: [0xc0,0x89,0x87,0x7d] + cmpeqb 3, 7, 17 +# CHECK-BE: cnttzw 7, 17 # encoding: [0x7e,0x27,0x04,0x34] +# CHECK-LE: cnttzw 7, 17 # encoding: [0x34,0x04,0x27,0x7e] + cnttzw 7, 17 +# CHECK-BE: cnttzw. 7, 17 # encoding: [0x7e,0x27,0x04,0x35] +# CHECK-LE: cnttzw. 7, 17 # encoding: [0x35,0x04,0x27,0x7e] + cnttzw. 7, 17 +# CHECK-BE: cnttzd 7, 17 # encoding: [0x7e,0x27,0x04,0x74] +# CHECK-LE: cnttzd 7, 17 # encoding: [0x74,0x04,0x27,0x7e] + cnttzd 7, 17 +# CHECK-BE: cnttzd. 7, 17 # encoding: [0x7e,0x27,0x04,0x75] +# CHECK-LE: cnttzd. 7, 17 # encoding: [0x75,0x04,0x27,0x7e] + cnttzd. 7, 17 # Fixed-point trap instructions