Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT

[probinson]

Summary

FileCheck doesn't actually support combo suffixes; in D17587 I made it complain, and these are the test that failed.

[mcrosier]

test/Transforms/LoopVectorize/PowerPC/large-loop-rdx.ll

17 ↗

(On Diff #48998)

Why is the CHECK-SAME needed here?

test/Transforms/LoopVectorize/PowerPC/small-loop-rdx.ll

17 ↗

(On Diff #48998)

And here?

[probinson]

test/Transforms/LoopVectorize/PowerPC/large-loop-rdx.ll

17 ↗

(On Diff #48998)

Using CHECK-SAME documents that the = and > are expected to be on the same line, thus achieving the effect that 'fadd' is also not on that line, i.e. that the sequence of 'fadd' instructions has ended. Given how IR syntax works this could be a CHECK rather than CHECK-SAME and it would have the same effect. I just think it's clearer with CHECK-SAME. If you disagree I can change it.

test/Transforms/LoopVectorize/PowerPC/small-loop-rdx.ll

17 ↗

(On Diff #48998)

See above.

[mcrosier]

test/Transforms/LoopVectorize/PowerPC/large-loop-rdx.ll

17 ↗

(On Diff #48998)

AFAICT, the test is just checking that we generate exactly 12 fadd instructions. Given that I think you could just replace

CHECK-NEXT-NOT: fadd

with

CHECK-NOT: fadd
CHECK: ret

IMO, that's a bit easier to understand. What do you think, Paul?

test/Transforms/LoopVectorize/PowerPC/small-loop-rdx.ll

17 ↗

(On Diff #48998)

See above. :)

[probinson]

test/Transforms/LoopVectorize/PowerPC/large-loop-rdx.ll

17 ↗

(On Diff #48998)

I tried that first, and it didn't work, because the test actually is not checking that there are exactly 12 fadd instructions. It is checking that the first fadd instruction begins a sequence of exactly 12 fadd instructions. There are other fadd instructions later on, after some other intervening stuff.

Now, if the intent of the test is that there are *only* 12 fadd instructions, that's different, but that's not how it was written originally.

[mcrosier]

LGTM.

test/Transforms/LoopVectorize/PowerPC/large-loop-rdx.ll

17 ↗

(On Diff #48998)

Thanks for the clarification.

llvm/trunk/test/CodeGen/AArch64/fdiv-combine.ll

 ; RUN: llc -march=aarch64 < %s | FileCheck %s
 
 ; Following test cases check:
 ;   a / D; b / D; c / D;
 ;                =>
 ;   recip = 1.0 / D; a * recip; b * recip; c * recip;
 define void @three_fdiv_float(float %D, float %a, float %b, float %c) #0 {
 ; CHECK-LABEL: three_fdiv_float:
-; CHECK: fdiv
-; CHECK-NEXT-NOT: fdiv
+; CHECK: fdiv s
+; CHECK-NOT: fdiv
 ; CHECK: fmul
 ; CHECK: fmul
 ; CHECK: fmul
   %div = fdiv float %a, %D
   %div1 = fdiv float %b, %D
   %div2 = fdiv float %c, %D
   tail call void @foo_3f(float %div, float %div1, float %div2)
   ret void
 }
 
 define void @three_fdiv_double(double %D, double %a, double %b, double %c) #0 {
 ; CHECK-LABEL: three_fdiv_double:
-; CHECK: fdiv
-; CHECK-NEXT-NOT: fdiv
+; CHECK: fdiv d
+; CHECK-NOT: fdiv
 ; CHECK: fmul
 ; CHECK: fmul
 ; CHECK: fmul
   %div = fdiv double %a, %D
   %div1 = fdiv double %b, %D
   %div2 = fdiv double %c, %D
   tail call void @foo_3d(double %div, double %div1, double %div2)
   ret void
 }
 
 define void @three_fdiv_4xfloat(<4 x float> %D, <4 x float> %a, <4 x float> %b, <4 x float> %c) #0 {
 ; CHECK-LABEL: three_fdiv_4xfloat:
-; CHECK: fdiv
-; CHECK-NEXT-NOT: fdiv
+; CHECK: fdiv v
+; CHECK-NOT: fdiv
 ; CHECK: fmul
 ; CHECK: fmul
 ; CHECK: fmul
   %div = fdiv <4 x float> %a, %D
   %div1 = fdiv <4 x float> %b, %D
   %div2 = fdiv <4 x float> %c, %D
   tail call void @foo_3_4xf(<4 x float> %div, <4 x float> %div1, <4 x float> %div2)
   ret void
 }
 
 define void @three_fdiv_2xdouble(<2 x double> %D, <2 x double> %a, <2 x double> %b, <2 x double> %c) #0 {
 ; CHECK-LABEL: three_fdiv_2xdouble:
-; CHECK: fdiv
-; CHECK-NEXT-NOT: fdiv
+; CHECK: fdiv v
+; CHECK-NOT: fdiv
 ; CHECK: fmul
 ; CHECK: fmul
 ; CHECK: fmul
   %div = fdiv <2 x double> %a, %D
   %div1 = fdiv <2 x double> %b, %D
   %div2 = fdiv <2 x double> %c, %D
   tail call void @foo_3_2xd(<2 x double> %div, <2 x double> %div1, <2 x double> %div2)
   ret void
 }
 
 ; Following test cases check we never combine two FDIVs if neither of them
 ; calculates a reciprocal.
 define void @two_fdiv_float(float %D, float %a, float %b) #0 {
 ; CHECK-LABEL: two_fdiv_float:
-; CHECK: fdiv
-; CHECK: fdiv
-; CHECK-NEXT-NOT: fmul
+; CHECK: fdiv s
+; CHECK: fdiv s
+; CHECK-NOT: fmul
   %div = fdiv float %a, %D
   %div1 = fdiv float %b, %D
   tail call void @foo_2f(float %div, float %div1)
   ret void
 }
 
 define void @two_fdiv_double(double %D, double %a, double %b) #0 {
 ; CHECK-LABEL: two_fdiv_double:
-; CHECK: fdiv
-; CHECK: fdiv
-; CHECK-NEXT-NOT: fmul
+; CHECK: fdiv d
+; CHECK: fdiv d
+; CHECK-NOT: fmul
   %div = fdiv double %a, %D
   %div1 = fdiv double %b, %D
   tail call void @foo_2d(double %div, double %div1)
   ret void
 }
 
 declare void @foo_3f(float, float, float)
 declare void @foo_3d(double, double, double)
 declare void @foo_3_4xf(<4 x float>, <4 x float>, <4 x float>)
 declare void @foo_3_2xd(<2 x double>, <2 x double>, <2 x double>)
 declare void @foo_2f(float, float)
 declare void @foo_2d(double, double)
 
 attributes #0 = { "unsafe-fp-math"="true" }

llvm/trunk/test/CodeGen/AArch64/remat.ll

 ; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-a35 -o - %s | FileCheck %s
 ; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-a57 -o - %s | FileCheck %s
 ; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-a53 -o - %s | FileCheck %s
 ; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-a72 -o - %s | FileCheck %s
 ; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=exynos-m1 -o - %s | FileCheck %s
 ; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=kryo -o - %s | FileCheck %s
 
 %X = type { i64, i64, i64 }
 declare void @f(%X*)
 define void @t() {
 entry:
   %tmp = alloca %X
   call void @f(%X* %tmp)
 ; CHECK: add x0, sp, #8
-; CHECK-NEXT-NOT: mov
+; CHECK-NOT: mov
+; CHECK-NEXT: bl f
   call void @f(%X* %tmp)               
 ; CHECK: add x0, sp, #8
-; CHECK-NEXT-NOT: mov
+; CHECK-NOT: mov
+; CHECK-NEXT: bl f
   ret void 
 }

llvm/trunk/test/CodeGen/Hexagon/rdf-copy.ll

 ;     {
 ;         r1 = r0
 ;         r0 = memw(r0 + #0)
 ;     }
 ;
 ; CHECK-LABEL: LBB0_1
 ; CHECK: [[DST:r[0-9]+]] = [[SRC:r[0-9]+]]
 ; CHECK-DAG: memw([[SRC]]
-; CHECK-DAG-NOT: memw([[DST]]
+; CHECK-NOT: memw([[DST]]
 ; CHECK-LABEL: LBB0_2
 
 target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-v64:64:64-v32:32:32-a0:0-n16:32"
 target triple = "hexagon"
 
 %union.t = type { %struct.t, [64 x i8] }
 %struct.t = type { [12 x i8], %struct.r*, double }
 %struct.r = type opaque

llvm/trunk/test/CodeGen/Hexagon/tls_pic.ll

 ; RUN: llc -O2 -march=hexagon -relocation-model=pic < %s | FileCheck %s
 
 @dst_ie = thread_local(initialexec) global i32 0, align 4
 @src_ie = thread_local(initialexec) global i32 0, align 4
 
 ; CHECK-LABEL:    test_initial_exec
 ; CHECK:          = add(pc, ##_GLOBAL_OFFSET_TABLE_@PCREL)
 ; CHECK-DAG:      = ##src_ie@IEGOT
 ; CHECK-DAG:      = ##dst_ie@IEGOT
-; CHECK-DAG-NOT:  call
+; CHECK-NOT:  call
 define i32 @test_initial_exec() nounwind {
 entry:
   %0 = load i32, i32* @src_ie, align 4
   store i32 %0, i32* @dst_ie, align 4
   ret i32 0
 }
 
 @dst_gd = external thread_local global i32

llvm/trunk/test/CodeGen/PowerPC/fdiv-combine.ll

 ; RUN: llc -mcpu=ppc64 < %s | FileCheck %s
 target datalayout = "E-m:e-i64:64-n32:64"
 target triple = "powerpc64-unknown-linux-gnu"
 
 ; Following test case checks:
 ;   a / D; b / D; c / D;
 ;                =>
 ;   recip = 1.0 / D; a * recip; b * recip; c * recip;
 
 define void @three_fdiv_double(double %D, double %a, double %b, double %c) #0 {
 ; CHECK-LABEL: three_fdiv_double:
-; CHECK: fdiv
-; CHECK-NEXT-NOT: fdiv
+; CHECK: fdiv {{[0-9]}}
+; CHECK-NOT: fdiv
 ; CHECK: fmul
 ; CHECK: fmul
 ; CHECK: fmul
   %div = fdiv double %a, %D
   %div1 = fdiv double %b, %D
   %div2 = fdiv double %c, %D
   tail call void @foo_3d(double %div, double %div1, double %div2)
   ret void
 }
 
 define void @two_fdiv_double(double %D, double %a, double %b) #0 {
 ; CHECK-LABEL: two_fdiv_double:
-; CHECK: fdiv
-; CHECK: fdiv
-; CHECK-NEXT-NOT: fmul
+; CHECK: fdiv {{[0-9]}}
+; CHECK: fdiv {{[0-9]}}
+; CHECK-NOT: fmul
   %div = fdiv double %a, %D
   %div1 = fdiv double %b, %D
   tail call void @foo_2d(double %div, double %div1)
   ret void
 }
 
 declare void @foo_3d(double, double, double)
 declare void @foo_3_2xd(<2 x double>, <2 x double>, <2 x double>)
 declare void @foo_2d(double, double)
 
 attributes #0 = { "unsafe-fp-math"="true" }

llvm/trunk/test/CodeGen/SPARC/2011-01-11-CC.ll

 define i32 @test_select_int_fcc(float %f, i32 %a, i32 %b) nounwind readnone noinline {
 entry:
 ;V8-LABEL: test_select_int_fcc:
 ;V8: fcmps
 ;V8-NEXT: nop
 ;V8: {{fbe|fbne}}
 ;V9-LABEL: test_select_int_fcc:
 ;V9: fcmps
-;V9-NEXT-NOT: nop
+;V9-NOT: nop
 ;V9-NOT: {{fbe|fbne}}
 ;V9: mov{{e|ne}} %fcc0
   %0 = fcmp une float %f, 0.000000e+00
   %a.b = select i1 %0, i32 %a, i32 %b
   ret i32 %a.b
 }
 
 

 define double @test_select_dfp_fcc(double %f, double %f1, double %f2) nounwind readnone noinline {
 entry:
 ;V8-LABEL: test_select_dfp_fcc:
 ;V8: fcmpd
 ;V8-NEXT: nop
 ;V8: {{fbne|fbe}}
 ;V9-LABEL: test_select_dfp_fcc:
 ;V9: fcmpd
-;V9-NEXT-NOT: nop
+;V9-NOT: nop
 ;V9-NOT: {{fbne|fbe}}
 ;V9: fmovd{{e|ne}} %fcc0
   %0 = fcmp une double %f, 0.000000e+00
   %1 = select i1 %0, double %f1, double %f2
   ret double %1
 }
 
 define i32 @test_float_cc(double %a, double %b, i32 %c, i32 %d) {

llvm/trunk/test/CodeGen/Thumb/ldm-merge-struct.ll

 ; RUN: llc -mtriple=thumbv6m-eabi -verify-machineinstrs %s -o - | FileCheck %s
 target datalayout = "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:64-v128:64:128-a:0:32-n32-S64"
 target triple = "thumbv6m-none--eabi"
 
 %struct.S = type { i32, i32 }
 
 @s = common global %struct.S zeroinitializer, align 4
 
 define i32 @f() {
 entry:
 ; CHECK-LABEL: f:
 ; CHECK: ldm r[[BASE:[0-9]]],
-; CHECK-NEXT-NOT: subs r[[BASE]]
+; CHECK-NOT: subs r[[BASE]]
   %0 = load i32, i32* getelementptr inbounds (%struct.S, %struct.S* @s, i32 0, i32 0), align 4
   %1 = load i32, i32* getelementptr inbounds (%struct.S, %struct.S* @s, i32 0, i32 1), align 4
   %cmp = icmp sgt i32 %0, %1
   %2 = sub i32 0, %1
   %cond.p = select i1 %cmp, i32 %1, i32 %2
   %cond = add i32 %cond.p, %0
   ret i32 %cond
 }

llvm/trunk/test/Transforms/GVN/pre-gep-load.ll

 
 sw.bb2:                                           ; preds = %if.end, %entry
   %idxprom3 = sext i32 %i to i64
   %arrayidx4 = getelementptr inbounds double*, double** %p, i64 0
   %2 = load double*, double** %arrayidx4, align 8
   %arrayidx5 = getelementptr inbounds double, double* %2, i64 %idxprom3
   %3 = load double, double* %arrayidx5, align 8
 ; CHECK: sw.bb2:
-; CHECK-NEXT-NOT: sext
+; CHECK-NOT: sext
 ; CHECK-NEXT: phi double [
 ; CHECK-NOT: load
   %sub6 = fsub double 3.000000e+00, %3
   br label %return
 
 sw.default:                                       ; preds = %entry
   br label %return
 

llvm/trunk/test/Transforms/LoopVectorize/PowerPC/large-loop-rdx.ll

 ; RUN: opt < %s -loop-vectorize -S | FileCheck %s
 
 ; CHECK: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
-; CHECK-NEXT-NOT: fadd
+; CHECK-NEXT: =
+; CHECK-NOT: fadd
+; CHECK-SAME: >
 
 target datalayout = "e-m:e-i64:64-n32:64"
 target triple = "powerpc64le-ibm-linux-gnu"
 
 define void @QLA_F3_r_veq_norm2_V(float* noalias nocapture %r, [3 x { float, float }]* noalias nocapture readonly %a, i32 signext %n) #0 {
 entry:
   %cmp24 = icmp sgt i32 %n, 0
   br i1 %cmp24, label %for.cond1.preheader.preheader, label %for.end13

llvm/trunk/test/Transforms/LoopVectorize/PowerPC/small-loop-rdx.ll

 ; RUN: opt < %s -loop-vectorize -S | FileCheck %s
 
 ; CHECK: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
 ; CHECK-NEXT: fadd
-; CHECK-NEXT-NOT: fadd
+; CHECK-NEXT: =
+; CHECK-NOT: fadd
+; CHECK-SAME: >
 
 target datalayout = "e-m:e-i64:64-n32:64"
 target triple = "powerpc64le-ibm-linux-gnu"
 
 define void @test(double* nocapture readonly %arr, i32 signext %len) #0 {
 entry:
   %cmp4 = icmp sgt i32 %len, 0
   br i1 %cmp4, label %for.body.lr.ph, label %for.end

llvm/trunk/test/Transforms/SLPVectorizer/X86/ordering.ll

 
 ; Make sure we don't vectorize these phis - they have invokes as inputs.
 
 ; RUN: opt < %s -slp-vectorizer -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7 | FileCheck %s
 
 ; CHECK-LABEL: invoketest
 
 ; CHECK-LABEL: cond.end60
-; CHECK-NEXT-NOT: phi <2 x double>
+; CHECK-NOT: phi <2 x double>
 ; CHECK: insertelement
 ; CHECK-LABEL: if.then63
 
 cond.end60:
   %cond126 = phi double [ %call49, %cond.true54 ], [ %call51, %cond.false57 ]
   %cond61 = phi double [ %call56, %cond.true54 ], [ %call59, %cond.false57 ]
   br i1 undef, label %if.end98, label %if.then63
 

llvm/trunk/test/tools/dsymutil/absolute_symbol.test

 RUN: llvm-dsymutil -dump-debug-map -oso-prepend-path %p %p/Inputs/absolute_sym.macho.i386 | FileCheck %s
 
 The tested object file has been created by the dummy Objective-C code:
 @interface Foo
 @end
 
 @implementation Foo
 @end
 
 int main() { return 0; }
 
 compiled for i386. This create an absolute symbol .objc_class_name_Foo
 We must not consider this symbol for debug info linking as its address
 might conflict with other real symbols in the same file.
 
 CHECK: objc_class_name_Foo
-CHECK-SAME-NOT: objAddr
+CHECK-NOT: objAddr