Index: llvm/trunk/lib/Target/SystemZ/SystemZAsmPrinter.cpp
===================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+++ llvm/trunk/lib/Target/SystemZ/SystemZAsmPrinter.cpp
@@ -109,6 +109,85 @@
     LoweredMI = MCInstBuilder(SystemZ::BR).addReg(SystemZ::R14D);
     break;
 
+  case SystemZ::CondReturn:
+    LoweredMI = MCInstBuilder(SystemZ::BCR)
+      .addImm(MI->getOperand(0).getImm())
+      .addImm(MI->getOperand(1).getImm())
+      .addReg(SystemZ::R14D);
+    break;
+
+  case SystemZ::CRBReturn:
+    LoweredMI = MCInstBuilder(SystemZ::CRB)
+      .addReg(MI->getOperand(0).getReg())
+      .addReg(MI->getOperand(1).getReg())
+      .addImm(MI->getOperand(2).getImm())
+      .addReg(SystemZ::R14D)
+      .addImm(0);
+    break;
+
+  case SystemZ::CGRBReturn:
+    LoweredMI = MCInstBuilder(SystemZ::CGRB)
+      .addReg(MI->getOperand(0).getReg())
+      .addReg(MI->getOperand(1).getReg())
+      .addImm(MI->getOperand(2).getImm())
+      .addReg(SystemZ::R14D)
+      .addImm(0);
+    break;
+
+  case SystemZ::CIBReturn:
+    LoweredMI = MCInstBuilder(SystemZ::CIB)
+      .addReg(MI->getOperand(0).getReg())
+      .addImm(MI->getOperand(1).getImm())
+      .addImm(MI->getOperand(2).getImm())
+      .addReg(SystemZ::R14D)
+      .addImm(0);
+    break;
+
+  case SystemZ::CGIBReturn:
+    LoweredMI = MCInstBuilder(SystemZ::CGIB)
+      .addReg(MI->getOperand(0).getReg())
+      .addImm(MI->getOperand(1).getImm())
+      .addImm(MI->getOperand(2).getImm())
+      .addReg(SystemZ::R14D)
+      .addImm(0);
+    break;
+
+  case SystemZ::CLRBReturn:
+    LoweredMI = MCInstBuilder(SystemZ::CLRB)
+      .addReg(MI->getOperand(0).getReg())
+      .addReg(MI->getOperand(1).getReg())
+      .addImm(MI->getOperand(2).getImm())
+      .addReg(SystemZ::R14D)
+      .addImm(0);
+    break;
+
+  case SystemZ::CLGRBReturn:
+    LoweredMI = MCInstBuilder(SystemZ::CLGRB)
+      .addReg(MI->getOperand(0).getReg())
+      .addReg(MI->getOperand(1).getReg())
+      .addImm(MI->getOperand(2).getImm())
+      .addReg(SystemZ::R14D)
+      .addImm(0);
+    break;
+
+  case SystemZ::CLIBReturn:
+    LoweredMI = MCInstBuilder(SystemZ::CLIB)
+      .addReg(MI->getOperand(0).getReg())
+      .addImm(MI->getOperand(1).getImm())
+      .addImm(MI->getOperand(2).getImm())
+      .addReg(SystemZ::R14D)
+      .addImm(0);
+    break;
+
+  case SystemZ::CLGIBReturn:
+    LoweredMI = MCInstBuilder(SystemZ::CLGIB)
+      .addReg(MI->getOperand(0).getReg())
+      .addImm(MI->getOperand(1).getImm())
+      .addImm(MI->getOperand(2).getImm())
+      .addReg(SystemZ::R14D)
+      .addImm(0);
+    break;
+
   case SystemZ::CallBRASL:
     LoweredMI = MCInstBuilder(SystemZ::BRASL)
       .addReg(SystemZ::R14D)
Index: llvm/trunk/lib/Target/SystemZ/SystemZElimCompare.cpp
===================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZElimCompare.cpp
+++ llvm/trunk/lib/Target/SystemZ/SystemZElimCompare.cpp
@@ -380,17 +380,26 @@
 bool SystemZElimCompare::
 fuseCompareAndBranch(MachineInstr *Compare,
                      SmallVectorImpl<MachineInstr *> &CCUsers) {
-  // See whether we have a comparison that can be fused.
-  unsigned FusedOpcode = TII->getCompareAndBranch(Compare->getOpcode(),
-                                                  Compare);
-  if (!FusedOpcode)
-    return false;
-
   // See whether we have a single branch with which to fuse.
   if (CCUsers.size() != 1)
     return false;
   MachineInstr *Branch = CCUsers[0];
-  if (Branch->getOpcode() != SystemZ::BRC)
+  SystemZII::CompareAndBranchType Type;
+  switch (Branch->getOpcode()) {
+  case SystemZ::BRC:
+    Type = SystemZII::CompareAndBranch;
+    break;
+  case SystemZ::CondReturn:
+    Type = SystemZII::CompareAndReturn;
+    break;
+  default:
+    return false;
+  }
+
+  // See whether we have a comparison that can be fused.
+  unsigned FusedOpcode = TII->getCompareAndBranch(Compare->getOpcode(),
+                                                  Type, Compare);
+  if (!FusedOpcode)
     return false;
 
   // Make sure that the operands are available at the branch.
@@ -403,28 +412,37 @@
         (SrcReg2 && MBBI->modifiesRegister(SrcReg2, TRI)))
       return false;
 
-  // Read the branch mask and target.
+  // Read the branch mask and target (if applicable).
   MachineOperand CCMask(MBBI->getOperand(1));
-  MachineOperand Target(MBBI->getOperand(2));
   assert((CCMask.getImm() & ~SystemZ::CCMASK_ICMP) == 0 &&
          "Invalid condition-code mask for integer comparison");
+  // This is only valid for CompareAndBranch.
+  MachineOperand Target(MBBI->getOperand(
+    Type == SystemZII::CompareAndBranch ? 2 : 0));
 
   // Clear out all current operands.
   int CCUse = MBBI->findRegisterUseOperandIdx(SystemZ::CC, false, TRI);
-  assert(CCUse >= 0 && "BRC must use CC");
+  assert(CCUse >= 0 && "BRC/BCR must use CC");
   Branch->RemoveOperand(CCUse);
-  Branch->RemoveOperand(2);
+  if (Type == SystemZII::CompareAndBranch)
+    Branch->RemoveOperand(2);
   Branch->RemoveOperand(1);
   Branch->RemoveOperand(0);
 
   // Rebuild Branch as a fused compare and branch.
   Branch->setDesc(TII->get(FusedOpcode));
-  MachineInstrBuilder(*Branch->getParent()->getParent(), Branch)
-    .addOperand(Compare->getOperand(0))
-    .addOperand(Compare->getOperand(1))
-    .addOperand(CCMask)
-    .addOperand(Target)
-    .addReg(SystemZ::CC, RegState::ImplicitDefine);
+  MachineInstrBuilder MIB(*Branch->getParent()->getParent(), Branch);
+  MIB.addOperand(Compare->getOperand(0))
+     .addOperand(Compare->getOperand(1))
+     .addOperand(CCMask);
+
+  if (Type == SystemZII::CompareAndBranch) {
+    // Only conditional branches define CC, as they may be converted back
+    // to a non-fused branch because of a long displacement.  Conditional
+    // returns don't have that problem.
+    MIB.addOperand(Target)
+       .addReg(SystemZ::CC, RegState::ImplicitDefine);
+  }
 
   // Clear any intervening kills of SrcReg and SrcReg2.
   MBBI = Compare;
Index: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h
===================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h
@@ -111,6 +111,16 @@
          const MachineOperand *target)
     : Type(type), CCValid(ccValid), CCMask(ccMask), Target(target) {}
 };
+// Kinds of branch in compare-and-branch instructions.  Together with type
+// of the converted compare, this identifies the compare-and-branch
+// instruction.
+enum CompareAndBranchType {
+  // Relative branch - CRJ etc.
+  CompareAndBranch,
+
+  // Indirect branch, used for return - CRBReturn etc.
+  CompareAndReturn
+};
 } // end namespace SystemZII
 
 class SystemZSubtarget;
@@ -165,6 +175,8 @@
                            MachineBasicBlock &FMBB,
                            unsigned NumCyclesF, unsigned ExtraPredCyclesF,
                            BranchProbability Probability) const override;
+  bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
+                            BranchProbability Probability) const override;
   bool PredicateInstruction(MachineInstr &MI,
                             ArrayRef<MachineOperand> Pred) const override;
   void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
@@ -233,6 +245,7 @@
   // BRANCH exists, return the opcode for the latter, otherwise return 0.
   // MI, if nonnull, is the compare instruction.
   unsigned getCompareAndBranch(unsigned Opcode,
+                               SystemZII::CompareAndBranchType Type,
                                const MachineInstr *MI = nullptr) const;
 
   // Emit code before MBBI in MI to move immediate value Value into
Index: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp
===================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp
@@ -508,13 +508,24 @@
 
 bool SystemZInstrInfo::isPredicable(MachineInstr &MI) const {
   unsigned Opcode = MI.getOpcode();
-  return STI.hasLoadStoreOnCond() && getConditionalMove(Opcode);
+  if (STI.hasLoadStoreOnCond() && getConditionalMove(Opcode))
+    return true;
+  if (Opcode == SystemZ::Return)
+    return true;
+  return false;
 }
 
 bool SystemZInstrInfo::
 isProfitableToIfCvt(MachineBasicBlock &MBB,
                     unsigned NumCycles, unsigned ExtraPredCycles,
                     BranchProbability Probability) const {
+  // Avoid using conditional returns at the end of a loop (since then
+  // we'd need to emit an unconditional branch to the beginning anyway,
+  // making the loop body longer).  This doesn't apply for low-probability
+  // loops (eg. compare-and-swap retry), so just decide based on branch
+  // probability instead of looping structure.
+  if (MBB.succ_empty() && Probability < BranchProbability(1, 8))
+    return false;
   // For now only convert single instructions.
   return NumCycles == 1;
 }
@@ -529,6 +540,13 @@
   return false;
 }
 
+bool SystemZInstrInfo::
+isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
+                          BranchProbability Probability) const {
+  // For now only duplicate single instructions.
+  return NumCycles == 1;
+}
+
 bool SystemZInstrInfo::PredicateInstruction(
     MachineInstr &MI, ArrayRef<MachineOperand> Pred) const {
   assert(Pred.size() == 2 && "Invalid condition");
@@ -546,6 +564,13 @@
       return true;
     }
   }
+  if (Opcode == SystemZ::Return) {
+    MI.setDesc(get(SystemZ::CondReturn));
+    MachineInstrBuilder(*MI.getParent()->getParent(), MI)
+      .addImm(CCValid).addImm(CCMask)
+      .addReg(SystemZ::CC, RegState::Implicit);
+    return true;
+  }
   return false;
 }
 
@@ -1253,24 +1278,62 @@
 }
 
 unsigned SystemZInstrInfo::getCompareAndBranch(unsigned Opcode,
+                                               SystemZII::CompareAndBranchType Type,
                                                const MachineInstr *MI) const {
   switch (Opcode) {
-  case SystemZ::CR:
-    return SystemZ::CRJ;
-  case SystemZ::CGR:
-    return SystemZ::CGRJ;
   case SystemZ::CHI:
-    return MI && isInt<8>(MI->getOperand(1).getImm()) ? SystemZ::CIJ : 0;
   case SystemZ::CGHI:
-    return MI && isInt<8>(MI->getOperand(1).getImm()) ? SystemZ::CGIJ : 0;
-  case SystemZ::CLR:
-    return SystemZ::CLRJ;
-  case SystemZ::CLGR:
-    return SystemZ::CLGRJ;
+    if (!(MI && isInt<8>(MI->getOperand(1).getImm())))
+      return 0;
+    break;
   case SystemZ::CLFI:
-    return MI && isUInt<8>(MI->getOperand(1).getImm()) ? SystemZ::CLIJ : 0;
   case SystemZ::CLGFI:
-    return MI && isUInt<8>(MI->getOperand(1).getImm()) ? SystemZ::CLGIJ : 0;
+    if (!(MI && isUInt<8>(MI->getOperand(1).getImm())))
+      return 0;
+  }
+  switch (Type) {
+  case SystemZII::CompareAndBranch:
+    switch (Opcode) {
+    case SystemZ::CR:
+      return SystemZ::CRJ;
+    case SystemZ::CGR:
+      return SystemZ::CGRJ;
+    case SystemZ::CHI:
+      return SystemZ::CIJ;
+    case SystemZ::CGHI:
+      return SystemZ::CGIJ;
+    case SystemZ::CLR:
+      return SystemZ::CLRJ;
+    case SystemZ::CLGR:
+      return SystemZ::CLGRJ;
+    case SystemZ::CLFI:
+      return SystemZ::CLIJ;
+    case SystemZ::CLGFI:
+      return SystemZ::CLGIJ;
+    default:
+      return 0;
+    }
+  case SystemZII::CompareAndReturn:
+    switch (Opcode) {
+    case SystemZ::CR:
+      return SystemZ::CRBReturn;
+    case SystemZ::CGR:
+      return SystemZ::CGRBReturn;
+    case SystemZ::CHI:
+      return SystemZ::CIBReturn;
+    case SystemZ::CGHI:
+      return SystemZ::CGIBReturn;
+    case SystemZ::CLR:
+      return SystemZ::CLRBReturn;
+    case SystemZ::CLGR:
+      return SystemZ::CLGRBReturn;
+    case SystemZ::CLFI:
+      return SystemZ::CLIBReturn;
+    case SystemZ::CLGFI:
+      return SystemZ::CLGIBReturn;
+    default:
+      return 0;
+    }
   default:
     return 0;
   }
Index: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
===================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -36,6 +36,22 @@
 let isReturn = 1, isTerminator = 1, isBarrier = 1, hasCtrlDep = 1 in
   def Return : Alias<2, (outs), (ins), [(z_retflag)]>;
 
+// A conditional return instruction (bcr <cond>, %r14).
+let isReturn = 1, isTerminator = 1, hasCtrlDep = 1, CCMaskFirst = 1, Uses = [CC] in
+  def CondReturn : Alias<2, (outs), (ins cond4:$valid, cond4:$R1), []>;
+
+// Fused compare and conditional returns.
+let isReturn = 1, isTerminator = 1, hasCtrlDep = 1, Uses = [CC] in {
+  def CRBReturn : Alias<6, (outs), (ins GR32:$R1, GR32:$R2, cond4:$M3), []>;
+  def CGRBReturn : Alias<6, (outs), (ins GR64:$R1, GR64:$R2, cond4:$M3), []>;
+  def CIBReturn : Alias<6, (outs), (ins GR32:$R1, imm32sx8:$I2, cond4:$M3), []>;
+  def CGIBReturn : Alias<6, (outs), (ins GR64:$R1, imm64sx8:$I2, cond4:$M3), []>;
+  def CLRBReturn : Alias<6, (outs), (ins GR32:$R1, GR32:$R2, cond4:$M3), []>;
+  def CLGRBReturn : Alias<6, (outs), (ins GR64:$R1, GR64:$R2, cond4:$M3), []>;
+  def CLIBReturn : Alias<6, (outs), (ins GR32:$R1, imm32zx8:$I2, cond4:$M3), []>;
+  def CLGIBReturn : Alias<6, (outs), (ins GR64:$R1, imm64zx8:$I2, cond4:$M3), []>;
+}
+
 // Unconditional branches.  R1 is the condition-code mask (all 1s).
 let isBranch = 1, isTerminator = 1, isBarrier = 1, R1 = 15 in {
   let isIndirectBranch = 1 in
@@ -62,15 +78,20 @@
                      [(z_br_ccmask cond4:$valid, cond4:$R1, bb:$I2)]>;
     def BRCL : InstRIL<0xC04, (outs), (ins cond4:$valid, cond4:$R1,
                                            brtarget32:$I2), "jg$R1\t$I2", []>;
+    let isIndirectBranch = 1 in
+      def BCR : InstRR<0x07, (outs), (ins cond4:$valid, cond4:$R1, GR64:$R2),
+                       "b${R1}r\t$R2", []>;
   }
   def AsmBRC : InstRI<0xA74, (outs), (ins imm32zx4:$R1, brtarget16:$I2),
                       "brc\t$R1, $I2", []>;
   def AsmBRCL : InstRIL<0xC04, (outs), (ins imm32zx4:$R1, brtarget32:$I2),
                         "brcl\t$R1, $I2", []>;
-  def AsmBC : InstRX<0x47, (outs), (ins imm32zx4:$R1, bdxaddr12only:$XBD2),
-                     "bc\t$R1, $XBD2", []>;
-  def AsmBCR : InstRR<0x07, (outs), (ins imm32zx4:$R1, GR64:$R2),
-                      "bcr\t$R1, $R2", []>;
+  let isIndirectBranch = 1 in {
+    def AsmBC : InstRX<0x47, (outs), (ins imm32zx4:$R1, bdxaddr12only:$XBD2),
+                       "bc\t$R1, $XBD2", []>;
+    def AsmBCR : InstRR<0x07, (outs), (ins imm32zx4:$R1, GR64:$R2),
+                        "bcr\t$R1, $R2", []>;
+  }
 }
 
 def AsmNop  : InstAlias<"nop\t$XBD", (AsmBC 0, bdxaddr12only:$XBD), 0>;
@@ -110,30 +131,32 @@
     def LGIJ : InstRIEc<0xEC7D, (outs), (ins GR64:$R1, imm64zx8:$I2, ccmask:$M3,
                                              brtarget16:$RI4),
                         "clgij"##pos1##"\t$R1, $I2, "##pos2##"$RI4", []>;
-    def RB  : InstRRS<0xECF6, (outs), (ins GR32:$R1, GR32:$R2, ccmask:$M3,
-                                           bdaddr12only:$BD4),
-                      "crb"##pos1##"\t$R1, $R2, "##pos2##"$BD4", []>;
-    def GRB : InstRRS<0xECE4, (outs), (ins GR64:$R1, GR64:$R2, ccmask:$M3,
-                                           bdaddr12only:$BD4),
-                      "cgrb"##pos1##"\t$R1, $R2, "##pos2##"$BD4", []>;
-    def IB  : InstRIS<0xECFE, (outs), (ins GR32:$R1, imm32sx8:$I2, ccmask:$M3,
-                                           bdaddr12only:$BD4),
-                      "cib"##pos1##"\t$R1, $I2, "##pos2##"$BD4", []>;
-    def GIB : InstRIS<0xECFC, (outs), (ins GR64:$R1, imm64sx8:$I2, ccmask:$M3,
-                                           bdaddr12only:$BD4),
-                      "cgib"##pos1##"\t$R1, $I2, "##pos2##"$BD4", []>;
-    def LRB  : InstRRS<0xECF7, (outs), (ins GR32:$R1, GR32:$R2, ccmask:$M3,
-                                            bdaddr12only:$BD4),
-                       "clrb"##pos1##"\t$R1, $R2, "##pos2##"$BD4", []>;
-    def LGRB : InstRRS<0xECE5, (outs), (ins GR64:$R1, GR64:$R2, ccmask:$M3,
-                                            bdaddr12only:$BD4),
-                       "clgrb"##pos1##"\t$R1, $R2, "##pos2##"$BD4", []>;
-    def LIB  : InstRIS<0xECFF, (outs), (ins GR32:$R1, imm32zx8:$I2, ccmask:$M3,
-                                            bdaddr12only:$BD4),
-                       "clib"##pos1##"\t$R1, $I2, "##pos2##"$BD4", []>;
-    def LGIB : InstRIS<0xECFD, (outs), (ins GR64:$R1, imm64zx8:$I2, ccmask:$M3,
-                                            bdaddr12only:$BD4),
-                       "clgib"##pos1##"\t$R1, $I2, "##pos2##"$BD4", []>;
+    let isIndirectBranch = 1 in {
+      def RB  : InstRRS<0xECF6, (outs), (ins GR32:$R1, GR32:$R2, ccmask:$M3,
+                                             bdaddr12only:$BD4),
+                        "crb"##pos1##"\t$R1, $R2, "##pos2##"$BD4", []>;
+      def GRB : InstRRS<0xECE4, (outs), (ins GR64:$R1, GR64:$R2, ccmask:$M3,
+                                             bdaddr12only:$BD4),
+                        "cgrb"##pos1##"\t$R1, $R2, "##pos2##"$BD4", []>;
+      def IB  : InstRIS<0xECFE, (outs), (ins GR32:$R1, imm32sx8:$I2, ccmask:$M3,
+                                             bdaddr12only:$BD4),
+                        "cib"##pos1##"\t$R1, $I2, "##pos2##"$BD4", []>;
+      def GIB : InstRIS<0xECFC, (outs), (ins GR64:$R1, imm64sx8:$I2, ccmask:$M3,
+                                             bdaddr12only:$BD4),
+                        "cgib"##pos1##"\t$R1, $I2, "##pos2##"$BD4", []>;
+      def LRB  : InstRRS<0xECF7, (outs), (ins GR32:$R1, GR32:$R2, ccmask:$M3,
+                                              bdaddr12only:$BD4),
+                         "clrb"##pos1##"\t$R1, $R2, "##pos2##"$BD4", []>;
+      def LGRB : InstRRS<0xECE5, (outs), (ins GR64:$R1, GR64:$R2, ccmask:$M3,
+                                              bdaddr12only:$BD4),
+                         "clgrb"##pos1##"\t$R1, $R2, "##pos2##"$BD4", []>;
+      def LIB  : InstRIS<0xECFF, (outs), (ins GR32:$R1, imm32zx8:$I2, ccmask:$M3,
+                                              bdaddr12only:$BD4),
+                         "clib"##pos1##"\t$R1, $I2, "##pos2##"$BD4", []>;
+      def LGIB : InstRIS<0xECFD, (outs), (ins GR64:$R1, imm64zx8:$I2, ccmask:$M3,
+                                              bdaddr12only:$BD4),
+                         "clgib"##pos1##"\t$R1, $I2, "##pos2##"$BD4", []>;
+    }
   }
 }
 let isCodeGenOnly = 1 in
@@ -205,30 +228,32 @@
     def CLGIJ : InstRIEc<0xEC7D, (outs), (ins GR64:$R1, imm64zx8:$I2,
                                               brtarget16:$RI4),
                          "clgij"##name##"\t$R1, $I2, $RI4", []>;
-    def CRB  : InstRRS<0xECF6, (outs), (ins GR32:$R1, GR32:$R2,
-                                            bdaddr12only:$BD4),
-                       "crb"##name##"\t$R1, $R2, $BD4", []>;
-    def CGRB : InstRRS<0xECE4, (outs), (ins GR64:$R1, GR64:$R2,
-                                            bdaddr12only:$BD4),
-                       "cgrb"##name##"\t$R1, $R2, $BD4", []>;
-    def CIB  : InstRIS<0xECFE, (outs), (ins GR32:$R1, imm32sx8:$I2,
-                                            bdaddr12only:$BD4),
-                       "cib"##name##"\t$R1, $I2, $BD4", []>;
-    def CGIB : InstRIS<0xECFC, (outs), (ins GR64:$R1, imm64sx8:$I2,
-                                            bdaddr12only:$BD4),
-                       "cgib"##name##"\t$R1, $I2, $BD4", []>;
-    def CLRB  : InstRRS<0xECF7, (outs), (ins GR32:$R1, GR32:$R2,
-                                            bdaddr12only:$BD4),
-                        "clrb"##name##"\t$R1, $R2, $BD4", []>;
-    def CLGRB : InstRRS<0xECE5, (outs), (ins GR64:$R1, GR64:$R2,
-                                             bdaddr12only:$BD4),
-                        "clgrb"##name##"\t$R1, $R2, $BD4", []>;
-    def CLIB  : InstRIS<0xECFF, (outs), (ins GR32:$R1, imm32zx8:$I2,
-                                             bdaddr12only:$BD4),
-                        "clib"##name##"\t$R1, $I2, $BD4", []>;
-    def CLGIB : InstRIS<0xECFD, (outs), (ins GR64:$R1, imm64zx8:$I2,
-                                             bdaddr12only:$BD4),
-                        "clgib"##name##"\t$R1, $I2, $BD4", []>;
+    let isIndirectBranch = 1 in {
+      def CRB  : InstRRS<0xECF6, (outs), (ins GR32:$R1, GR32:$R2,
+                                              bdaddr12only:$BD4),
+                         "crb"##name##"\t$R1, $R2, $BD4", []>;
+      def CGRB : InstRRS<0xECE4, (outs), (ins GR64:$R1, GR64:$R2,
+                                              bdaddr12only:$BD4),
+                         "cgrb"##name##"\t$R1, $R2, $BD4", []>;
+      def CIB  : InstRIS<0xECFE, (outs), (ins GR32:$R1, imm32sx8:$I2,
+                                              bdaddr12only:$BD4),
+                         "cib"##name##"\t$R1, $I2, $BD4", []>;
+      def CGIB : InstRIS<0xECFC, (outs), (ins GR64:$R1, imm64sx8:$I2,
+                                              bdaddr12only:$BD4),
+                         "cgib"##name##"\t$R1, $I2, $BD4", []>;
+      def CLRB  : InstRRS<0xECF7, (outs), (ins GR32:$R1, GR32:$R2,
+                                              bdaddr12only:$BD4),
+                          "clrb"##name##"\t$R1, $R2, $BD4", []>;
+      def CLGRB : InstRRS<0xECE5, (outs), (ins GR64:$R1, GR64:$R2,
+                                               bdaddr12only:$BD4),
+                          "clgrb"##name##"\t$R1, $R2, $BD4", []>;
+      def CLIB  : InstRIS<0xECFF, (outs), (ins GR32:$R1, imm32zx8:$I2,
+                                               bdaddr12only:$BD4),
+                          "clib"##name##"\t$R1, $I2, $BD4", []>;
+      def CLGIB : InstRIS<0xECFD, (outs), (ins GR64:$R1, imm64zx8:$I2,
+                                               bdaddr12only:$BD4),
+                          "clgib"##name##"\t$R1, $I2, $BD4", []>;
+    }
   }
 }
 multiclass IntCondExtendedMnemonic<bits<4> ccmask, string name1, string name2>
Index: llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp
===================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp
+++ llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp
@@ -125,8 +125,7 @@
 }
 
 void SystemZPassConfig::addPreSched2() {
-  if (getOptLevel() != CodeGenOpt::None &&
-      getSystemZTargetMachine().getSubtargetImpl()->hasLoadStoreOnCond())
+  if (getOptLevel() != CodeGenOpt::None)
     addPass(&IfConverterID);
 }
 
Index: llvm/trunk/test/CodeGen/SystemZ/atomicrmw-minmax-03.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/atomicrmw-minmax-03.ll
+++ llvm/trunk/test/CodeGen/SystemZ/atomicrmw-minmax-03.ll
@@ -12,8 +12,8 @@
 ; CHECK: crjle %r2, %r4, [[KEEP:\..*]]
 ; CHECK: lr [[NEW]], %r4
 ; CHECK: cs %r2, [[NEW]], 0(%r3)
-; CHECK: jl [[LOOP]]
-; CHECK: br %r14
+; CHECK: ber %r14
+; CHECK: j [[LOOP]]
   %res = atomicrmw min i32 *%src, i32 %b seq_cst
   ret i32 %res
 }
@@ -27,8 +27,8 @@
 ; CHECK: crjhe %r2, %r4, [[KEEP:\..*]]
 ; CHECK: lr [[NEW]], %r4
 ; CHECK: cs %r2, [[NEW]], 0(%r3)
-; CHECK: jl [[LOOP]]
-; CHECK: br %r14
+; CHECK: ber %r14
+; CHECK: j [[LOOP]]
   %res = atomicrmw max i32 *%src, i32 %b seq_cst
   ret i32 %res
 }
@@ -42,8 +42,8 @@
 ; CHECK: clrjle %r2, %r4, [[KEEP:\..*]]
 ; CHECK: lr [[NEW]], %r4
 ; CHECK: cs %r2, [[NEW]], 0(%r3)
-; CHECK: jl [[LOOP]]
-; CHECK: br %r14
+; CHECK: ber %r14
+; CHECK: j [[LOOP]]
   %res = atomicrmw umin i32 *%src, i32 %b seq_cst
   ret i32 %res
 }
@@ -57,8 +57,8 @@
 ; CHECK: clrjhe %r2, %r4, [[KEEP:\..*]]
 ; CHECK: lr [[NEW]], %r4
 ; CHECK: cs %r2, [[NEW]], 0(%r3)
-; CHECK: jl [[LOOP]]
-; CHECK: br %r14
+; CHECK: ber %r14
+; CHECK: j [[LOOP]]
   %res = atomicrmw umax i32 *%src, i32 %b seq_cst
   ret i32 %res
 }
@@ -68,7 +68,7 @@
 ; CHECK-LABEL: f5:
 ; CHECK: l %r2, 4092(%r3)
 ; CHECK: cs %r2, {{%r[0-9]+}}, 4092(%r3)
-; CHECK: br %r14
+; CHECK: ber %r14
   %ptr = getelementptr i32, i32 *%src, i64 1023
   %res = atomicrmw min i32 *%ptr, i32 %b seq_cst
   ret i32 %res
@@ -79,7 +79,7 @@
 ; CHECK-LABEL: f6:
 ; CHECK: ly %r2, 4096(%r3)
 ; CHECK: csy %r2, {{%r[0-9]+}}, 4096(%r3)
-; CHECK: br %r14
+; CHECK: ber %r14
   %ptr = getelementptr i32, i32 *%src, i64 1024
   %res = atomicrmw min i32 *%ptr, i32 %b seq_cst
   ret i32 %res
@@ -90,7 +90,7 @@
 ; CHECK-LABEL: f7:
 ; CHECK: ly %r2, 524284(%r3)
 ; CHECK: csy %r2, {{%r[0-9]+}}, 524284(%r3)
-; CHECK: br %r14
+; CHECK: ber %r14
   %ptr = getelementptr i32, i32 *%src, i64 131071
   %res = atomicrmw min i32 *%ptr, i32 %b seq_cst
   ret i32 %res
@@ -102,7 +102,7 @@
 ; CHECK: agfi %r3, 524288
 ; CHECK: l %r2, 0(%r3)
 ; CHECK: cs %r2, {{%r[0-9]+}}, 0(%r3)
-; CHECK: br %r14
+; CHECK: ber %r14
   %ptr = getelementptr i32, i32 *%src, i64 131072
   %res = atomicrmw min i32 *%ptr, i32 %b seq_cst
   ret i32 %res
@@ -113,7 +113,7 @@
 ; CHECK-LABEL: f9:
 ; CHECK: ly %r2, -4(%r3)
 ; CHECK: csy %r2, {{%r[0-9]+}}, -4(%r3)
-; CHECK: br %r14
+; CHECK: ber %r14
   %ptr = getelementptr i32, i32 *%src, i64 -1
   %res = atomicrmw min i32 *%ptr, i32 %b seq_cst
   ret i32 %res
@@ -124,7 +124,7 @@
 ; CHECK-LABEL: f10:
 ; CHECK: ly %r2, -524288(%r3)
 ; CHECK: csy %r2, {{%r[0-9]+}}, -524288(%r3)
-; CHECK: br %r14
+; CHECK: ber %r14
   %ptr = getelementptr i32, i32 *%src, i64 -131072
   %res = atomicrmw min i32 *%ptr, i32 %b seq_cst
   ret i32 %res
@@ -136,7 +136,7 @@
 ; CHECK: agfi %r3, -524292
 ; CHECK: l %r2, 0(%r3)
 ; CHECK: cs %r2, {{%r[0-9]+}}, 0(%r3)
-; CHECK: br %r14
+; CHECK: ber %r14
   %ptr = getelementptr i32, i32 *%src, i64 -131073
   %res = atomicrmw min i32 *%ptr, i32 %b seq_cst
   ret i32 %res
@@ -148,7 +148,7 @@
 ; CHECK: agr %r3, %r4
 ; CHECK: l %r2, 0(%r3)
 ; CHECK: cs %r2, {{%r[0-9]+}}, 0(%r3)
-; CHECK: br %r14
+; CHECK: ber %r14
   %add = add i64 %base, %index
   %ptr = inttoptr i64 %add to i32 *
   %res = atomicrmw min i32 *%ptr, i32 %b seq_cst
@@ -165,8 +165,8 @@
 ; CHECK: crjle %r2, [[LIMIT]], [[KEEP:\..*]]
 ; CHECK: lhi [[NEW]], 42
 ; CHECK: cs %r2, [[NEW]], 0(%r3)
-; CHECK: jl [[LOOP]]
-; CHECK: br %r14
+; CHECK: ber %r14
+; CHECK: j [[LOOP]]
   %res = atomicrmw min i32 *%ptr, i32 42 seq_cst
   ret i32 %res
 }
Index: llvm/trunk/test/CodeGen/SystemZ/atomicrmw-minmax-04.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/atomicrmw-minmax-04.ll
+++ llvm/trunk/test/CodeGen/SystemZ/atomicrmw-minmax-04.ll
@@ -12,8 +12,8 @@
 ; CHECK: cgrjle %r2, %r4, [[KEEP:\..*]]
 ; CHECK: lgr [[NEW]], %r4
 ; CHECK: csg %r2, [[NEW]], 0(%r3)
-; CHECK: jl [[LOOP]]
-; CHECK: br %r14
+; CHECK: ber %r14
+; CHECK: j [[LOOP]]
   %res = atomicrmw min i64 *%src, i64 %b seq_cst
   ret i64 %res
 }
@@ -27,8 +27,8 @@
 ; CHECK: cgrjhe %r2, %r4, [[KEEP:\..*]]
 ; CHECK: lgr [[NEW]], %r4
 ; CHECK: csg %r2, [[NEW]], 0(%r3)
-; CHECK: jl [[LOOP]]
-; CHECK: br %r14
+; CHECK: ber %r14
+; CHECK: j [[LOOP]]
   %res = atomicrmw max i64 *%src, i64 %b seq_cst
   ret i64 %res
 }
@@ -42,8 +42,8 @@
 ; CHECK: clgrjle %r2, %r4, [[KEEP:\..*]]
 ; CHECK: lgr [[NEW]], %r4
 ; CHECK: csg %r2, [[NEW]], 0(%r3)
-; CHECK: jl [[LOOP]]
-; CHECK: br %r14
+; CHECK: ber %r14
+; CHECK: j [[LOOP]]
   %res = atomicrmw umin i64 *%src, i64 %b seq_cst
   ret i64 %res
 }
@@ -57,8 +57,8 @@
 ; CHECK: clgrjhe %r2, %r4, [[KEEP:\..*]]
 ; CHECK: lgr [[NEW]], %r4
 ; CHECK: csg %r2, [[NEW]], 0(%r3)
-; CHECK: jl [[LOOP]]
-; CHECK: br %r14
+; CHECK: ber %r14
+; CHECK: j [[LOOP]]
   %res = atomicrmw umax i64 *%src, i64 %b seq_cst
   ret i64 %res
 }
@@ -68,7 +68,7 @@
 ; CHECK-LABEL: f5:
 ; CHECK: lg %r2, 524280(%r3)
 ; CHECK: csg %r2, {{%r[0-9]+}}, 524280(%r3)
-; CHECK: br %r14
+; CHECK: ber %r14
   %ptr = getelementptr i64, i64 *%src, i64 65535
   %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
   ret i64 %res
@@ -80,7 +80,7 @@
 ; CHECK: agfi %r3, 524288
 ; CHECK: lg %r2, 0(%r3)
 ; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
-; CHECK: br %r14
+; CHECK: ber %r14
   %ptr = getelementptr i64, i64 *%src, i64 65536
   %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
   ret i64 %res
@@ -91,7 +91,7 @@
 ; CHECK-LABEL: f7:
 ; CHECK: lg %r2, -524288(%r3)
 ; CHECK: csg %r2, {{%r[0-9]+}}, -524288(%r3)
-; CHECK: br %r14
+; CHECK: ber %r14
   %ptr = getelementptr i64, i64 *%src, i64 -65536
   %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
   ret i64 %res
@@ -103,7 +103,7 @@
 ; CHECK: agfi %r3, -524296
 ; CHECK: lg %r2, 0(%r3)
 ; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
-; CHECK: br %r14
+; CHECK: ber %r14
   %ptr = getelementptr i64, i64 *%src, i64 -65537
   %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
   ret i64 %res
@@ -115,7 +115,7 @@
 ; CHECK: agr %r3, %r4
 ; CHECK: lg %r2, 0(%r3)
 ; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
-; CHECK: br %r14
+; CHECK: ber %r14
   %add = add i64 %base, %index
   %ptr = inttoptr i64 %add to i64 *
   %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
@@ -132,8 +132,8 @@
 ; CHECK: cgrjle %r2, [[LIMIT]], [[KEEP:\..*]]
 ; CHECK: lghi [[NEW]], 42
 ; CHECK: csg %r2, [[NEW]], 0(%r3)
-; CHECK: jl [[LOOP]]
-; CHECK: br %r14
+; CHECK: ber %r14
+; CHECK: j [[LOOP]]
   %res = atomicrmw min i64 *%ptr, i64 42 seq_cst
   ret i64 %res
 }
Index: llvm/trunk/test/CodeGen/SystemZ/branch-05.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/branch-05.ll
+++ llvm/trunk/test/CodeGen/SystemZ/branch-05.ll
@@ -5,7 +5,7 @@
 define i32 @f1(i32 %x, i32 %y, i32 %op) {
 ; CHECK-LABEL: f1:
 ; CHECK: ahi %r4, -1
-; CHECK: clijh %r4, 5,
+; CHECK: clibh %r4, 5, 0(%r14)
 ; CHECK: llgfr [[OP64:%r[0-5]]], %r4
 ; CHECK: sllg [[INDEX:%r[1-5]]], [[OP64]], 3
 ; CHECK: larl [[BASE:%r[1-5]]]
Index: llvm/trunk/test/CodeGen/SystemZ/cond-store-01.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/cond-store-01.ll
+++ llvm/trunk/test/CodeGen/SystemZ/cond-store-01.ll
@@ -9,10 +9,9 @@
 define void @f1(i8 *%ptr, i8 %alt, i32 %limit) {
 ; CHECK-LABEL: f1:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stc %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i8 , i8 *%ptr
@@ -25,10 +24,9 @@
 define void @f2(i8 *%ptr, i8 %alt, i32 %limit) {
 ; CHECK-LABEL: f2:
 ; CHECK-NOT: %r2
-; CHECK: jhe [[LABEL:[^ ]*]]
+; CHECK: bher %r14
 ; CHECK-NOT: %r2
 ; CHECK: stc %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i8 , i8 *%ptr
@@ -42,10 +40,9 @@
 define void @f3(i8 *%ptr, i32 %alt, i32 %limit) {
 ; CHECK-LABEL: f3:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stc %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i8 , i8 *%ptr
@@ -60,10 +57,9 @@
 define void @f4(i8 *%ptr, i32 %alt, i32 %limit) {
 ; CHECK-LABEL: f4:
 ; CHECK-NOT: %r2
-; CHECK: jhe [[LABEL:[^ ]*]]
+; CHECK: bher %r14
 ; CHECK-NOT: %r2
 ; CHECK: stc %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i8 , i8 *%ptr
@@ -79,10 +75,9 @@
 define void @f5(i8 *%ptr, i32 %alt, i32 %limit) {
 ; CHECK-LABEL: f5:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stc %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i8 , i8 *%ptr
@@ -97,10 +92,9 @@
 define void @f6(i8 *%ptr, i32 %alt, i32 %limit) {
 ; CHECK-LABEL: f6:
 ; CHECK-NOT: %r2
-; CHECK: jhe [[LABEL:[^ ]*]]
+; CHECK: bher %r14
 ; CHECK-NOT: %r2
 ; CHECK: stc %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i8 , i8 *%ptr
@@ -116,10 +110,9 @@
 define void @f7(i8 *%ptr, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f7:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stc %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i8 , i8 *%ptr
@@ -134,10 +127,9 @@
 define void @f8(i8 *%ptr, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f8:
 ; CHECK-NOT: %r2
-; CHECK: jhe [[LABEL:[^ ]*]]
+; CHECK: bher %r14
 ; CHECK-NOT: %r2
 ; CHECK: stc %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i8 , i8 *%ptr
@@ -153,10 +145,9 @@
 define void @f9(i8 *%ptr, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f9:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stc %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i8 , i8 *%ptr
@@ -171,10 +162,9 @@
 define void @f10(i8 *%ptr, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f10:
 ; CHECK-NOT: %r2
-; CHECK: jhe [[LABEL:[^ ]*]]
+; CHECK: bher %r14
 ; CHECK-NOT: %r2
 ; CHECK: stc %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i8 , i8 *%ptr
@@ -189,10 +179,9 @@
 define void @f11(i8 *%base, i8 %alt, i32 %limit) {
 ; CHECK-LABEL: f11:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stc %r3, 4095(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i8, i8 *%base, i64 4095
   %cond = icmp ult i32 %limit, 420
@@ -206,10 +195,9 @@
 define void @f12(i8 *%base, i8 %alt, i32 %limit) {
 ; CHECK-LABEL: f12:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stcy %r3, 4096(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i8, i8 *%base, i64 4096
   %cond = icmp ult i32 %limit, 420
@@ -223,10 +211,9 @@
 define void @f13(i8 *%base, i8 %alt, i32 %limit) {
 ; CHECK-LABEL: f13:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stcy %r3, 524287(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i8, i8 *%base, i64 524287
   %cond = icmp ult i32 %limit, 420
@@ -241,11 +228,10 @@
 define void @f14(i8 *%base, i8 %alt, i32 %limit) {
 ; CHECK-LABEL: f14:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: agfi %r2, 524288
 ; CHECK: stc %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i8, i8 *%base, i64 524288
   %cond = icmp ult i32 %limit, 420
@@ -259,10 +245,9 @@
 define void @f15(i8 *%base, i8 %alt, i32 %limit) {
 ; CHECK-LABEL: f15:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stcy %r3, -524288(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i8, i8 *%base, i64 -524288
   %cond = icmp ult i32 %limit, 420
@@ -277,11 +262,10 @@
 define void @f16(i8 *%base, i8 %alt, i32 %limit) {
 ; CHECK-LABEL: f16:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: agfi %r2, -524289
 ; CHECK: stc %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i8, i8 *%base, i64 -524289
   %cond = icmp ult i32 %limit, 420
@@ -295,10 +279,9 @@
 define void @f17(i64 %base, i64 %index, i8 %alt, i32 %limit) {
 ; CHECK-LABEL: f17:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stcy %r4, 4096(%r3,%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %add1 = add i64 %base, %index
   %add2 = add i64 %add1, 4096
Index: llvm/trunk/test/CodeGen/SystemZ/cond-store-02.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/cond-store-02.ll
+++ llvm/trunk/test/CodeGen/SystemZ/cond-store-02.ll
@@ -9,10 +9,9 @@
 define void @f1(i16 *%ptr, i16 %alt, i32 %limit) {
 ; CHECK-LABEL: f1:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: sth %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i16 , i16 *%ptr
@@ -25,10 +24,9 @@
 define void @f2(i16 *%ptr, i16 %alt, i32 %limit) {
 ; CHECK-LABEL: f2:
 ; CHECK-NOT: %r2
-; CHECK: jhe [[LABEL:[^ ]*]]
+; CHECK: bher %r14
 ; CHECK-NOT: %r2
 ; CHECK: sth %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i16 , i16 *%ptr
@@ -42,10 +40,9 @@
 define void @f3(i16 *%ptr, i32 %alt, i32 %limit) {
 ; CHECK-LABEL: f3:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: sth %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i16 , i16 *%ptr
@@ -60,10 +57,9 @@
 define void @f4(i16 *%ptr, i32 %alt, i32 %limit) {
 ; CHECK-LABEL: f4:
 ; CHECK-NOT: %r2
-; CHECK: jhe [[LABEL:[^ ]*]]
+; CHECK: bher %r14
 ; CHECK-NOT: %r2
 ; CHECK: sth %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i16 , i16 *%ptr
@@ -79,10 +75,9 @@
 define void @f5(i16 *%ptr, i32 %alt, i32 %limit) {
 ; CHECK-LABEL: f5:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: sth %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i16 , i16 *%ptr
@@ -97,10 +92,9 @@
 define void @f6(i16 *%ptr, i32 %alt, i32 %limit) {
 ; CHECK-LABEL: f6:
 ; CHECK-NOT: %r2
-; CHECK: jhe [[LABEL:[^ ]*]]
+; CHECK: bher %r14
 ; CHECK-NOT: %r2
 ; CHECK: sth %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i16 , i16 *%ptr
@@ -116,10 +110,9 @@
 define void @f7(i16 *%ptr, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f7:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: sth %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i16 , i16 *%ptr
@@ -134,10 +127,9 @@
 define void @f8(i16 *%ptr, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f8:
 ; CHECK-NOT: %r2
-; CHECK: jhe [[LABEL:[^ ]*]]
+; CHECK: bher %r14
 ; CHECK-NOT: %r2
 ; CHECK: sth %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i16 , i16 *%ptr
@@ -153,10 +145,9 @@
 define void @f9(i16 *%ptr, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f9:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: sth %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i16 , i16 *%ptr
@@ -171,10 +162,9 @@
 define void @f10(i16 *%ptr, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f10:
 ; CHECK-NOT: %r2
-; CHECK: jhe [[LABEL:[^ ]*]]
+; CHECK: bher %r14
 ; CHECK-NOT: %r2
 ; CHECK: sth %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i16 , i16 *%ptr
@@ -189,10 +179,9 @@
 define void @f11(i16 *%base, i16 %alt, i32 %limit) {
 ; CHECK-LABEL: f11:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: sth %r3, 4094(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i16, i16 *%base, i64 2047
   %cond = icmp ult i32 %limit, 420
@@ -206,10 +195,9 @@
 define void @f12(i16 *%base, i16 %alt, i32 %limit) {
 ; CHECK-LABEL: f12:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: sthy %r3, 4096(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i16, i16 *%base, i64 2048
   %cond = icmp ult i32 %limit, 420
@@ -223,10 +211,9 @@
 define void @f13(i16 *%base, i16 %alt, i32 %limit) {
 ; CHECK-LABEL: f13:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: sthy %r3, 524286(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i16, i16 *%base, i64 262143
   %cond = icmp ult i32 %limit, 420
@@ -241,11 +228,10 @@
 define void @f14(i16 *%base, i16 %alt, i32 %limit) {
 ; CHECK-LABEL: f14:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: agfi %r2, 524288
 ; CHECK: sth %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i16, i16 *%base, i64 262144
   %cond = icmp ult i32 %limit, 420
@@ -259,10 +245,9 @@
 define void @f15(i16 *%base, i16 %alt, i32 %limit) {
 ; CHECK-LABEL: f15:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: sthy %r3, -524288(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i16, i16 *%base, i64 -262144
   %cond = icmp ult i32 %limit, 420
@@ -277,11 +262,10 @@
 define void @f16(i16 *%base, i16 %alt, i32 %limit) {
 ; CHECK-LABEL: f16:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: agfi %r2, -524290
 ; CHECK: sth %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i16, i16 *%base, i64 -262145
   %cond = icmp ult i32 %limit, 420
@@ -295,10 +279,9 @@
 define void @f17(i64 %base, i64 %index, i16 %alt, i32 %limit) {
 ; CHECK-LABEL: f17:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: sthy %r4, 4096(%r3,%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %add1 = add i64 %base, %index
   %add2 = add i64 %add1, 4096
Index: llvm/trunk/test/CodeGen/SystemZ/cond-store-03.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/cond-store-03.ll
+++ llvm/trunk/test/CodeGen/SystemZ/cond-store-03.ll
@@ -8,10 +8,9 @@
 define void @f1(i32 *%ptr, i32 %alt, i32 %limit) {
 ; CHECK-LABEL: f1:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: st %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i32 , i32 *%ptr
@@ -24,10 +23,9 @@
 define void @f2(i32 *%ptr, i32 %alt, i32 %limit) {
 ; CHECK-LABEL: f2:
 ; CHECK-NOT: %r2
-; CHECK: jhe [[LABEL:[^ ]*]]
+; CHECK: bher %r14
 ; CHECK-NOT: %r2
 ; CHECK: st %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i32 , i32 *%ptr
@@ -41,10 +39,9 @@
 define void @f3(i32 *%ptr, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f3:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: st %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i32 , i32 *%ptr
@@ -59,10 +56,9 @@
 define void @f4(i32 *%ptr, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f4:
 ; CHECK-NOT: %r2
-; CHECK: jhe [[LABEL:[^ ]*]]
+; CHECK: bher %r14
 ; CHECK-NOT: %r2
 ; CHECK: st %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i32 , i32 *%ptr
@@ -78,10 +74,9 @@
 define void @f5(i32 *%ptr, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f5:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: st %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i32 , i32 *%ptr
@@ -96,10 +91,9 @@
 define void @f6(i32 *%ptr, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f6:
 ; CHECK-NOT: %r2
-; CHECK: jhe [[LABEL:[^ ]*]]
+; CHECK: bher %r14
 ; CHECK-NOT: %r2
 ; CHECK: st %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i32 , i32 *%ptr
@@ -114,10 +108,9 @@
 define void @f7(i32 *%base, i32 %alt, i32 %limit) {
 ; CHECK-LABEL: f7:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: st %r3, 4092(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 1023
   %cond = icmp ult i32 %limit, 420
@@ -131,10 +124,9 @@
 define void @f8(i32 *%base, i32 %alt, i32 %limit) {
 ; CHECK-LABEL: f8:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: sty %r3, 4096(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 1024
   %cond = icmp ult i32 %limit, 420
@@ -148,10 +140,9 @@
 define void @f9(i32 *%base, i32 %alt, i32 %limit) {
 ; CHECK-LABEL: f9:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: sty %r3, 524284(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 131071
   %cond = icmp ult i32 %limit, 420
@@ -166,11 +157,10 @@
 define void @f10(i32 *%base, i32 %alt, i32 %limit) {
 ; CHECK-LABEL: f10:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: agfi %r2, 524288
 ; CHECK: st %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 131072
   %cond = icmp ult i32 %limit, 420
@@ -184,10 +174,9 @@
 define void @f11(i32 *%base, i32 %alt, i32 %limit) {
 ; CHECK-LABEL: f11:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: sty %r3, -524288(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 -131072
   %cond = icmp ult i32 %limit, 420
@@ -202,11 +191,10 @@
 define void @f12(i32 *%base, i32 %alt, i32 %limit) {
 ; CHECK-LABEL: f12:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: agfi %r2, -524292
 ; CHECK: st %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 -131073
   %cond = icmp ult i32 %limit, 420
@@ -220,10 +208,9 @@
 define void @f13(i64 %base, i64 %index, i32 %alt, i32 %limit) {
 ; CHECK-LABEL: f13:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: sty %r4, 4096(%r3,%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %add1 = add i64 %base, %index
   %add2 = add i64 %add1, 4096
Index: llvm/trunk/test/CodeGen/SystemZ/cond-store-04.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/cond-store-04.ll
+++ llvm/trunk/test/CodeGen/SystemZ/cond-store-04.ll
@@ -8,10 +8,9 @@
 define void @f1(i64 *%ptr, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f1:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stg %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i64 , i64 *%ptr
@@ -24,10 +23,9 @@
 define void @f2(i64 *%ptr, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f2:
 ; CHECK-NOT: %r2
-; CHECK: jhe [[LABEL:[^ ]*]]
+; CHECK: bher %r14
 ; CHECK-NOT: %r2
 ; CHECK: stg %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load i64 , i64 *%ptr
@@ -40,10 +38,9 @@
 define void @f3(i64 *%base, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f3:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stg %r3, 524280(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 65535
   %cond = icmp ult i32 %limit, 420
@@ -58,11 +55,10 @@
 define void @f4(i64 *%base, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f4:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: agfi %r2, 524288
 ; CHECK: stg %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 65536
   %cond = icmp ult i32 %limit, 420
@@ -76,10 +72,9 @@
 define void @f5(i64 *%base, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f5:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stg %r3, -524288(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 -65536
   %cond = icmp ult i32 %limit, 420
@@ -94,11 +89,10 @@
 define void @f6(i64 *%base, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f6:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: agfi %r2, -524296
 ; CHECK: stg %r3, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 -65537
   %cond = icmp ult i32 %limit, 420
@@ -112,10 +106,9 @@
 define void @f7(i64 %base, i64 %index, i64 %alt, i32 %limit) {
 ; CHECK-LABEL: f7:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stg %r4, 524287(%r3,%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %add1 = add i64 %base, %index
   %add2 = add i64 %add1, 524287
Index: llvm/trunk/test/CodeGen/SystemZ/cond-store-05.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/cond-store-05.ll
+++ llvm/trunk/test/CodeGen/SystemZ/cond-store-05.ll
@@ -8,10 +8,9 @@
 define void @f1(float *%ptr, float %alt, i32 %limit) {
 ; CHECK-LABEL: f1:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: ste %f0, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load float , float *%ptr
@@ -24,10 +23,9 @@
 define void @f2(float *%ptr, float %alt, i32 %limit) {
 ; CHECK-LABEL: f2:
 ; CHECK-NOT: %r2
-; CHECK: jhe [[LABEL:[^ ]*]]
+; CHECK: bher %r14
 ; CHECK-NOT: %r2
 ; CHECK: ste %f0, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load float , float *%ptr
@@ -40,10 +38,9 @@
 define void @f3(float *%base, float %alt, i32 %limit) {
 ; CHECK-LABEL: f3:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: ste %f0, 4092(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr float, float *%base, i64 1023
   %cond = icmp ult i32 %limit, 420
@@ -57,10 +54,9 @@
 define void @f4(float *%base, float %alt, i32 %limit) {
 ; CHECK-LABEL: f4:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stey %f0, 4096(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr float, float *%base, i64 1024
   %cond = icmp ult i32 %limit, 420
@@ -74,10 +70,9 @@
 define void @f5(float *%base, float %alt, i32 %limit) {
 ; CHECK-LABEL: f5:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stey %f0, 524284(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr float, float *%base, i64 131071
   %cond = icmp ult i32 %limit, 420
@@ -92,11 +87,10 @@
 define void @f6(float *%base, float %alt, i32 %limit) {
 ; CHECK-LABEL: f6:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: agfi %r2, 524288
 ; CHECK: ste %f0, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr float, float *%base, i64 131072
   %cond = icmp ult i32 %limit, 420
@@ -110,10 +104,9 @@
 define void @f7(float *%base, float %alt, i32 %limit) {
 ; CHECK-LABEL: f7:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stey %f0, -524288(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr float, float *%base, i64 -131072
   %cond = icmp ult i32 %limit, 420
@@ -128,11 +121,10 @@
 define void @f8(float *%base, float %alt, i32 %limit) {
 ; CHECK-LABEL: f8:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: agfi %r2, -524292
 ; CHECK: ste %f0, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr float, float *%base, i64 -131073
   %cond = icmp ult i32 %limit, 420
@@ -146,10 +138,9 @@
 define void @f9(i64 %base, i64 %index, float %alt, i32 %limit) {
 ; CHECK-LABEL: f9:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stey %f0, 4096(%r3,%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %add1 = add i64 %base, %index
   %add2 = add i64 %add1, 4096
Index: llvm/trunk/test/CodeGen/SystemZ/cond-store-06.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/cond-store-06.ll
+++ llvm/trunk/test/CodeGen/SystemZ/cond-store-06.ll
@@ -8,10 +8,9 @@
 define void @f1(double *%ptr, double %alt, i32 %limit) {
 ; CHECK-LABEL: f1:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: std %f0, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load double , double *%ptr
@@ -24,10 +23,9 @@
 define void @f2(double *%ptr, double %alt, i32 %limit) {
 ; CHECK-LABEL: f2:
 ; CHECK-NOT: %r2
-; CHECK: jhe [[LABEL:[^ ]*]]
+; CHECK: bher %r14
 ; CHECK-NOT: %r2
 ; CHECK: std %f0, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 420
   %orig = load double , double *%ptr
@@ -40,10 +38,9 @@
 define void @f3(double *%base, double %alt, i32 %limit) {
 ; CHECK-LABEL: f3:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: std %f0, 4088(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr double, double *%base, i64 511
   %cond = icmp ult i32 %limit, 420
@@ -57,10 +54,9 @@
 define void @f4(double *%base, double %alt, i32 %limit) {
 ; CHECK-LABEL: f4:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stdy %f0, 4096(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr double, double *%base, i64 512
   %cond = icmp ult i32 %limit, 420
@@ -74,10 +70,9 @@
 define void @f5(double *%base, double %alt, i32 %limit) {
 ; CHECK-LABEL: f5:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stdy %f0, 524280(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr double, double *%base, i64 65535
   %cond = icmp ult i32 %limit, 420
@@ -92,11 +87,10 @@
 define void @f6(double *%base, double %alt, i32 %limit) {
 ; CHECK-LABEL: f6:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: agfi %r2, 524288
 ; CHECK: std %f0, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr double, double *%base, i64 65536
   %cond = icmp ult i32 %limit, 420
@@ -110,10 +104,9 @@
 define void @f7(double *%base, double %alt, i32 %limit) {
 ; CHECK-LABEL: f7:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stdy %f0, -524288(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr double, double *%base, i64 -65536
   %cond = icmp ult i32 %limit, 420
@@ -128,11 +121,10 @@
 define void @f8(double *%base, double %alt, i32 %limit) {
 ; CHECK-LABEL: f8:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: agfi %r2, -524296
 ; CHECK: std %f0, 0(%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %ptr = getelementptr double, double *%base, i64 -65537
   %cond = icmp ult i32 %limit, 420
@@ -146,10 +138,9 @@
 define void @f9(i64 %base, i64 %index, double %alt, i32 %limit) {
 ; CHECK-LABEL: f9:
 ; CHECK-NOT: %r2
-; CHECK: jl [[LABEL:[^ ]*]]
+; CHECK: blr %r14
 ; CHECK-NOT: %r2
 ; CHECK: stdy %f0, 524287(%r3,%r2)
-; CHECK: [[LABEL]]:
 ; CHECK: br %r14
   %add1 = add i64 %base, %index
   %add2 = add i64 %add1, 524287
Index: llvm/trunk/test/CodeGen/SystemZ/fp-cmp-01.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/fp-cmp-01.ll
+++ llvm/trunk/test/CodeGen/SystemZ/fp-cmp-01.ll
@@ -9,7 +9,7 @@
 define i64 @f1(i64 %a, i64 %b, float %f1, float %f2) {
 ; CHECK-LABEL: f1:
 ; CHECK: cebr %f0, %f2
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %cond = fcmp oeq float %f1, %f2
@@ -21,7 +21,7 @@
 define i64 @f2(i64 %a, i64 %b, float %f1, float *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: ceb %f0, 0(%r4)
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %f2 = load float , float *%ptr
@@ -34,7 +34,7 @@
 define i64 @f3(i64 %a, i64 %b, float %f1, float *%base) {
 ; CHECK-LABEL: f3:
 ; CHECK: ceb %f0, 4092(%r4)
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %ptr = getelementptr float, float *%base, i64 1023
@@ -50,7 +50,7 @@
 ; CHECK-LABEL: f4:
 ; CHECK: aghi %r4, 4096
 ; CHECK: ceb %f0, 0(%r4)
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %ptr = getelementptr float, float *%base, i64 1024
@@ -65,7 +65,7 @@
 ; CHECK-LABEL: f5:
 ; CHECK: aghi %r4, -4
 ; CHECK: ceb %f0, 0(%r4)
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %ptr = getelementptr float, float *%base, i64 -1
@@ -80,7 +80,7 @@
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r5, 2
 ; CHECK: ceb %f0, 400(%r1,%r4)
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %ptr1 = getelementptr float, float *%base, i64 %index
@@ -153,7 +153,7 @@
 define i64 @f8(i64 %a, i64 %b, float %f) {
 ; CHECK-LABEL: f8:
 ; CHECK: ltebr %f0, %f0
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %cond = fcmp oeq float %f, 0.0
@@ -166,7 +166,7 @@
 define i64 @f9(i64 %a, i64 %b, float %f2, float *%ptr) {
 ; CHECK-LABEL: f9:
 ; CHECK: ceb %f0, 0(%r4)
-; CHECK-NEXT: je {{\.L.*}}
+; CHECK-NEXT: ber %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %f1 = load float , float *%ptr
@@ -179,7 +179,7 @@
 define i64 @f10(i64 %a, i64 %b, float %f2, float *%ptr) {
 ; CHECK-LABEL: f10:
 ; CHECK: ceb %f0, 0(%r4)
-; CHECK-NEXT: jlh {{\.L.*}}
+; CHECK-NEXT: blhr %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %f1 = load float , float *%ptr
@@ -192,7 +192,7 @@
 define i64 @f11(i64 %a, i64 %b, float %f2, float *%ptr) {
 ; CHECK-LABEL: f11:
 ; CHECK: ceb %f0, 0(%r4)
-; CHECK-NEXT: jh {{\.L.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %f1 = load float , float *%ptr
@@ -205,7 +205,7 @@
 define i64 @f12(i64 %a, i64 %b, float %f2, float *%ptr) {
 ; CHECK-LABEL: f12:
 ; CHECK: ceb %f0, 0(%r4)
-; CHECK-NEXT: jhe {{\.L.*}}
+; CHECK-NEXT: bher %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %f1 = load float , float *%ptr
@@ -218,7 +218,7 @@
 define i64 @f13(i64 %a, i64 %b, float %f2, float *%ptr) {
 ; CHECK-LABEL: f13:
 ; CHECK: ceb %f0, 0(%r4)
-; CHECK-NEXT: jle {{\.L.*}}
+; CHECK-NEXT: bler %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %f1 = load float , float *%ptr
@@ -231,7 +231,7 @@
 define i64 @f14(i64 %a, i64 %b, float %f2, float *%ptr) {
 ; CHECK-LABEL: f14:
 ; CHECK: ceb %f0, 0(%r4)
-; CHECK-NEXT: jl {{\.L.*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %f1 = load float , float *%ptr
@@ -244,7 +244,7 @@
 define i64 @f15(i64 %a, i64 %b, float %f2, float *%ptr) {
 ; CHECK-LABEL: f15:
 ; CHECK: ceb %f0, 0(%r4)
-; CHECK-NEXT: jnlh {{\.L.*}}
+; CHECK-NEXT: bnlhr %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %f1 = load float , float *%ptr
@@ -257,7 +257,7 @@
 define i64 @f16(i64 %a, i64 %b, float %f2, float *%ptr) {
 ; CHECK-LABEL: f16:
 ; CHECK: ceb %f0, 0(%r4)
-; CHECK-NEXT: jne {{\.L.*}}
+; CHECK-NEXT: bner %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %f1 = load float , float *%ptr
@@ -270,7 +270,7 @@
 define i64 @f17(i64 %a, i64 %b, float %f2, float *%ptr) {
 ; CHECK-LABEL: f17:
 ; CHECK: ceb %f0, 0(%r4)
-; CHECK-NEXT: jnle {{\.L.*}}
+; CHECK-NEXT: bnler %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %f1 = load float , float *%ptr
@@ -283,7 +283,7 @@
 define i64 @f18(i64 %a, i64 %b, float %f2, float *%ptr) {
 ; CHECK-LABEL: f18:
 ; CHECK: ceb %f0, 0(%r4)
-; CHECK-NEXT: jnl {{\.L.*}}
+; CHECK-NEXT: bnlr %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %f1 = load float , float *%ptr
@@ -296,7 +296,7 @@
 define i64 @f19(i64 %a, i64 %b, float %f2, float *%ptr) {
 ; CHECK-LABEL: f19:
 ; CHECK: ceb %f0, 0(%r4)
-; CHECK-NEXT: jnh {{\.L.*}}
+; CHECK-NEXT: bnhr %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %f1 = load float , float *%ptr
@@ -309,7 +309,7 @@
 define i64 @f20(i64 %a, i64 %b, float %f2, float *%ptr) {
 ; CHECK-LABEL: f20:
 ; CHECK: ceb %f0, 0(%r4)
-; CHECK-NEXT: jnhe {{\.L.*}}
+; CHECK-NEXT: bnher %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %f1 = load float , float *%ptr
Index: llvm/trunk/test/CodeGen/SystemZ/fp-cmp-02.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/fp-cmp-02.ll
+++ llvm/trunk/test/CodeGen/SystemZ/fp-cmp-02.ll
@@ -12,7 +12,7 @@
 define i64 @f1(i64 %a, i64 %b, double %f1, double %f2) {
 ; CHECK-LABEL: f1:
 ; CHECK: cdbr %f0, %f2
-; CHECK-SCALAR-NEXT: je
+; CHECK-SCALAR-NEXT: ber %r14
 ; CHECK-SCALAR: lgr %r2, %r3
 ; CHECK-VECTOR-NEXT: locgrne %r2, %r3
 ; CHECK: br %r14
@@ -25,7 +25,7 @@
 define i64 @f2(i64 %a, i64 %b, double %f1, double *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: cdb %f0, 0(%r4)
-; CHECK-SCALAR-NEXT: je
+; CHECK-SCALAR-NEXT: ber %r14
 ; CHECK-SCALAR: lgr %r2, %r3
 ; CHECK-VECTOR-NEXT: locgrne %r2, %r3
 ; CHECK: br %r14
@@ -39,7 +39,7 @@
 define i64 @f3(i64 %a, i64 %b, double %f1, double *%base) {
 ; CHECK-LABEL: f3:
 ; CHECK: cdb %f0, 4088(%r4)
-; CHECK-SCALAR-NEXT: je
+; CHECK-SCALAR-NEXT: ber %r14
 ; CHECK-SCALAR: lgr %r2, %r3
 ; CHECK-VECTOR-NEXT: locgrne %r2, %r3
 ; CHECK: br %r14
@@ -56,7 +56,7 @@
 ; CHECK-LABEL: f4:
 ; CHECK: aghi %r4, 4096
 ; CHECK: cdb %f0, 0(%r4)
-; CHECK-SCALAR-NEXT: je
+; CHECK-SCALAR-NEXT: ber %r14
 ; CHECK-SCALAR: lgr %r2, %r3
 ; CHECK-VECTOR-NEXT: locgrne %r2, %r3
 ; CHECK: br %r14
@@ -72,7 +72,7 @@
 ; CHECK-LABEL: f5:
 ; CHECK: aghi %r4, -8
 ; CHECK: cdb %f0, 0(%r4)
-; CHECK-SCALAR-NEXT: je
+; CHECK-SCALAR-NEXT: ber %r14
 ; CHECK-SCALAR: lgr %r2, %r3
 ; CHECK-VECTOR-NEXT: locgrne %r2, %r3
 ; CHECK: br %r14
@@ -88,7 +88,7 @@
 ; CHECK-LABEL: f6:
 ; CHECK: sllg %r1, %r5, 3
 ; CHECK: cdb %f0, 800(%r1,%r4)
-; CHECK-SCALAR-NEXT: je
+; CHECK-SCALAR-NEXT: ber %r14
 ; CHECK-SCALAR: lgr %r2, %r3
 ; CHECK-VECTOR-NEXT: locgrne %r2, %r3
 ; CHECK: br %r14
@@ -162,7 +162,7 @@
 define i64 @f8(i64 %a, i64 %b, double %f) {
 ; CHECK-LABEL: f8:
 ; CHECK-SCALAR: ltdbr %f0, %f0
-; CHECK-SCALAR-NEXT: je
+; CHECK-SCALAR-NEXT: ber %r14
 ; CHECK-SCALAR: lgr %r2, %r3
 ; CHECK-VECTOR: ltdbr %f0, %f0
 ; CHECK-VECTOR-NEXT: locgrne %r2, %r3
@@ -176,7 +176,7 @@
 define i64 @f9(i64 %a, i64 %b, double %f2, double *%ptr) {
 ; CHECK-LABEL: f9:
 ; CHECK: cdb %f0, 0(%r4)
-; CHECK-SCALAR-NEXT: jl
+; CHECK-SCALAR-NEXT: blr %r14
 ; CHECK-SCALAR: lgr %r2, %r3
 ; CHECK-VECTOR-NEXT: locgrnl %r2, %r3
 ; CHECK: br %r14
Index: llvm/trunk/test/CodeGen/SystemZ/fp-cmp-03.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/fp-cmp-03.ll
+++ llvm/trunk/test/CodeGen/SystemZ/fp-cmp-03.ll
@@ -10,7 +10,7 @@
 ; CHECK: ld %f1, 0(%r4)
 ; CHECK: ld %f3, 8(%r4)
 ; CHECK: cxbr %f1, %f0
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %f2x = fpext float %f2 to fp128
@@ -26,7 +26,7 @@
 ; CHECK: ld %f0, 0(%r4)
 ; CHECK: ld %f2, 8(%r4)
 ; CHECK: ltxbr %f0, %f0
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: lgr %r2, %r3
 ; CHECK: br %r14
   %f = load fp128 , fp128 *%ptr
Index: llvm/trunk/test/CodeGen/SystemZ/fp-cmp-04.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/fp-cmp-04.ll
+++ llvm/trunk/test/CodeGen/SystemZ/fp-cmp-04.ll
@@ -9,7 +9,7 @@
 define float @f1(float %a, float %b, float *%dest) {
 ; CHECK-LABEL: f1:
 ; CHECK: aebr %f0, %f2
-; CHECK-NEXT: je .L{{.*}}
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
 entry:
   %res = fadd float %a, %b
@@ -28,7 +28,7 @@
 define float @f2(float %a, float %b, float *%dest) {
 ; CHECK-LABEL: f2:
 ; CHECK: aebr %f0, %f2
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %res = fadd float %a, %b
@@ -47,7 +47,7 @@
 define float @f3(float %a, float %b, float *%dest) {
 ; CHECK-LABEL: f3:
 ; CHECK: aebr %f0, %f2
-; CHECK-NEXT: jh .L{{.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
 entry:
   %res = fadd float %a, %b
@@ -66,7 +66,7 @@
 define float @f4(float %a, float %b, float *%dest) {
 ; CHECK-LABEL: f4:
 ; CHECK: aebr %f0, %f2
-; CHECK-NEXT: jnlh .L{{.*}}
+; CHECK-NEXT: bnlhr %r14
 ; CHECK: br %r14
 entry:
   %res = fadd float %a, %b
@@ -85,7 +85,7 @@
 define float @f5(float %a, float %b, float *%dest) {
 ; CHECK-LABEL: f5:
 ; CHECK: seb %f0, 0(%r2)
-; CHECK-NEXT: jnhe .L{{.*}}
+; CHECK-NEXT: bnher %r14
 ; CHECK: br %r14
 entry:
   %cur = load float , float *%dest
@@ -105,7 +105,7 @@
 define float @f6(float %dummy, float %a, float *%dest) {
 ; CHECK-LABEL: f6:
 ; CHECK: lpebr %f0, %f2
-; CHECK-NEXT: jh .L{{.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
 entry:
   %res = call float @llvm.fabs.f32(float %a)
@@ -124,7 +124,7 @@
 define float @f7(float %dummy, float %a, float *%dest) {
 ; CHECK-LABEL: f7:
 ; CHECK: lnebr %f0, %f2
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %abs = call float @llvm.fabs.f32(float %a)
@@ -144,7 +144,7 @@
 define float @f8(float %dummy, float %a, float *%dest) {
 ; CHECK-LABEL: f8:
 ; CHECK: lcebr %f0, %f2
-; CHECK-NEXT: jle .L{{.*}}
+; CHECK-NEXT: bler %r14
 ; CHECK: br %r14
 entry:
   %res = fsub float -0.0, %a
@@ -164,7 +164,7 @@
 ; CHECK-LABEL: f9:
 ; CHECK: meebr %f0, %f2
 ; CHECK-NEXT: ltebr %f0, %f0
-; CHECK-NEXT: jlh .L{{.*}}
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
 entry:
   %res = fmul float %a, %b
@@ -186,7 +186,7 @@
 ; CHECK: aebr %f0, %f2
 ; CHECK-NEXT: debr %f0, %f4
 ; CHECK-NEXT: ltebr %f0, %f0
-; CHECK-NEXT: jne .L{{.*}}
+; CHECK-NEXT: bner %r14
 ; CHECK: br %r14
 entry:
   %add = fadd float %a, %b
@@ -210,7 +210,7 @@
 ; CHECK-NEXT: sebr %f4, %f0
 ; CHECK-NEXT: ste %f4, 0(%r2)
 ; CHECK-NEXT: ltebr %f0, %f0
-; CHECK-NEXT: je .L{{.*}}
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
 entry:
   %add = fadd float %a, %b
@@ -234,7 +234,7 @@
 ; CHECK-NEXT: #APP
 ; CHECK-NEXT: blah %f0
 ; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   call void asm sideeffect "blah $0", "{f0}"(float %val)
@@ -256,7 +256,7 @@
 ; CHECK-NEXT: #APP
 ; CHECK-NEXT: blah %f0
 ; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   call void asm sideeffect "blah $0", "{f0}"(double %val)
@@ -281,7 +281,7 @@
 ; CHECK-NEXT: mxbr
 ; CHECK-NEXT: std
 ; CHECK-NEXT: std
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %val1 = load fp128 , fp128 *%ptr1
@@ -309,7 +309,7 @@
 ; CHECK-NEXT: #APP
 ; CHECK-NEXT: blah %f2
 ; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   call void asm sideeffect "blah $0", "{f2}"(float %val)
@@ -332,7 +332,7 @@
 ; CHECK-NEXT: #APP
 ; CHECK-NEXT: blah %f2
 ; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   call void asm sideeffect "blah $0", "{f2}"(double %val)
@@ -351,7 +351,7 @@
 define float @f17(float %a, float %b, float *%dest) {
 ; CHECK-LABEL: f17:
 ; CHECK: aebr %f0, %f2
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %res = fadd float %a, %b
@@ -371,7 +371,7 @@
 define float @f18(float %dummy, float %a, float *%dest) {
 ; CHECK-LABEL: f18:
 ; CHECK: lnebr %f0, %f2
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %abs = call float @llvm.fabs.f32(float %a)
@@ -391,7 +391,7 @@
 define float @f19(float %dummy, float %a, float *%dest) {
 ; CHECK-LABEL: f19:
 ; CHECK: lcebr %f0, %f2
-; CHECK-NEXT: jle .L{{.*}}
+; CHECK-NEXT: bler %r14
 ; CHECK: br %r14
 entry:
   %res = fsub float -0.0, %a
Index: llvm/trunk/test/CodeGen/SystemZ/fp-cmp-05.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/fp-cmp-05.ll
+++ llvm/trunk/test/CodeGen/SystemZ/fp-cmp-05.ll
@@ -10,7 +10,7 @@
 define float @f1(float %a, float %b, float %f) {
 ; CHECK-LABEL: f1:
 ; CHECK: lcebr
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
   %neg = fsub float -0.0, %f
   %cond = fcmp oeq float %neg, 0.0
   %res = select i1 %cond, float %a, float %b
@@ -21,7 +21,7 @@
 define double @f2(double %a, double %b, double %f) {
 ; CHECK-LABEL: f2:
 ; CHECK: lcdbr
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
   %neg = fsub double -0.0, %f
   %cond = fcmp oeq double %neg, 0.0
   %res = select i1 %cond, double %a, double %b
@@ -34,7 +34,7 @@
 define float @f3(float %a, float %b, float %f) {
 ; CHECK-LABEL: f3:
 ; CHECK: lnebr
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
   %abs = call float @llvm.fabs.f32(float %f)
   %neg = fsub float -0.0, %abs
   %cond = fcmp oeq float %neg, 0.0
@@ -47,7 +47,7 @@
 define double @f4(double %a, double %b, double %f) {
 ; CHECK-LABEL: f4:
 ; CHECK: lndbr
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
   %abs = call double @llvm.fabs.f64(double %f)
   %neg = fsub double -0.0, %abs
   %cond = fcmp oeq double %neg, 0.0
@@ -60,7 +60,7 @@
 define float @f5(float %a, float %b, float %f) {
 ; CHECK-LABEL: f5:
 ; CHECK: lpebr
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
   %abs = call float @llvm.fabs.f32(float %f)
   %cond = fcmp oeq float %abs, 0.0
   %res = select i1 %cond, float %a, float %b
@@ -71,7 +71,7 @@
 define double @f6(double %a, double %b, double %f) {
 ; CHECK-LABEL: f6:
 ; CHECK: lpdbr
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
   %abs = call double @llvm.fabs.f64(double %f)
   %cond = fcmp oeq double %abs, 0.0
   %res = select i1 %cond, double %a, double %b
Index: llvm/trunk/test/CodeGen/SystemZ/fp-move-09.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/fp-move-09.ll
+++ llvm/trunk/test/CodeGen/SystemZ/fp-move-09.ll
@@ -32,7 +32,8 @@
 ; Like f2, but with a conditional store.
 define void @f3(float %val, i8 *%ptr, i32 %which) {
 ; CHECK-LABEL: f3:
-; CHECK: cijlh %r3, 0,
+; CHECK: ciblh %r3, 0, 0(%r14)
+
 ; CHECK: lgdr [[REG:%r[0-5]]], %f0
 ; CHECK: stch [[REG]], 0(%r2)
 ; CHECK: br %r14
@@ -48,7 +49,7 @@
 ; ...and again with 16-bit memory.
 define void @f4(float %val, i16 *%ptr, i32 %which) {
 ; CHECK-LABEL: f4:
-; CHECK: cijlh %r3, 0,
+; CHECK: ciblh %r3, 0, 0(%r14)
 ; CHECK: lgdr [[REG:%r[0-5]]], %f0
 ; CHECK: sthh [[REG]], 0(%r2)
 ; CHECK: br %r14
Index: llvm/trunk/test/CodeGen/SystemZ/fp-move-10.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/fp-move-10.ll
+++ llvm/trunk/test/CodeGen/SystemZ/fp-move-10.ll
@@ -31,7 +31,7 @@
 ; Like f2, but with a conditional store.
 define void @f3(float %val, i8 *%ptr, i32 %which) {
 ; CHECK-LABEL: f3:
-; CHECK-DAG: cijlh %r3, 0,
+; CHECK-DAG: ciblh %r3, 0, 0(%r14)
 ; CHECK-DAG: vlgvf [[REG:%r[0-5]]], %v0, 0
 ; CHECK: stc [[REG]], 0(%r2)
 ; CHECK: br %r14
@@ -47,7 +47,7 @@
 ; ...and again with 16-bit memory.
 define void @f4(float %val, i16 *%ptr, i32 %which) {
 ; CHECK-LABEL: f4:
-; CHECK-DAG: cijlh %r3, 0,
+; CHECK-DAG: ciblh %r3, 0, 0(%r14)
 ; CHECK-DAG: vlgvf [[REG:%r[0-5]]], %v0, 0
 ; CHECK: sth [[REG]], 0(%r2)
 ; CHECK: br %r14
Index: llvm/trunk/test/CodeGen/SystemZ/fp-sqrt-01.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/fp-sqrt-01.ll
+++ llvm/trunk/test/CodeGen/SystemZ/fp-sqrt-01.ll
@@ -159,9 +159,7 @@
 ; CHECK-LABEL: f8:
 ; CHECK: sqebr %f0, %f2
 ; CHECK: cebr %f0, %f0
-; CHECK: jo [[LABEL:\.L.*]]
-; CHECK: br %r14
-; CHECK: [[LABEL]]:
+; CHECK: bnor %r14
 ; CHECK: ler %f0, %f2
 ; CHECK: jg sqrtf@PLT
   %res = tail call float @sqrtf(float %val)
Index: llvm/trunk/test/CodeGen/SystemZ/fp-sqrt-02.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/fp-sqrt-02.ll
+++ llvm/trunk/test/CodeGen/SystemZ/fp-sqrt-02.ll
@@ -161,9 +161,7 @@
 ; CHECK-LABEL: f8:
 ; CHECK: sqdbr %f0, %f2
 ; CHECK: cdbr %f0, %f0
-; CHECK: jo [[LABEL:\.L.*]]
-; CHECK: br %r14
-; CHECK: [[LABEL]]:
+; CHECK: bnor %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: jg sqrt@PLT
   %res = tail call double @sqrt(double %val)
Index: llvm/trunk/test/CodeGen/SystemZ/htm-intrinsics.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/htm-intrinsics.ll
+++ llvm/trunk/test/CodeGen/SystemZ/htm-intrinsics.ll
@@ -67,7 +67,7 @@
 ; CHECK-NOT: stmg
 ; CHECK-NOT: std
 ; CHECK: tbegin 0, 65292
-; CHECK: jnh  {{\.L*}}
+; CHECK: bnhr %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %res = call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 65292)
@@ -90,7 +90,7 @@
 ; CHECK: tbegin 0, 65292
 ; CHECK: ipm %r2
 ; CHECK: srl %r2, 28
-; CHECK: cijlh %r2, 2,  {{\.L*}}
+; CHECK: ciblh %r2, 2, 0(%r14)
 ; CHECK: mvhi 0(%r3), 0
 ; CHECK: br %r14
   %res = call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 65292)
@@ -198,7 +198,7 @@
 define void @test_tend3(i32 *%ptr) {
 ; CHECK-LABEL: test_tend3:
 ; CHECK: tend
-; CHECK: je  {{\.L*}}
+; CHECK: ber %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %res = call i32 @llvm.s390.tend()
@@ -219,7 +219,7 @@
 ; CHECK: tend
 ; CHECK: ipm %r2
 ; CHECK: srl %r2, 28
-; CHECK: cijlh %r2, 2,  {{\.L*}}
+; CHECK: ciblh %r2, 2, 0(%r14)
 ; CHECK: mvhi 0(%r3), 0
 ; CHECK: br %r14
   %res = call i32 @llvm.s390.tend()
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-01.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-01.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-01.ll
@@ -154,7 +154,7 @@
 define double @f11(double %a, double %b, i32 %rhs, i16 *%src) {
 ; CHECK-LABEL: f11:
 ; CHECK: ch %r2, 0(%r3)
-; CHECK-NEXT: jh {{\.L.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %half = load i16 , i16 *%src
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-02.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-02.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-02.ll
@@ -7,7 +7,7 @@
 ; Check register comparison.
 define double @f1(double %a, double %b, i32 %i1, i32 %i2) {
 ; CHECK-LABEL: f1:
-; CHECK: crjl %r2, %r3
+; CHECK: crbl %r2, %r3, 0(%r14)
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i32 %i1, %i2
@@ -19,7 +19,7 @@
 define double @f2(double %a, double %b, i32 %i1, i32 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: c %r2, 0(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i2 = load i32 , i32 *%ptr
@@ -32,7 +32,7 @@
 define double @f3(double %a, double %b, i32 %i1, i32 *%base) {
 ; CHECK-LABEL: f3:
 ; CHECK: c %r2, 4092(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 1023
@@ -46,7 +46,7 @@
 define double @f4(double %a, double %b, i32 %i1, i32 *%base) {
 ; CHECK-LABEL: f4:
 ; CHECK: cy %r2, 4096(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 1024
@@ -60,7 +60,7 @@
 define double @f5(double %a, double %b, i32 %i1, i32 *%base) {
 ; CHECK-LABEL: f5:
 ; CHECK: cy %r2, 524284(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 131071
@@ -76,7 +76,7 @@
 ; CHECK-LABEL: f6:
 ; CHECK: agfi %r3, 524288
 ; CHECK: c %r2, 0(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 131072
@@ -90,7 +90,7 @@
 define double @f7(double %a, double %b, i32 %i1, i32 *%base) {
 ; CHECK-LABEL: f7:
 ; CHECK: cy %r2, -4(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 -1
@@ -104,7 +104,7 @@
 define double @f8(double %a, double %b, i32 %i1, i32 *%base) {
 ; CHECK-LABEL: f8:
 ; CHECK: cy %r2, -524288(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 -131072
@@ -120,7 +120,7 @@
 ; CHECK-LABEL: f9:
 ; CHECK: agfi %r3, -524292
 ; CHECK: c %r2, 0(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 -131073
@@ -134,7 +134,7 @@
 define double @f10(double %a, double %b, i32 %i1, i64 %base, i64 %index) {
 ; CHECK-LABEL: f10:
 ; CHECK: c %r2, 4092({{%r4,%r3|%r3,%r4}})
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %add1 = add i64 %base, %index
@@ -150,7 +150,7 @@
 define double @f11(double %a, double %b, i32 %i1, i64 %base, i64 %index) {
 ; CHECK-LABEL: f11:
 ; CHECK: cy %r2, 4096({{%r4,%r3|%r3,%r4}})
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %add1 = add i64 %base, %index
@@ -186,7 +186,7 @@
 define double @f13(double %a, double %b, i32 %i2, i32 *%ptr) {
 ; CHECK-LABEL: f13:
 ; CHECK: c %r2, 0(%r3)
-; CHECK-NEXT: jh {{\.L.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i1 = load i32 , i32 *%ptr
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-03.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-03.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-03.ll
@@ -5,7 +5,7 @@
 ; Check register comparison.
 define double @f1(double %a, double %b, i32 %i1, i32 %i2) {
 ; CHECK-LABEL: f1:
-; CHECK: clrjl %r2, %r3
+; CHECK: clrbl %r2, %r3, 0(%r14)
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ult i32 %i1, %i2
@@ -17,7 +17,7 @@
 define double @f2(double %a, double %b, i32 %i1, i32 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: cl %r2, 0(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i2 = load i32 , i32 *%ptr
@@ -30,7 +30,7 @@
 define double @f3(double %a, double %b, i32 %i1, i32 *%base) {
 ; CHECK-LABEL: f3:
 ; CHECK: cl %r2, 4092(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 1023
@@ -44,7 +44,7 @@
 define double @f4(double %a, double %b, i32 %i1, i32 *%base) {
 ; CHECK-LABEL: f4:
 ; CHECK: cly %r2, 4096(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 1024
@@ -58,7 +58,7 @@
 define double @f5(double %a, double %b, i32 %i1, i32 *%base) {
 ; CHECK-LABEL: f5:
 ; CHECK: cly %r2, 524284(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 131071
@@ -74,7 +74,7 @@
 ; CHECK-LABEL: f6:
 ; CHECK: agfi %r3, 524288
 ; CHECK: cl %r2, 0(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 131072
@@ -88,7 +88,7 @@
 define double @f7(double %a, double %b, i32 %i1, i32 *%base) {
 ; CHECK-LABEL: f7:
 ; CHECK: cly %r2, -4(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 -1
@@ -102,7 +102,7 @@
 define double @f8(double %a, double %b, i32 %i1, i32 *%base) {
 ; CHECK-LABEL: f8:
 ; CHECK: cly %r2, -524288(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 -131072
@@ -118,7 +118,7 @@
 ; CHECK-LABEL: f9:
 ; CHECK: agfi %r3, -524292
 ; CHECK: cl %r2, 0(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 -131073
@@ -132,7 +132,7 @@
 define double @f10(double %a, double %b, i32 %i1, i64 %base, i64 %index) {
 ; CHECK-LABEL: f10:
 ; CHECK: cl %r2, 4092({{%r4,%r3|%r3,%r4}})
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %add1 = add i64 %base, %index
@@ -148,7 +148,7 @@
 define double @f11(double %a, double %b, i32 %i1, i64 %base, i64 %index) {
 ; CHECK-LABEL: f11:
 ; CHECK: cly %r2, 4096({{%r4,%r3|%r3,%r4}})
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %add1 = add i64 %base, %index
@@ -164,7 +164,7 @@
 define double @f12(double %a, double %b, i32 %i2, i32 *%ptr) {
 ; CHECK-LABEL: f12:
 ; CHECK: cl %r2, 0(%r3)
-; CHECK-NEXT: jh {{\.L.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i1 = load i32 , i32 *%ptr
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-04.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-04.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-04.ll
@@ -110,7 +110,7 @@
 define double @f8(double %a, double %b, i64 %rhs, i16 *%src) {
 ; CHECK-LABEL: f8:
 ; CHECK: cgh %r2, 0(%r3)
-; CHECK-NEXT: jh {{\.L.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %half = load i16 , i16 *%src
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-05.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-05.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-05.ll
@@ -8,7 +8,7 @@
 define double @f1(double %a, double %b, i64 %i1, i32 %unext) {
 ; CHECK-LABEL: f1:
 ; CHECK: cgfr %r2, %r3
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i2 = sext i32 %unext to i64
@@ -32,7 +32,7 @@
 define double @f3(double %a, double %b, i64 %i1, i32 %unext) {
 ; CHECK-LABEL: f3:
 ; CHECK: cgfr %r2, %r3
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i2 = sext i32 %unext to i64
@@ -45,7 +45,7 @@
 define double @f4(double %a, double %b, i64 %i1, i32 %unext) {
 ; CHECK-LABEL: f4:
 ; CHECK: cgfr %r2, %r3
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i2 = sext i32 %unext to i64
@@ -58,7 +58,7 @@
 define double @f5(double %a, double %b, i64 %i1, i32 *%ptr) {
 ; CHECK-LABEL: f5:
 ; CHECK: cgf %r2, 0(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %unext = load i32 , i32 *%ptr
@@ -84,7 +84,7 @@
 define double @f7(double %a, double %b, i64 %i1, i32 *%ptr) {
 ; CHECK-LABEL: f7:
 ; CHECK: cgf %r2, 0(%r3)
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %unext = load i32 , i32 *%ptr
@@ -98,7 +98,7 @@
 define double @f8(double %a, double %b, i64 %i1, i32 *%ptr) {
 ; CHECK-LABEL: f8:
 ; CHECK: cgf %r2, 0(%r3)
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %unext = load i32 , i32 *%ptr
@@ -112,7 +112,7 @@
 define double @f9(double %a, double %b, i64 %i1, i32 *%base) {
 ; CHECK-LABEL: f9:
 ; CHECK: cgf %r2, 524284(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 131071
@@ -129,7 +129,7 @@
 ; CHECK-LABEL: f10:
 ; CHECK: agfi %r3, 524288
 ; CHECK: cgf %r2, 0(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 131072
@@ -144,7 +144,7 @@
 define double @f11(double %a, double %b, i64 %i1, i32 *%base) {
 ; CHECK-LABEL: f11:
 ; CHECK: cgf %r2, -4(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 -1
@@ -159,7 +159,7 @@
 define double @f12(double %a, double %b, i64 %i1, i32 *%base) {
 ; CHECK-LABEL: f12:
 ; CHECK: cgf %r2, -524288(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 -131072
@@ -176,7 +176,7 @@
 ; CHECK-LABEL: f13:
 ; CHECK: agfi %r3, -524292
 ; CHECK: cgf %r2, 0(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 -131073
@@ -191,7 +191,7 @@
 define double @f14(double %a, double %b, i64 %i1, i64 %base, i64 %index) {
 ; CHECK-LABEL: f14:
 ; CHECK: cgf %r2, 524284({{%r4,%r3|%r3,%r4}})
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %add1 = add i64 %base, %index
@@ -295,7 +295,7 @@
 define double @f16(double %a, double %b, i64 %i1, i32 %unext) {
 ; CHECK-LABEL: f16:
 ; CHECK: cgfr %r2, %r3
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i2 = sext i32 %unext to i64
@@ -308,7 +308,7 @@
 define double @f17(double %a, double %b, i64 %i2, i32 *%ptr) {
 ; CHECK-LABEL: f17:
 ; CHECK: cgf %r2, 0(%r3)
-; CHECK-NEXT: jh {{\.L.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %unext = load i32 , i32 *%ptr
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-06.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-06.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-06.ll
@@ -8,7 +8,7 @@
 define double @f1(double %a, double %b, i64 %i1, i32 %unext) {
 ; CHECK-LABEL: f1:
 ; CHECK: clgfr %r2, %r3
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i2 = zext i32 %unext to i64
@@ -21,7 +21,7 @@
 define double @f2(double %a, double %b, i64 %i1, i64 %unext) {
 ; CHECK-LABEL: f2:
 ; CHECK: clgfr %r2, %r3
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i2 = and i64 %unext, 4294967295
@@ -56,7 +56,7 @@
 define double @f5(double %a, double %b, i64 %i1, i32 %unext) {
 ; CHECK-LABEL: f5:
 ; CHECK: clgfr %r2, %r3
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i2 = zext i32 %unext to i64
@@ -69,7 +69,7 @@
 define double @f6(double %a, double %b, i64 %i1, i64 %unext) {
 ; CHECK-LABEL: f6:
 ; CHECK: clgfr %r2, %r3
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i2 = and i64 %unext, 4294967295
@@ -82,7 +82,7 @@
 define double @f7(double %a, double %b, i64 %i1, i32 %unext) {
 ; CHECK-LABEL: f7:
 ; CHECK: clgfr %r2, %r3
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i2 = zext i32 %unext to i64
@@ -95,7 +95,7 @@
 define double @f8(double %a, double %b, i64 %i1, i64 %unext) {
 ; CHECK-LABEL: f8:
 ; CHECK: clgfr %r2, %r3
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i2 = and i64 %unext, 4294967295
@@ -108,7 +108,7 @@
 define double @f9(double %a, double %b, i64 %i1, i32 *%ptr) {
 ; CHECK-LABEL: f9:
 ; CHECK: clgf %r2, 0(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %unext = load i32 , i32 *%ptr
@@ -134,7 +134,7 @@
 define double @f11(double %a, double %b, i64 %i1, i32 *%ptr) {
 ; CHECK-LABEL: f11:
 ; CHECK: clgf %r2, 0(%r3)
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %unext = load i32 , i32 *%ptr
@@ -148,7 +148,7 @@
 define double @f12(double %a, double %b, i64 %i1, i32 *%ptr) {
 ; CHECK-LABEL: f12:
 ; CHECK: clgf %r2, 0(%r3)
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %unext = load i32 , i32 *%ptr
@@ -162,7 +162,7 @@
 define double @f13(double %a, double %b, i64 %i1, i32 *%base) {
 ; CHECK-LABEL: f13:
 ; CHECK: clgf %r2, 524284(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 131071
@@ -179,7 +179,7 @@
 ; CHECK-LABEL: f14:
 ; CHECK: agfi %r3, 524288
 ; CHECK: clgf %r2, 0(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 131072
@@ -194,7 +194,7 @@
 define double @f15(double %a, double %b, i64 %i1, i32 *%base) {
 ; CHECK-LABEL: f15:
 ; CHECK: clgf %r2, -4(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 -1
@@ -209,7 +209,7 @@
 define double @f16(double %a, double %b, i64 %i1, i32 *%base) {
 ; CHECK-LABEL: f16:
 ; CHECK: clgf %r2, -524288(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 -131072
@@ -226,7 +226,7 @@
 ; CHECK-LABEL: f17:
 ; CHECK: agfi %r3, -524292
 ; CHECK: clgf %r2, 0(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 -131073
@@ -241,7 +241,7 @@
 define double @f18(double %a, double %b, i64 %i1, i64 %base, i64 %index) {
 ; CHECK-LABEL: f18:
 ; CHECK: clgf %r2, 524284({{%r4,%r3|%r3,%r4}})
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %add1 = add i64 %base, %index
@@ -345,7 +345,7 @@
 define double @f20(double %a, double %b, i64 %i1, i32 %unext) {
 ; CHECK-LABEL: f20:
 ; CHECK: clgfr %r2, %r3
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i2 = zext i32 %unext to i64
@@ -358,7 +358,7 @@
 define double @f21(double %a, double %b, i64 %i1, i64 %unext) {
 ; CHECK-LABEL: f21:
 ; CHECK: clgfr %r2, %r3
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i2 = and i64 %unext, 4294967295
@@ -371,7 +371,7 @@
 define double @f22(double %a, double %b, i64 %i2, i32 *%ptr) {
 ; CHECK-LABEL: f22:
 ; CHECK: clgf %r2, 0(%r3)
-; CHECK-NEXT: jh {{\.L.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %unext = load i32 , i32 *%ptr
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-07.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-07.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-07.ll
@@ -5,7 +5,7 @@
 ; Check CGR.
 define double @f1(double %a, double %b, i64 %i1, i64 %i2) {
 ; CHECK-LABEL: f1:
-; CHECK: cgrjl %r2, %r3
+; CHECK: cgrbl %r2, %r3, 0(%r14)
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i64 %i1, %i2
@@ -17,7 +17,7 @@
 define double @f2(double %a, double %b, i64 %i1, i64 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: cg %r2, 0(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i2 = load i64 , i64 *%ptr
@@ -30,7 +30,7 @@
 define double @f3(double %a, double %b, i64 %i1, i64 *%base) {
 ; CHECK-LABEL: f3:
 ; CHECK: cg %r2, 524280(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 65535
@@ -46,7 +46,7 @@
 ; CHECK-LABEL: f4:
 ; CHECK: agfi %r3, 524288
 ; CHECK: cg %r2, 0(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 65536
@@ -60,7 +60,7 @@
 define double @f5(double %a, double %b, i64 %i1, i64 *%base) {
 ; CHECK-LABEL: f5:
 ; CHECK: cg %r2, -8(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 -1
@@ -74,7 +74,7 @@
 define double @f6(double %a, double %b, i64 %i1, i64 *%base) {
 ; CHECK-LABEL: f6:
 ; CHECK: cg %r2, -524288(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 -65536
@@ -90,7 +90,7 @@
 ; CHECK-LABEL: f7:
 ; CHECK: agfi %r3, -524296
 ; CHECK: cg %r2, 0(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 -65537
@@ -104,7 +104,7 @@
 define double @f8(double %a, double %b, i64 %i1, i64 %base, i64 %index) {
 ; CHECK-LABEL: f8:
 ; CHECK: cg %r2, 524280({{%r4,%r3|%r3,%r4}})
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %add1 = add i64 %base, %index
@@ -120,7 +120,7 @@
 define double @f9(double %a, double %b, i64 %i2, i64 *%ptr) {
 ; CHECK-LABEL: f9:
 ; CHECK: cg %r2, 0(%r3)
-; CHECK-NEXT: jh {{\.L.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i1 = load i64 , i64 *%ptr
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-08.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-08.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-08.ll
@@ -5,7 +5,7 @@
 ; Check CLGR.
 define double @f1(double %a, double %b, i64 %i1, i64 %i2) {
 ; CHECK-LABEL: f1:
-; CHECK: clgrjl %r2, %r3
+; CHECK: clgrbl %r2, %r3, 0(%r14)
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ult i64 %i1, %i2
@@ -17,7 +17,7 @@
 define double @f2(double %a, double %b, i64 %i1, i64 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: clg %r2, 0(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i2 = load i64 , i64 *%ptr
@@ -30,7 +30,7 @@
 define double @f3(double %a, double %b, i64 %i1, i64 *%base) {
 ; CHECK-LABEL: f3:
 ; CHECK: clg %r2, 524280(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 65535
@@ -46,7 +46,7 @@
 ; CHECK-LABEL: f4:
 ; CHECK: agfi %r3, 524288
 ; CHECK: clg %r2, 0(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 65536
@@ -60,7 +60,7 @@
 define double @f5(double %a, double %b, i64 %i1, i64 *%base) {
 ; CHECK-LABEL: f5:
 ; CHECK: clg %r2, -8(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 -1
@@ -74,7 +74,7 @@
 define double @f6(double %a, double %b, i64 %i1, i64 *%base) {
 ; CHECK-LABEL: f6:
 ; CHECK: clg %r2, -524288(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 -65536
@@ -90,7 +90,7 @@
 ; CHECK-LABEL: f7:
 ; CHECK: agfi %r3, -524296
 ; CHECK: clg %r2, 0(%r3)
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 -65537
@@ -104,7 +104,7 @@
 define double @f8(double %a, double %b, i64 %i1, i64 %base, i64 %index) {
 ; CHECK-LABEL: f8:
 ; CHECK: clg %r2, 524280({{%r4,%r3|%r3,%r4}})
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %add1 = add i64 %base, %index
@@ -120,7 +120,7 @@
 define double @f9(double %a, double %b, i64 %i2, i64 *%ptr) {
 ; CHECK-LABEL: f9:
 ; CHECK: clg %r2, 0(%r3)
-; CHECK-NEXT: jh {{\.L.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %i1 = load i64 , i64 *%ptr
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-09.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-09.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-09.ll
@@ -9,7 +9,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i32 %i1, 0
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -20,7 +21,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i32 %i1, 2
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -31,7 +33,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i32 %i1, 127
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -43,7 +46,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i32 %i1, 128
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -55,7 +59,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i32 %i1, 32767
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -67,7 +72,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i32 %i1, 32768
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -79,7 +85,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i32 %i1, 2147483647
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -91,7 +98,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i32 %i1, 2147483648
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -102,7 +110,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i32 %i1, -1
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -113,7 +122,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i32 %i1, -128
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -125,7 +135,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i32 %i1, -129
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -137,7 +148,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i32 %i1, -32768
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -149,7 +161,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i32 %i1, -32769
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -161,7 +174,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i32 %i1, -2147483648
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -173,7 +187,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i32 %i1, -2147483649
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -184,7 +199,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i32 %i1, 1
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -195,7 +211,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp sge i32 %i1, 1
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -206,7 +223,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp sgt i32 %i1, -1
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -217,6 +235,7 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp sle i32 %i1, -1
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-10.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-10.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-10.ll
@@ -10,7 +10,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ugt i32 %i1, 1
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -21,7 +22,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ult i32 %i1, 255
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -33,7 +35,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ult i32 %i1, 256
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -45,6 +48,7 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ult i32 %i1, 4294967280
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-11.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-11.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-11.ll
@@ -9,7 +9,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i64 %i1, 0
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -20,7 +21,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i64 %i1, 1
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -31,7 +33,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i64 %i1, 127
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -43,7 +46,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i64 %i1, 128
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -55,7 +59,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i64 %i1, 32767
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -67,7 +72,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i64 %i1, 32768
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -79,7 +85,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i64 %i1, 2147483647
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -90,7 +97,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i64 %i1, 2147483648
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -101,7 +109,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i64 %i1, -1
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -112,7 +121,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i64 %i1, -128
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -124,7 +134,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i64 %i1, -129
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -136,7 +147,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i64 %i1, -32768
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -148,7 +160,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i64 %i1, -32769
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -160,7 +173,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i64 %i1, -2147483648
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -171,6 +185,7 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp slt i64 %i1, -2147483649
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-12.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-12.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-12.ll
@@ -10,7 +10,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ugt i64 %i1, 1
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -21,7 +22,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ult i64 %i1, 255
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -33,7 +35,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ult i64 %i1, 256
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -45,7 +48,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ult i64 %i1, 4294967295
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -57,7 +61,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ult i64 %i1, 4294967296
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 ; Check the next value up, which must use a register comparison.
@@ -67,6 +72,7 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ult i64 %i1, 4294967297
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-13.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-13.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-13.ll
@@ -9,7 +9,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i64 %i1, 0
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -20,7 +21,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i64 %i1, 127
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -32,7 +34,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i64 %i1, 128
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -44,7 +47,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i64 %i1, 32767
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -56,7 +60,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i64 %i1, 32768
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -68,7 +73,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i64 %i1, 2147483647
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -80,7 +86,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i64 %i1, 2147483648
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -92,7 +99,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i64 %i1, 4294967295
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -103,7 +111,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i64 %i1, 4294967296
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -114,7 +123,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i64 %i1, -1
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -125,7 +135,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i64 %i1, -128
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -137,7 +148,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i64 %i1, -129
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -149,7 +161,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i64 %i1, -32768
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -161,7 +174,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i64 %i1, -32769
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -173,7 +187,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i64 %i1, -2147483648
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -184,6 +199,7 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp eq i64 %i1, -2147483649
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-14.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-14.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-14.ll
@@ -9,7 +9,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ne i64 %i1, 0
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -20,7 +21,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ne i64 %i1, 127
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -32,7 +34,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ne i64 %i1, 128
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -44,7 +47,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ne i64 %i1, 32767
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -56,7 +60,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ne i64 %i1, 32768
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -68,7 +73,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ne i64 %i1, 2147483647
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -80,7 +86,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ne i64 %i1, 2147483648
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -92,7 +99,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ne i64 %i1, 4294967295
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -103,7 +111,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ne i64 %i1, 4294967296
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -114,7 +123,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ne i64 %i1, -1
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -125,7 +135,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ne i64 %i1, -128
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -137,7 +148,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ne i64 %i1, -129
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -149,7 +161,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ne i64 %i1, -32768
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -161,7 +174,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ne i64 %i1, -32769
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -173,7 +187,8 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ne i64 %i1, -2147483648
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
 
@@ -184,6 +199,7 @@
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %cond = icmp ne i64 %i1, -2147483649
-  %res = select i1 %cond, double %a, double %b
+  %tmp = select i1 %cond, double %a, double %b
+  %res = fadd double %tmp, 1.0
   ret double %res
 }
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-15.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-15.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-15.ll
@@ -6,7 +6,7 @@
 define double @f1(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: cli 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %cond = icmp ugt i8 %val, 1
@@ -18,7 +18,7 @@
 define double @f2(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: cli 0(%r2), 254
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %cond = icmp ult i8 %val, 254
@@ -30,7 +30,7 @@
 define double @f3(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f3:
 ; CHECK: cli 0(%r2), 127
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %cond = icmp slt i8 %val, 0
@@ -42,7 +42,7 @@
 define double @f4(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f4:
 ; CHECK: cli 0(%r2), 127
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %cond = icmp sle i8 %val, -1
@@ -54,7 +54,7 @@
 define double @f5(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f5:
 ; CHECK: cli 0(%r2), 128
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %cond = icmp sge i8 %val, 0
@@ -66,7 +66,7 @@
 define double @f6(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f6:
 ; CHECK: cli 0(%r2), 128
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %cond = icmp sgt i8 %val, -1
@@ -78,7 +78,7 @@
 define double @f7(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f7:
 ; CHECK: cli 0(%r2), 128
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %cond = icmp eq i8 %val, -128
@@ -90,7 +90,7 @@
 define double @f8(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f8:
 ; CHECK: cli 0(%r2), 0
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %cond = icmp eq i8 %val, 0
@@ -102,7 +102,7 @@
 define double @f9(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f9:
 ; CHECK: cli 0(%r2), 127
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %cond = icmp eq i8 %val, 127
@@ -114,7 +114,7 @@
 define double @f10(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f10:
 ; CHECK: cli 0(%r2), 255
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %cond = icmp eq i8 %val, 255
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-16.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-16.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-16.ll
@@ -7,7 +7,7 @@
 define double @f1(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: cli 0(%r2), 0
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = zext i8 %val to i32
@@ -20,7 +20,7 @@
 define double @f2(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: cli 0(%r2), 255
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = zext i8 %val to i32
@@ -58,7 +58,7 @@
 define double @f5(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f5:
 ; CHECK: cli 0(%r2), 0
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i32
@@ -71,7 +71,7 @@
 define double @f6(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f6:
 ; CHECK: cli 0(%r2), 127
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i32
@@ -97,7 +97,7 @@
 define double @f8(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f8:
 ; CHECK: cli 0(%r2), 255
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i32
@@ -110,7 +110,7 @@
 define double @f9(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f9:
 ; CHECK: cli 0(%r2), 128
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i32
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-17.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-17.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-17.ll
@@ -7,7 +7,7 @@
 define double @f1(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: cli 0(%r2), 0
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = zext i8 %val to i32
@@ -20,7 +20,7 @@
 define double @f2(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: cli 0(%r2), 255
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = zext i8 %val to i32
@@ -58,7 +58,7 @@
 define double @f5(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f5:
 ; CHECK: cli 0(%r2), 0
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i32
@@ -71,7 +71,7 @@
 define double @f6(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f6:
 ; CHECK: cli 0(%r2), 127
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i32
@@ -97,7 +97,7 @@
 define double @f8(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f8:
 ; CHECK: cli 0(%r2), 255
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i32
@@ -110,7 +110,7 @@
 define double @f9(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f9:
 ; CHECK: cli 0(%r2), 128
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i32
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-18.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-18.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-18.ll
@@ -7,7 +7,7 @@
 define double @f1(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: cli 0(%r2), 0
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = zext i8 %val to i64
@@ -20,7 +20,7 @@
 define double @f2(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: cli 0(%r2), 255
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = zext i8 %val to i64
@@ -58,7 +58,7 @@
 define double @f5(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f5:
 ; CHECK: cli 0(%r2), 0
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i64
@@ -71,7 +71,7 @@
 define double @f6(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f6:
 ; CHECK: cli 0(%r2), 127
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i64
@@ -97,7 +97,7 @@
 define double @f8(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f8:
 ; CHECK: cli 0(%r2), 255
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i64
@@ -110,7 +110,7 @@
 define double @f9(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f9:
 ; CHECK: cli 0(%r2), 128
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i64
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-19.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-19.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-19.ll
@@ -7,7 +7,7 @@
 define double @f1(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: cli 0(%r2), 0
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = zext i8 %val to i64
@@ -20,7 +20,7 @@
 define double @f2(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: cli 0(%r2), 255
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = zext i8 %val to i64
@@ -58,7 +58,7 @@
 define double @f5(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f5:
 ; CHECK: cli 0(%r2), 0
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i64
@@ -71,7 +71,7 @@
 define double @f6(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f6:
 ; CHECK: cli 0(%r2), 127
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i64
@@ -97,7 +97,7 @@
 define double @f8(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f8:
 ; CHECK: cli 0(%r2), 255
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i64
@@ -110,7 +110,7 @@
 define double @f9(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f9:
 ; CHECK: cli 0(%r2), 128
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i64
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-20.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-20.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-20.ll
@@ -8,7 +8,7 @@
 define double @f1(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: cli 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = zext i8 %val to i32
@@ -22,7 +22,7 @@
 define double @f2(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: cli 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i32
@@ -36,7 +36,7 @@
 define double @f3(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f3:
 ; CHECK: cli 0(%r2), 254
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = zext i8 %val to i32
@@ -50,7 +50,7 @@
 define double @f4(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f4:
 ; CHECK: cli 0(%r2), 254
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i32
@@ -105,7 +105,7 @@
 define double @f8(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f8:
 ; CHECK: cli 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = zext i8 %val to i32
@@ -132,7 +132,7 @@
 define double @f10(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f10:
 ; CHECK: cli 0(%r2), 254
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = zext i8 %val to i32
@@ -171,7 +171,7 @@
 define double @f13(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f13:
 ; CHECK: cli 0(%r2), 128
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i32
@@ -184,7 +184,7 @@
 define double @f14(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f14:
 ; CHECK: cli 0(%r2), 128
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i32
@@ -197,7 +197,7 @@
 define double @f15(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f15:
 ; CHECK: cli 0(%r2), 127
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i32
@@ -210,7 +210,7 @@
 define double @f16(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f16:
 ; CHECK: cli 0(%r2), 127
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i32
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-21.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-21.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-21.ll
@@ -8,7 +8,7 @@
 define double @f1(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: cli 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = zext i8 %val to i64
@@ -22,7 +22,7 @@
 define double @f2(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: cli 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i64
@@ -36,7 +36,7 @@
 define double @f3(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f3:
 ; CHECK: cli 0(%r2), 254
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = zext i8 %val to i64
@@ -50,7 +50,7 @@
 define double @f4(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f4:
 ; CHECK: cli 0(%r2), 254
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i64
@@ -105,7 +105,7 @@
 define double @f8(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f8:
 ; CHECK: cli 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = zext i8 %val to i64
@@ -132,7 +132,7 @@
 define double @f10(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f10:
 ; CHECK: cli 0(%r2), 254
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = zext i8 %val to i64
@@ -171,7 +171,7 @@
 define double @f13(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f13:
 ; CHECK: cli 0(%r2), 128
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i64
@@ -184,7 +184,7 @@
 define double @f14(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f14:
 ; CHECK: cli 0(%r2), 128
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i64
@@ -197,7 +197,7 @@
 define double @f15(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f15:
 ; CHECK: cli 0(%r2), 127
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i64
@@ -210,7 +210,7 @@
 define double @f16(double %a, double %b, i8 *%ptr) {
 ; CHECK-LABEL: f16:
 ; CHECK: cli 0(%r2), 127
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i8 , i8 *%ptr
   %ext = sext i8 %val to i64
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-22.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-22.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-22.ll
@@ -6,7 +6,7 @@
 define double @f1(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: chhsi 0(%r2), 0
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
@@ -19,7 +19,7 @@
 define double @f2(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: chhsi 0(%r2), 0
-; CHECK-NEXT: jle
+; CHECK-NEXT: bler %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
@@ -32,7 +32,7 @@
 define double @f3(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f3:
 ; CHECK: chhsi 0(%r2), 32766
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
@@ -45,7 +45,7 @@
 define double @f4(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f4:
 ; CHECK: chhsi 0(%r2), -1
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
@@ -58,7 +58,7 @@
 define double @f5(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f5:
 ; CHECK: chhsi 0(%r2), -32766
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
@@ -71,7 +71,7 @@
 define double @f6(double %a, double %b, i16 %i1, i16 *%base) {
 ; CHECK-LABEL: f6:
 ; CHECK: chhsi 4094(%r3), 0
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i16, i16 *%base, i64 2047
@@ -86,7 +86,7 @@
 ; CHECK-LABEL: f7:
 ; CHECK: aghi %r2, 4096
 ; CHECK: chhsi 0(%r2), 0
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i16, i16 *%base, i64 2048
@@ -101,7 +101,7 @@
 ; CHECK-LABEL: f8:
 ; CHECK: aghi %r2, -2
 ; CHECK: chhsi 0(%r2), 0
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i16, i16 *%base, i64 -1
@@ -116,7 +116,7 @@
 ; CHECK-LABEL: f9:
 ; CHECK: agr {{%r2, %r3|%r3, %r2}}
 ; CHECK: chhsi 0({{%r[23]}}), 0
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %add = add i64 %base, %index
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-23.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-23.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-23.ll
@@ -6,7 +6,7 @@
 define double @f1(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: clhhsi 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
@@ -19,7 +19,7 @@
 define double @f2(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: clhhsi 0(%r2), 65534
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
@@ -32,7 +32,7 @@
 define double @f3(double %a, double %b, i16 %i1, i16 *%base) {
 ; CHECK-LABEL: f3:
 ; CHECK: clhhsi 4094(%r3), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i16, i16 *%base, i64 2047
@@ -47,7 +47,7 @@
 ; CHECK-LABEL: f4:
 ; CHECK: aghi %r2, 4096
 ; CHECK: clhhsi 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i16, i16 *%base, i64 2048
@@ -62,7 +62,7 @@
 ; CHECK-LABEL: f5:
 ; CHECK: aghi %r2, -2
 ; CHECK: clhhsi 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i16, i16 *%base, i64 -1
@@ -77,7 +77,7 @@
 ; CHECK-LABEL: f6:
 ; CHECK: agr {{%r2, %r3|%r3, %r2}}
 ; CHECK: clhhsi 0({{%r[23]}}), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %add = add i64 %base, %index
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-24.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-24.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-24.ll
@@ -6,7 +6,7 @@
 define double @f1(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: clhhsi 0(%r2), 0
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
@@ -19,7 +19,7 @@
 define double @f2(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: clhhsi 0(%r2), 65535
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
@@ -32,7 +32,7 @@
 define double @f3(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f3:
 ; CHECK: clhhsi 0(%r2), 32768
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
@@ -45,7 +45,7 @@
 define double @f4(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f4:
 ; CHECK: clhhsi 0(%r2), 32767
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-25.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-25.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-25.ll
@@ -6,7 +6,7 @@
 define double @f1(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: clhhsi 0(%r2), 0
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
@@ -19,7 +19,7 @@
 define double @f2(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: clhhsi 0(%r2), 65535
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
@@ -32,7 +32,7 @@
 define double @f3(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f3:
 ; CHECK: clhhsi 0(%r2), 32768
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
@@ -45,7 +45,7 @@
 define double @f4(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f4:
 ; CHECK: clhhsi 0(%r2), 32767
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-26.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-26.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-26.ll
@@ -7,7 +7,7 @@
 define double @f1(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: clhhsi 0(%r2), 0
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = zext i16 %val to i32
@@ -20,7 +20,7 @@
 define double @f2(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: clhhsi 0(%r2), 65535
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = zext i16 %val to i32
@@ -58,7 +58,7 @@
 define double @f5(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f5:
 ; CHECK: clhhsi 0(%r2), 0
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i32
@@ -71,7 +71,7 @@
 define double @f6(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f6:
 ; CHECK: clhhsi 0(%r2), 32767
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i32
@@ -97,7 +97,7 @@
 define double @f8(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f8:
 ; CHECK: clhhsi 0(%r2), 65535
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i32
@@ -110,7 +110,7 @@
 define double @f9(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f9:
 ; CHECK: clhhsi 0(%r2), 32768
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i32
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-27.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-27.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-27.ll
@@ -7,7 +7,7 @@
 define double @f1(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: clhhsi 0(%r2), 0
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = zext i16 %val to i32
@@ -20,7 +20,7 @@
 define double @f2(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: clhhsi 0(%r2), 65535
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = zext i16 %val to i32
@@ -58,7 +58,7 @@
 define double @f5(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f5:
 ; CHECK: clhhsi 0(%r2), 0
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i32
@@ -71,7 +71,7 @@
 define double @f6(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f6:
 ; CHECK: clhhsi 0(%r2), 32767
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i32
@@ -97,7 +97,7 @@
 define double @f8(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f8:
 ; CHECK: clhhsi 0(%r2), 65535
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i32
@@ -110,7 +110,7 @@
 define double @f9(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f9:
 ; CHECK: clhhsi 0(%r2), 32768
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i32
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-28.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-28.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-28.ll
@@ -7,7 +7,7 @@
 define double @f1(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: clhhsi 0(%r2), 0
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = zext i16 %val to i64
@@ -20,7 +20,7 @@
 define double @f2(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: clhhsi 0(%r2), 65535
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = zext i16 %val to i64
@@ -58,7 +58,7 @@
 define double @f5(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f5:
 ; CHECK: clhhsi 0(%r2), 0
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i64
@@ -71,7 +71,7 @@
 define double @f6(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f6:
 ; CHECK: clhhsi 0(%r2), 32767
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i64
@@ -97,7 +97,7 @@
 define double @f8(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f8:
 ; CHECK: clhhsi 0(%r2), 65535
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i64
@@ -110,7 +110,7 @@
 define double @f9(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f9:
 ; CHECK: clhhsi 0(%r2), 32768
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i64
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-29.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-29.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-29.ll
@@ -7,7 +7,7 @@
 define double @f1(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: clhhsi 0(%r2), 0
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = zext i16 %val to i64
@@ -20,7 +20,7 @@
 define double @f2(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: clhhsi 0(%r2), 65535
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = zext i16 %val to i64
@@ -58,7 +58,7 @@
 define double @f5(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f5:
 ; CHECK: clhhsi 0(%r2), 0
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i64
@@ -71,7 +71,7 @@
 define double @f6(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f6:
 ; CHECK: clhhsi 0(%r2), 32767
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i64
@@ -97,7 +97,7 @@
 define double @f8(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f8:
 ; CHECK: clhhsi 0(%r2), 65535
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i64
@@ -110,7 +110,7 @@
 define double @f9(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f9:
 ; CHECK: clhhsi 0(%r2), 32768
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i64
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-30.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-30.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-30.ll
@@ -8,7 +8,7 @@
 define double @f1(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: clhhsi 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = zext i16 %val to i32
@@ -22,7 +22,7 @@
 define double @f2(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: clhhsi 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i32
@@ -36,7 +36,7 @@
 define double @f3(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f3:
 ; CHECK: clhhsi 0(%r2), 65534
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = zext i16 %val to i32
@@ -50,7 +50,7 @@
 define double @f4(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f4:
 ; CHECK: clhhsi 0(%r2), 65534
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i32
@@ -106,7 +106,7 @@
 define double @f8(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f8:
 ; CHECK: clhhsi 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = zext i16 %val to i32
@@ -120,7 +120,7 @@
 define double @f9(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f9:
 ; CHECK: chhsi 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i32
@@ -134,7 +134,7 @@
 define double @f10(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f10:
 ; CHECK: clhhsi 0(%r2), 65534
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = zext i16 %val to i32
@@ -148,7 +148,7 @@
 define double @f11(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f11:
 ; CHECK: chhsi 0(%r2), -2
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i32
@@ -175,7 +175,7 @@
 define double @f13(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f13:
 ; CHECK: chhsi 0(%r2), 32766
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i32
@@ -202,7 +202,7 @@
 define double @f15(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f15:
 ; CHECK: chhsi 0(%r2), -32767
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i32
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-31.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-31.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-31.ll
@@ -8,7 +8,7 @@
 define double @f1(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: clhhsi 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = zext i16 %val to i64
@@ -22,7 +22,7 @@
 define double @f2(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: clhhsi 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i64
@@ -36,7 +36,7 @@
 define double @f3(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f3:
 ; CHECK: clhhsi 0(%r2), 65534
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = zext i16 %val to i64
@@ -50,7 +50,7 @@
 define double @f4(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f4:
 ; CHECK: clhhsi 0(%r2), 65534
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i64
@@ -106,7 +106,7 @@
 define double @f8(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f8:
 ; CHECK: clhhsi 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = zext i16 %val to i64
@@ -120,7 +120,7 @@
 define double @f9(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f9:
 ; CHECK: chhsi 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i64
@@ -134,7 +134,7 @@
 define double @f10(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f10:
 ; CHECK: clhhsi 0(%r2), 65534
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = zext i16 %val to i64
@@ -148,7 +148,7 @@
 define double @f11(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f11:
 ; CHECK: chhsi 0(%r2), -2
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i64
@@ -175,7 +175,7 @@
 define double @f13(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f13:
 ; CHECK: chhsi 0(%r2), 32766
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i64
@@ -202,7 +202,7 @@
 define double @f15(double %a, double %b, i16 *%ptr) {
 ; CHECK-LABEL: f15:
 ; CHECK: chhsi 0(%r2), -32767
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
   %val = load i16 , i16 *%ptr
   %ext = sext i16 %val to i64
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-32.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-32.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-32.ll
@@ -6,7 +6,7 @@
 define double @f1(double %a, double %b, i32 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: chsi 0(%r2), 0
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i32 , i32 *%ptr
@@ -19,7 +19,7 @@
 define double @f2(double %a, double %b, i32 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: chsi 0(%r2), 0
-; CHECK-NEXT: jle
+; CHECK-NEXT: bler %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i32 , i32 *%ptr
@@ -32,7 +32,7 @@
 define double @f3(double %a, double %b, i32 *%ptr) {
 ; CHECK-LABEL: f3:
 ; CHECK: chsi 0(%r2), 32767
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i32 , i32 *%ptr
@@ -56,7 +56,7 @@
 define double @f5(double %a, double %b, i32 *%ptr) {
 ; CHECK-LABEL: f5:
 ; CHECK: chsi 0(%r2), -1
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i32 , i32 *%ptr
@@ -69,7 +69,7 @@
 define double @f6(double %a, double %b, i32 *%ptr) {
 ; CHECK-LABEL: f6:
 ; CHECK: chsi 0(%r2), -32768
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i32 , i32 *%ptr
@@ -93,7 +93,7 @@
 define double @f8(double %a, double %b, i32 *%ptr) {
 ; CHECK-LABEL: f8:
 ; CHECK: chsi 0(%r2), 0
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i32 , i32 *%ptr
@@ -106,7 +106,7 @@
 define double @f9(double %a, double %b, i32 *%ptr) {
 ; CHECK-LABEL: f9:
 ; CHECK: chsi 0(%r2), 1
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i32 , i32 *%ptr
@@ -119,7 +119,7 @@
 define double @f10(double %a, double %b, i32 *%ptr) {
 ; CHECK-LABEL: f10:
 ; CHECK: chsi 0(%r2), 32767
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i32 , i32 *%ptr
@@ -143,7 +143,7 @@
 define double @f12(double %a, double %b, i32 *%ptr) {
 ; CHECK-LABEL: f12:
 ; CHECK: chsi 0(%r2), -1
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i32 , i32 *%ptr
@@ -156,7 +156,7 @@
 define double @f13(double %a, double %b, i32 *%ptr) {
 ; CHECK-LABEL: f13:
 ; CHECK: chsi 0(%r2), -32768
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i32 , i32 *%ptr
@@ -180,7 +180,7 @@
 define double @f15(double %a, double %b, i32 %i1, i32 *%base) {
 ; CHECK-LABEL: f15:
 ; CHECK: chsi 4092(%r3), 0
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 1023
@@ -195,7 +195,7 @@
 ; CHECK-LABEL: f16:
 ; CHECK: aghi %r2, 4096
 ; CHECK: chsi 0(%r2), 0
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 1024
@@ -210,7 +210,7 @@
 ; CHECK-LABEL: f17:
 ; CHECK: aghi %r2, -4
 ; CHECK: chsi 0(%r2), 0
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 -1
@@ -225,7 +225,7 @@
 ; CHECK-LABEL: f18:
 ; CHECK: agr {{%r2, %r3|%r3, %r2}}
 ; CHECK: chsi 0({{%r[23]}}), 0
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %add = add i64 %base, %index
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-33.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-33.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-33.ll
@@ -7,7 +7,7 @@
 define double @f1(double %a, double %b, i32 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: clfhsi 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i32 , i32 *%ptr
@@ -20,7 +20,7 @@
 define double @f2(double %a, double %b, i32 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: clfhsi 0(%r2), 65535
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i32 , i32 *%ptr
@@ -45,7 +45,7 @@
 define double @f4(double %a, double %b, i32 *%ptr) {
 ; CHECK-LABEL: f4:
 ; CHECK: clfhsi 0(%r2), 32768
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i32 , i32 *%ptr
@@ -58,7 +58,7 @@
 define double @f5(double %a, double %b, i32 *%ptr) {
 ; CHECK-LABEL: f5:
 ; CHECK: clfhsi 0(%r2), 65535
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i32 , i32 *%ptr
@@ -82,7 +82,7 @@
 define double @f7(double %a, double %b, i32 %i1, i32 *%base) {
 ; CHECK-LABEL: f7:
 ; CHECK: clfhsi 4092(%r3), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 1023
@@ -97,7 +97,7 @@
 ; CHECK-LABEL: f8:
 ; CHECK: aghi %r2, 4096
 ; CHECK: clfhsi 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 1024
@@ -112,7 +112,7 @@
 ; CHECK-LABEL: f9:
 ; CHECK: aghi %r2, -4
 ; CHECK: clfhsi 0(%r2), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i32, i32 *%base, i64 -1
@@ -127,7 +127,7 @@
 ; CHECK-LABEL: f10:
 ; CHECK: agr {{%r2, %r3|%r3, %r2}}
 ; CHECK: clfhsi 0({{%r[23]}}), 1
-; CHECK-NEXT: jh
+; CHECK-NEXT: bhr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %add = add i64 %base, %index
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-34.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-34.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-34.ll
@@ -6,7 +6,7 @@
 define double @f1(double %a, double %b, i64 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: cghsi 0(%r2), 0
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i64 , i64 *%ptr
@@ -19,7 +19,7 @@
 define double @f2(double %a, double %b, i64 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: cghsi 0(%r2), 0
-; CHECK-NEXT: jle
+; CHECK-NEXT: bler %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i64 , i64 *%ptr
@@ -32,7 +32,7 @@
 define double @f3(double %a, double %b, i64 *%ptr) {
 ; CHECK-LABEL: f3:
 ; CHECK: cghsi 0(%r2), 32767
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i64 , i64 *%ptr
@@ -56,7 +56,7 @@
 define double @f5(double %a, double %b, i64 *%ptr) {
 ; CHECK-LABEL: f5:
 ; CHECK: cghsi 0(%r2), -1
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i64 , i64 *%ptr
@@ -69,7 +69,7 @@
 define double @f6(double %a, double %b, i64 *%ptr) {
 ; CHECK-LABEL: f6:
 ; CHECK: cghsi 0(%r2), -32768
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i64 , i64 *%ptr
@@ -93,7 +93,7 @@
 define double @f8(double %a, double %b, i64 *%ptr) {
 ; CHECK-LABEL: f8:
 ; CHECK: cghsi 0(%r2), 0
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i64 , i64 *%ptr
@@ -106,7 +106,7 @@
 define double @f9(double %a, double %b, i64 *%ptr) {
 ; CHECK-LABEL: f9:
 ; CHECK: cghsi 0(%r2), 1
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i64 , i64 *%ptr
@@ -119,7 +119,7 @@
 define double @f10(double %a, double %b, i64 *%ptr) {
 ; CHECK-LABEL: f10:
 ; CHECK: cghsi 0(%r2), 32767
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i64 , i64 *%ptr
@@ -143,7 +143,7 @@
 define double @f12(double %a, double %b, i64 *%ptr) {
 ; CHECK-LABEL: f12:
 ; CHECK: cghsi 0(%r2), -1
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i64 , i64 *%ptr
@@ -156,7 +156,7 @@
 define double @f13(double %a, double %b, i64 *%ptr) {
 ; CHECK-LABEL: f13:
 ; CHECK: cghsi 0(%r2), -32768
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i64 , i64 *%ptr
@@ -180,7 +180,7 @@
 define double @f15(double %a, double %b, i64 %i1, i64 *%base) {
 ; CHECK-LABEL: f15:
 ; CHECK: cghsi 4088(%r3), 0
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 511
@@ -195,7 +195,7 @@
 ; CHECK-LABEL: f16:
 ; CHECK: aghi %r2, 4096
 ; CHECK: cghsi 0(%r2), 0
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 512
@@ -210,7 +210,7 @@
 ; CHECK-LABEL: f17:
 ; CHECK: aghi %r2, -8
 ; CHECK: cghsi 0(%r2), 0
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 -1
@@ -225,7 +225,7 @@
 ; CHECK-LABEL: f18:
 ; CHECK: agr {{%r2, %r3|%r3, %r2}}
 ; CHECK: cghsi 0({{%r[23]}}), 0
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %add = add i64 %base, %index
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-35.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-35.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-35.ll
@@ -7,7 +7,7 @@
 define double @f1(double %a, double %b, i64 *%ptr) {
 ; CHECK-LABEL: f1:
 ; CHECK: clghsi 0(%r2), 2
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i64 , i64 *%ptr
@@ -20,7 +20,7 @@
 define double @f2(double %a, double %b, i64 *%ptr) {
 ; CHECK-LABEL: f2:
 ; CHECK: clghsi 0(%r2), 65535
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i64 , i64 *%ptr
@@ -45,7 +45,7 @@
 define double @f4(double %a, double %b, i64 *%ptr) {
 ; CHECK-LABEL: f4:
 ; CHECK: clghsi 0(%r2), 32768
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i64 , i64 *%ptr
@@ -58,7 +58,7 @@
 define double @f5(double %a, double %b, i64 *%ptr) {
 ; CHECK-LABEL: f5:
 ; CHECK: clghsi 0(%r2), 65535
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %val = load i64 , i64 *%ptr
@@ -82,7 +82,7 @@
 define double @f7(double %a, double %b, i64 %i1, i64 *%base) {
 ; CHECK-LABEL: f7:
 ; CHECK: clghsi 4088(%r3), 2
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 511
@@ -97,7 +97,7 @@
 ; CHECK-LABEL: f8:
 ; CHECK: aghi %r2, 4096
 ; CHECK: clghsi 0(%r2), 2
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 512
@@ -112,7 +112,7 @@
 ; CHECK-LABEL: f9:
 ; CHECK: aghi %r2, -8
 ; CHECK: clghsi 0(%r2), 2
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %ptr = getelementptr i64, i64 *%base, i64 -1
@@ -127,7 +127,7 @@
 ; CHECK-LABEL: f10:
 ; CHECK: agr {{%r2, %r3|%r3, %r2}}
 ; CHECK: clghsi 0({{%r[23]}}), 2
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: ldr %f0, %f2
 ; CHECK: br %r14
   %add = add i64 %base, %index
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-36.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-36.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-36.ll
@@ -10,7 +10,7 @@
 define i32 @f1(i32 %src1) {
 ; CHECK-LABEL: f1:
 ; CHECK: chrl %r2, g
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %val = load i16 , i16 *@g
@@ -47,7 +47,7 @@
 define i32 @f3(i32 %src1) {
 ; CHECK-LABEL: f3:
 ; CHECK: chrl %r2, g
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
 entry:
   %val = load i16 , i16 *@g
@@ -66,7 +66,7 @@
 define i32 @f4(i32 %src1) {
 ; CHECK-LABEL: f4:
 ; CHECK: chrl %r2, g
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
 entry:
   %val = load i16 , i16 *@g
@@ -86,7 +86,7 @@
 ; CHECK-LABEL: f5:
 ; CHECK: lgrl [[REG:%r[0-5]]], h@GOT
 ; CHECK: ch %r2, 0([[REG]])
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %val = load i16 , i16 *@h, align 1
@@ -105,7 +105,7 @@
 define i32 @f6(i32 %src2) {
 ; CHECK-LABEL: f6:
 ; CHECK: chrl %r2, g
-; CHECK-NEXT: jh {{\.L.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
 entry:
   %val = load i16 , i16 *@g
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-37.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-37.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-37.ll
@@ -21,7 +21,8 @@
   %mul = mul i32 %src1, %src1
   br label %exit
 exit:
-  %res = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
+  %tmp = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
+  %res = add i32 %tmp, 1
   ret i32 %res
 }
 
@@ -39,7 +40,8 @@
   %mul = mul i32 %src1, %src1
   br label %exit
 exit:
-  %res = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
+  %tmp = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
+  %res = add i32 %tmp, 1
   ret i32 %res
 }
 
@@ -58,7 +60,8 @@
   %mul = mul i32 %src1, %src1
   br label %exit
 exit:
-  %res = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
+  %tmp = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
+  %res = add i32 %tmp, 1
   ret i32 %res
 }
 
@@ -77,7 +80,8 @@
   %mul = mul i32 %src1, %src1
   br label %exit
 exit:
-  %res = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
+  %tmp = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
+  %res = add i32 %tmp, 1
   ret i32 %res
 }
 
@@ -97,7 +101,8 @@
   %mul = mul i32 %src1, %src1
   br label %exit
 exit:
-  %res = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
+  %tmp = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
+  %res = add i32 %tmp, 1
   ret i32 %res
 }
 
@@ -116,6 +121,7 @@
   %mul = mul i32 %src2, %src2
   br label %exit
 exit:
-  %res = phi i32 [ %src2, %entry ], [ %mul, %mulb ]
+  %tmp = phi i32 [ %src2, %entry ], [ %mul, %mulb ]
+  %res = add i32 %tmp, 1
   ret i32 %res
 }
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-38.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-38.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-38.ll
@@ -10,7 +10,7 @@
 define i32 @f1(i32 %src1) {
 ; CHECK-LABEL: f1:
 ; CHECK: crl %r2, g
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %src2 = load i32 , i32 *@g
@@ -28,7 +28,7 @@
 define i32 @f2(i32 %src1) {
 ; CHECK-LABEL: f2:
 ; CHECK: clrl %r2, g
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %src2 = load i32 , i32 *@g
@@ -46,7 +46,7 @@
 define i32 @f3(i32 %src1) {
 ; CHECK-LABEL: f3:
 ; CHECK: c{{l?}}rl %r2, g
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
 entry:
   %src2 = load i32 , i32 *@g
@@ -64,7 +64,7 @@
 define i32 @f4(i32 %src1) {
 ; CHECK-LABEL: f4:
 ; CHECK: c{{l?}}rl %r2, g
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
 entry:
   %src2 = load i32 , i32 *@g
@@ -83,7 +83,7 @@
 ; CHECK-LABEL: f5:
 ; CHECK: larl [[REG:%r[0-5]]], h
 ; CHECK: c %r2, 0([[REG]])
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %src2 = load i32 , i32 *@h, align 2
@@ -102,7 +102,7 @@
 ; CHECK-LABEL: f6:
 ; CHECK: larl [[REG:%r[0-5]]], h
 ; CHECK: cl %r2, 0([[REG]])
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %src2 = load i32 , i32 *@h, align 2
@@ -120,7 +120,7 @@
 define i32 @f7(i32 %src2) {
 ; CHECK-LABEL: f7:
 ; CHECK: crl %r2, g
-; CHECK-NEXT: jh {{\.L.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
 entry:
   %src1 = load i32 , i32 *@g
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-39.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-39.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-39.ll
@@ -10,7 +10,7 @@
 define i64 @f1(i64 %src1) {
 ; CHECK-LABEL: f1:
 ; CHECK: cghrl %r2, g
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %val = load i16 , i16 *@g
@@ -47,7 +47,7 @@
 define i64 @f3(i64 %src1) {
 ; CHECK-LABEL: f3:
 ; CHECK: cghrl %r2, g
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
 entry:
   %val = load i16 , i16 *@g
@@ -66,7 +66,7 @@
 define i64 @f4(i64 %src1) {
 ; CHECK-LABEL: f4:
 ; CHECK: cghrl %r2, g
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
 entry:
   %val = load i16 , i16 *@g
@@ -86,7 +86,7 @@
 ; CHECK-LABEL: f5:
 ; CHECK: lgrl [[REG:%r[0-5]]], h@GOT
 ; CHECK: cgh %r2, 0([[REG]])
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %val = load i16 , i16 *@h, align 1
@@ -105,7 +105,7 @@
 define i64 @f6(i64 %src2) {
 ; CHECK-LABEL: f6:
 ; CHECK: cghrl %r2, g
-; CHECK-NEXT: jh {{\.L.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
 entry:
   %val = load i16 , i16 *@g
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-40.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-40.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-40.ll
@@ -21,7 +21,8 @@
   %mul = mul i64 %src1, %src1
   br label %exit
 exit:
-  %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
+  %tmp = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
+  %res = add i64 %tmp, 1
   ret i64 %res
 }
 
@@ -39,7 +40,8 @@
   %mul = mul i64 %src1, %src1
   br label %exit
 exit:
-  %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
+  %tmp = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
+  %res = add i64 %tmp, 1
   ret i64 %res
 }
 
@@ -58,7 +60,8 @@
   %mul = mul i64 %src1, %src1
   br label %exit
 exit:
-  %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
+  %tmp = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
+  %res = add i64 %tmp, 1
   ret i64 %res
 }
 
@@ -77,7 +80,8 @@
   %mul = mul i64 %src1, %src1
   br label %exit
 exit:
-  %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
+  %tmp = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
+  %res = add i64 %tmp, 1
   ret i64 %res
 }
 
@@ -97,7 +101,8 @@
   %mul = mul i64 %src1, %src1
   br label %exit
 exit:
-  %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
+  %tmp = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
+  %res = add i64 %tmp, 1
   ret i64 %res
 }
 
@@ -116,6 +121,7 @@
   %mul = mul i64 %src2, %src2
   br label %exit
 exit:
-  %res = phi i64 [ %src2, %entry ], [ %mul, %mulb ]
+  %tmp = phi i64 [ %src2, %entry ], [ %mul, %mulb ]
+  %res = add i64 %tmp, 1
   ret i64 %res
 }
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-41.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-41.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-41.ll
@@ -10,7 +10,7 @@
 define i64 @f1(i64 %src1) {
 ; CHECK-LABEL: f1:
 ; CHECK: cgfrl %r2, g
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %val = load i32 , i32 *@g
@@ -47,7 +47,7 @@
 define i64 @f3(i64 %src1) {
 ; CHECK-LABEL: f3:
 ; CHECK: cgfrl %r2, g
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
 entry:
   %val = load i32 , i32 *@g
@@ -66,7 +66,7 @@
 define i64 @f4(i64 %src1) {
 ; CHECK-LABEL: f4:
 ; CHECK: cgfrl %r2, g
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
 entry:
   %val = load i32 , i32 *@g
@@ -86,7 +86,7 @@
 ; CHECK-LABEL: f5:
 ; CHECK: larl [[REG:%r[0-5]]], h
 ; CHECK: cgf %r2, 0([[REG]])
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %val = load i32 , i32 *@h, align 2
@@ -105,7 +105,7 @@
 define i64 @f6(i64 %src2) {
 ; CHECK-LABEL: f6:
 ; CHECK: cgfrl %r2, g
-; CHECK-NEXT: jh {{\.L.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
 entry:
   %val = load i32 , i32 *@g
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-42.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-42.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-42.ll
@@ -10,7 +10,7 @@
 define i64 @f1(i64 %src1) {
 ; CHECK-LABEL: f1:
 ; CHECK: clgfrl %r2, g
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %val = load i32 , i32 *@g
@@ -47,7 +47,7 @@
 define i64 @f3(i64 %src1) {
 ; CHECK-LABEL: f3:
 ; CHECK: clgfrl %r2, g
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
 entry:
   %val = load i32 , i32 *@g
@@ -66,7 +66,7 @@
 define i64 @f4(i64 %src1) {
 ; CHECK-LABEL: f4:
 ; CHECK: clgfrl %r2, g
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
 entry:
   %val = load i32 , i32 *@g
@@ -86,7 +86,7 @@
 ; CHECK-LABEL: f5:
 ; CHECK: larl [[REG:%r[0-5]]], h
 ; CHECK: clgf %r2, 0([[REG]])
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %val = load i32 , i32 *@h, align 2
@@ -105,7 +105,7 @@
 define i64 @f6(i64 %src2) {
 ; CHECK-LABEL: f6:
 ; CHECK: clgfrl %r2, g
-; CHECK-NEXT: jh {{\.L.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
 entry:
   %val = load i32 , i32 *@g
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-43.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-43.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-43.ll
@@ -10,7 +10,7 @@
 define i64 @f1(i64 %src1) {
 ; CHECK-LABEL: f1:
 ; CHECK: cgrl %r2, g
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %src2 = load i64 , i64 *@g
@@ -28,7 +28,7 @@
 define i64 @f2(i64 %src1) {
 ; CHECK-LABEL: f2:
 ; CHECK: clgrl %r2, g
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %src2 = load i64 , i64 *@g
@@ -46,7 +46,7 @@
 define i64 @f3(i64 %src1) {
 ; CHECK-LABEL: f3:
 ; CHECK: c{{l?}}grl %r2, g
-; CHECK-NEXT: je
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
 entry:
   %src2 = load i64 , i64 *@g
@@ -64,7 +64,7 @@
 define i64 @f4(i64 %src1) {
 ; CHECK-LABEL: f4:
 ; CHECK: c{{l?}}grl %r2, g
-; CHECK-NEXT: jlh
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
 entry:
   %src2 = load i64 , i64 *@g
@@ -83,7 +83,7 @@
 ; CHECK-LABEL: f5:
 ; CHECK: larl [[REG:%r[0-5]]], h
 ; CHECK: cg %r2, 0([[REG]])
-; CHECK-NEXT: jl
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %src2 = load i64 , i64 *@h, align 4
@@ -101,7 +101,7 @@
 define i64 @f6(i64 %src2) {
 ; CHECK-LABEL: f6:
 ; CHECK: cgrl %r2, g
-; CHECK-NEXT: jh {{\.L.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
 entry:
   %src1 = load i64 , i64 *@g
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-44.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-44.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-44.ll
@@ -11,7 +11,7 @@
 define i32 @f1(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f1:
 ; CHECK: afi %r2, 1000000
-; CHECK-NEXT: je .L{{.*}}
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
 entry:
   %res = add i32 %a, 1000000
@@ -30,7 +30,7 @@
 define i32 @f2(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f2:
 ; CHECK: afi %r2, 1000000
-; CHECK-NEXT: jne .L{{.*}}
+; CHECK-NEXT: bner %r14
 ; CHECK: br %r14
 entry:
   %res = add i32 %a, 1000000
@@ -49,7 +49,7 @@
 define i32 @f3(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f3:
 ; CHECK: afi %r2, 1000000
-; CHECK-NEXT: cijl %r2, 0, .L{{.*}}
+; CHECK-NEXT: cibl %r2, 0, 0(%r14)
 ; CHECK: br %r14
 entry:
   %res = add i32 %a, 1000000
@@ -68,7 +68,7 @@
 define i32 @f4(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f4:
 ; CHECK: afi %r2, 1000000
-; CHECK-NEXT: cijle %r2, 0, .L{{.*}}
+; CHECK-NEXT: cible %r2, 0, 0(%r14)
 ; CHECK: br %r14
 entry:
   %res = add i32 %a, 1000000
@@ -87,7 +87,7 @@
 define i32 @f5(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f5:
 ; CHECK: afi %r2, 1000000
-; CHECK-NEXT: cijh %r2, 0, .L{{.*}}
+; CHECK-NEXT: cibh %r2, 0, 0(%r14)
 ; CHECK: br %r14
 entry:
   %res = add i32 %a, 1000000
@@ -106,7 +106,7 @@
 define i32 @f6(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f6:
 ; CHECK: afi %r2, 1000000
-; CHECK-NEXT: cijhe %r2, 0, .L{{.*}}
+; CHECK-NEXT: cibhe %r2, 0, 0(%r14)
 ; CHECK: br %r14
 entry:
   %res = add i32 %a, 1000000
@@ -125,7 +125,7 @@
 define i32 @f7(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f7:
 ; CHECK: s %r2, 0(%r4)
-; CHECK-NEXT: jne .L{{.*}}
+; CHECK-NEXT: bner %r14
 ; CHECK: br %r14
 entry:
   %cur = load i32 , i32 *%dest
@@ -145,7 +145,7 @@
 define i32 @f8(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f8:
 ; CHECK: s %r2, 0(%r4)
-; CHECK-NEXT: cijl %r2, 0, .L{{.*}}
+; CHECK-NEXT: cibl %r2, 0, 0(%r14)
 ; CHECK: br %r14
 entry:
   %cur = load i32 , i32 *%dest
@@ -166,7 +166,7 @@
 define i32 @f9(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f9:
 ; CHECK: nr %r2, %r3
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %res = and i32 %a, %b
@@ -185,7 +185,7 @@
 define i32 @f10(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f10:
 ; CHECK: nr %r2, %r3
-; CHECK-NEXT: cijl %r2, 0, .L{{.*}}
+; CHECK-NEXT: cibl %r2, 0, 0(%r14)
 ; CHECK: br %r14
 entry:
   %res = and i32 %a, %b
@@ -205,7 +205,7 @@
 define i32 @f11(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f11:
 ; CHECK: nilf %r2, 100000001
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %res = and i32 %a, 100000001
@@ -225,7 +225,7 @@
 define i32 @f12(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f12:
 ; CHECK: nill %r2, 65436
-; CHECK-NEXT: cijlh %r2, 0, .L{{.*}}
+; CHECK-NEXT: ciblh %r2, 0, 0(%r14)
 ; CHECK: br %r14
 entry:
   %res = and i32 %a, -100
@@ -244,7 +244,7 @@
 define i32 @f13(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f13:
 ; CHECK: sra %r2, 0(%r3)
-; CHECK-NEXT: je .L{{.*}}
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
 entry:
   %res = ashr i32 %a, %b
@@ -263,7 +263,7 @@
 define i32 @f14(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f14:
 ; CHECK: sra %r2, 0(%r3)
-; CHECK-NEXT: jlh .L{{.*}}
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
 entry:
   %res = ashr i32 %a, %b
@@ -282,7 +282,7 @@
 define i32 @f15(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f15:
 ; CHECK: sra %r2, 0(%r3)
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %res = ashr i32 %a, %b
@@ -301,7 +301,7 @@
 define i32 @f16(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f16:
 ; CHECK: sra %r2, 0(%r3)
-; CHECK-NEXT: jle .L{{.*}}
+; CHECK-NEXT: bler %r14
 ; CHECK: br %r14
 entry:
   %res = ashr i32 %a, %b
@@ -320,7 +320,7 @@
 define i32 @f17(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f17:
 ; CHECK: sra %r2, 0(%r3)
-; CHECK-NEXT: jh .L{{.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
 entry:
   %res = ashr i32 %a, %b
@@ -339,7 +339,7 @@
 define i32 @f18(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f18:
 ; CHECK: sra %r2, 0(%r3)
-; CHECK-NEXT: jhe .L{{.*}}
+; CHECK-NEXT: bher %r14
 ; CHECK: br %r14
 entry:
   %res = ashr i32 %a, %b
@@ -359,7 +359,7 @@
 define i64 @f19(i64 %a, i64 %b, i64 *%dest) {
 ; CHECK-LABEL: f19:
 ; CHECK: risbg %r2, %r3, 0, 190, 0
-; CHECK-NEXT: je .L{{.*}}
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
 entry:
   %res = and i64 %b, -2
@@ -378,7 +378,7 @@
 define i64 @f20(i64 %a, i64 %b, i64 *%dest) {
 ; CHECK-LABEL: f20:
 ; CHECK: risbg %r2, %r3, 0, 190, 0
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %res = and i64 %b, -2
@@ -401,7 +401,7 @@
 ; CHECK-NEXT: #APP
 ; CHECK-NEXT: blah %r2
 ; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: cije %r2, 0, .L{{.*}}
+; CHECK-NEXT: cibe %r2, 0, 0(%r14)
 ; CHECK: br %r14
 entry:
   %add = add i32 %a, 1000000
@@ -424,7 +424,7 @@
 ; CHECK-NEXT: #APP
 ; CHECK-NEXT: blah %r2
 ; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: cije %r2, 0, .L{{.*}}
+; CHECK-NEXT: cibe %r2, 0, 0(%r14)
 ; CHECK: br %r14
 entry:
   %add = add i32 %a, 1000000
@@ -445,7 +445,7 @@
 ; CHECK-LABEL: f23:
 ; CHECK: afi %r2, 1000000
 ; CHECK-NEXT: st %r2, 0(%r4)
-; CHECK-NEXT: jne .L{{.*}}
+; CHECK-NEXT: bner %r14
 ; CHECK: br %r14
 entry:
   %res = add i32 %a, 1000000
@@ -491,7 +491,7 @@
 ; CHECK-NEXT: #APP
 ; CHECK-NEXT: blah
 ; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jne .L{{.*}}
+; CHECK-NEXT: bner %r14
 ; CHECK: br %r14
 entry:
   %add = add i32 %a, 1000000
@@ -514,7 +514,7 @@
 ; CHECK-NEXT: #APP
 ; CHECK-NEXT: blah
 ; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: cijlh %r2, 0, .L{{.*}}
+; CHECK-NEXT: ciblh %r2, 0, 0(%r14)
 ; CHECK: br %r14
 entry:
   %add = add i32 %a, 1000000
@@ -537,7 +537,7 @@
 ; CHECK: afi %r2, 1000000
 ; CHECK-NEXT: sr %r3, %r2
 ; CHECK-NEXT: st %r3, 0(%r4)
-; CHECK-NEXT: cije %r2, 0, .L{{.*}}
+; CHECK-NEXT: cibe %r2, 0, 0(%r14)
 ; CHECK: br %r14
 entry:
   %add = add i32 %a, 1000000
@@ -558,7 +558,7 @@
 define void @f28(i64 %a, i64 *%dest) {
 ; CHECK-LABEL: f28:
 ; CHECK: xi 0(%r2), 15
-; CHECK: cgije %r2, 0, .L{{.*}}
+; CHECK: cgibe %r2, 0, 0(%r14)
 ; CHECK: br %r14
 entry:
   %ptr = inttoptr i64 %a to i8 *
@@ -580,7 +580,7 @@
 define i32 @f29(i64 %base, i64 %index, i32 *%dest) {
 ; CHECK-LABEL: f29:
 ; CHECK: lt %r2, 0({{%r2,%r3|%r3,%r2}})
-; CHECK-NEXT: jle .L{{.*}}
+; CHECK-NEXT: bler %r14
 ; CHECK: br %r14
 entry:
   %add = add i64 %base, %index
@@ -601,7 +601,7 @@
 define i32 @f30(i64 %base, i64 %index, i32 *%dest) {
 ; CHECK-LABEL: f30:
 ; CHECK: lt %r2, 100000({{%r2,%r3|%r3,%r2}})
-; CHECK-NEXT: jle .L{{.*}}
+; CHECK-NEXT: bler %r14
 ; CHECK: br %r14
 entry:
   %add1 = add i64 %base, %index
@@ -623,7 +623,7 @@
 define i64 @f31(i64 %base, i64 %index, i64 *%dest) {
 ; CHECK-LABEL: f31:
 ; CHECK: ltg %r2, 0({{%r2,%r3|%r3,%r2}})
-; CHECK-NEXT: jhe .L{{.*}}
+; CHECK-NEXT: bher %r14
 ; CHECK: br %r14
 entry:
   %add = add i64 %base, %index
@@ -644,7 +644,7 @@
 define i64 @f32(i64 %base, i64 %index, i64 *%dest) {
 ; CHECK-LABEL: f32:
 ; CHECK: ltgf %r2, 0({{%r2,%r3|%r3,%r2}})
-; CHECK-NEXT: jh .L{{.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
 entry:
   %add = add i64 %base, %index
@@ -669,7 +669,7 @@
 ; CHECK-NEXT: #APP
 ; CHECK-NEXT: blah %r2
 ; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   call void asm sideeffect "blah $0", "{r2}"(i32 %val)
@@ -691,7 +691,7 @@
 ; CHECK-NEXT: #APP
 ; CHECK-NEXT: blah %r2
 ; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jh .L{{.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
 entry:
   call void asm sideeffect "blah $0", "{r2}"(i64 %val)
@@ -713,7 +713,7 @@
 ; CHECK-NEXT: #APP
 ; CHECK-NEXT: blah %r2
 ; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jh .L{{.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
 entry:
   %ext = sext i32 %val to i64
@@ -737,7 +737,7 @@
 ; CHECK-NEXT: #APP
 ; CHECK-NEXT: blah %r3
 ; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   call void asm sideeffect "blah $0", "{r3}"(i32 %val)
@@ -760,7 +760,7 @@
 ; CHECK-NEXT: #APP
 ; CHECK-NEXT: blah %r3
 ; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   call void asm sideeffect "blah $0", "{r3}"(i64 %val)
@@ -783,7 +783,7 @@
 ; CHECK-NEXT: #APP
 ; CHECK-NEXT: blah %r3
 ; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jl .L{{.*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %ext = sext i32 %val to i64
@@ -806,7 +806,7 @@
 ; CHECK-NEXT: #APP
 ; CHECK-NEXT: blah %r2
 ; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jh .L{{.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
 entry:
   %val = trunc i64 %a to i32
@@ -830,7 +830,7 @@
 ; CHECK-NEXT: #APP
 ; CHECK-NEXT: blah %r2
 ; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: jh .L{{.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
 entry:
   %shl = shl i64 %a, 32
@@ -851,7 +851,7 @@
 define i32 @f41(i32 %a, i32 %b, i32 *%dest) {
 ; CHECK-LABEL: f41:
 ; CHECK: s %r2, 0(%r4)
-; CHECK-NEXT: jne .L{{.*}}
+; CHECK-NEXT: bner %r14
 ; CHECK: br %r14
 entry:
   %cur = load i32 , i32 *%dest
@@ -871,7 +871,7 @@
 define i64 @f42(i64 %base, i64 %index, i64 *%dest) {
 ; CHECK-LABEL: f42:
 ; CHECK: ltgf %r2, 0({{%r2,%r3|%r3,%r2}})
-; CHECK-NEXT: jh .L{{.*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
 entry:
   %add = add i64 %base, %index
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-46.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-46.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-46.ll
@@ -8,7 +8,7 @@
 define void @f1(i32 %a) {
 ; CHECK-LABEL: f1:
 ; CHECK: tmll %r2, 1
-; CHECK: je {{\.L.*}}
+; CHECK: ber %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 1
@@ -27,7 +27,7 @@
 define void @f2(i32 %a) {
 ; CHECK-LABEL: f2:
 ; CHECK: tmll %r2, 65535
-; CHECK: jne {{\.L.*}}
+; CHECK: bner %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 65535
@@ -46,7 +46,7 @@
 define void @f3(i32 %a) {
 ; CHECK-LABEL: f3:
 ; CHECK: tmlh %r2, 1
-; CHECK: jne {{\.L.*}}
+; CHECK: bner %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 65536
@@ -83,7 +83,7 @@
 define void @f5(i32 %a) {
 ; CHECK-LABEL: f5:
 ; CHECK: tmlh %r2, 65535
-; CHECK: je {{\.L.*}}
+; CHECK: ber %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 4294901760
@@ -103,7 +103,7 @@
 define void @f6(i32 %a) {
 ; CHECK-LABEL: f6:
 ; CHECK: tmll %r2, 240
-; CHECK: je {{\.L.*}}
+; CHECK: ber %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 240
@@ -122,7 +122,7 @@
 define void @f7(i32 %a) {
 ; CHECK-LABEL: f7:
 ; CHECK: tmll %r2, 240
-; CHECK: je {{\.L.*}}
+; CHECK: ber %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 240
@@ -142,7 +142,7 @@
 define void @f8(i32 %a) {
 ; CHECK-LABEL: f8:
 ; CHECK: tmll %r2, 240
-; CHECK: jne {{\.L.*}}
+; CHECK: bner %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 240
@@ -161,7 +161,7 @@
 define void @f9(i32 %a) {
 ; CHECK-LABEL: f9:
 ; CHECK: tmll %r2, 240
-; CHECK: jne {{\.L.*}}
+; CHECK: bner %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 240
@@ -181,7 +181,7 @@
 define void @f10(i32 %a) {
 ; CHECK-LABEL: f10:
 ; CHECK: tmll %r2, 35
-; CHECK: jle {{\.L.*}}
+; CHECK: bler %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 35
@@ -200,7 +200,7 @@
 define void @f11(i32 %a) {
 ; CHECK-LABEL: f11:
 ; CHECK: tmll %r2, 35
-; CHECK: jle {{\.L.*}}
+; CHECK: bler %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 35
@@ -220,7 +220,7 @@
 define void @f12(i32 %a) {
 ; CHECK-LABEL: f12:
 ; CHECK: tmll %r2, 140
-; CHECK: jnle {{\.L.*}}
+; CHECK: bnler %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 140
@@ -239,7 +239,7 @@
 define void @f13(i32 %a) {
 ; CHECK-LABEL: f13:
 ; CHECK: tmll %r2, 140
-; CHECK: jnle {{\.L.*}}
+; CHECK: bnler %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 140
@@ -258,7 +258,7 @@
 define void @f14(i32 %a) {
 ; CHECK-LABEL: f14:
 ; CHECK: tmll %r2, 101
-; CHECK: jo {{\.L.*}}
+; CHECK: bor %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 101
@@ -277,7 +277,7 @@
 define void @f15(i32 %a) {
 ; CHECK-LABEL: f15:
 ; CHECK: tmll %r2, 65519
-; CHECK: jno {{\.L.*}}
+; CHECK: bnor %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 65519
@@ -297,7 +297,7 @@
 define void @f16(i32 %a) {
 ; CHECK-LABEL: f16:
 ; CHECK: tmll %r2, 130
-; CHECK: jno {{\.L.*}}
+; CHECK: bnor %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 130
@@ -316,7 +316,7 @@
 define void @f17(i32 %a) {
 ; CHECK-LABEL: f17:
 ; CHECK: tmll %r2, 130
-; CHECK: jno {{\.L.*}}
+; CHECK: bnor %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 130
@@ -336,7 +336,7 @@
 define void @f18(i32 %a) {
 ; CHECK-LABEL: f18:
 ; CHECK: tmll %r2, 194
-; CHECK: jo {{\.L.*}}
+; CHECK: bor %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 194
@@ -355,7 +355,7 @@
 define void @f19(i32 %a) {
 ; CHECK-LABEL: f19:
 ; CHECK: tmll %r2, 194
-; CHECK: jo {{\.L.*}}
+; CHECK: bor %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 194
@@ -375,7 +375,7 @@
 define void @f20(i32 %a) {
 ; CHECK-LABEL: f20:
 ; CHECK: tmll %r2, 20
-; CHECK: jl {{\.L.*}}
+; CHECK: blr %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 20
@@ -395,7 +395,7 @@
 define void @f21(i32 %a) {
 ; CHECK-LABEL: f21:
 ; CHECK: tmll %r2, 20
-; CHECK: jnl {{\.L.*}}
+; CHECK: bnlr %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 20
@@ -415,7 +415,7 @@
 define void @f22(i32 %a) {
 ; CHECK-LABEL: f22:
 ; CHECK: tmll %r2, 20
-; CHECK: jh {{\.L.*}}
+; CHECK: bhr %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 20
@@ -435,7 +435,7 @@
 define void @f23(i32 %a) {
 ; CHECK-LABEL: f23:
 ; CHECK: tmll %r2, 20
-; CHECK: jnh {{\.L.*}}
+; CHECK: bnhr %r14
 ; CHECK: br %r14
 entry:
   %and = and i32 %a, 20
@@ -454,7 +454,7 @@
 define void @f24(i32 %a) {
 ; CHECK-LABEL: f24:
 ; CHECK: tmll %r2, 255
-; CHECK: jne {{\.L.*}}
+; CHECK: bner %r14
 ; CHECK: br %r14
 entry:
   %shl = shl i32 %a, 12
@@ -474,7 +474,7 @@
 define void @f25(i32 %a) {
 ; CHECK-LABEL: f25:
 ; CHECK: tmlh %r2, 512
-; CHECK: jne {{\.L.*}}
+; CHECK: bner %r14
 ; CHECK: br %r14
 entry:
   %shr = lshr i32 %a, 25
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-47.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-47.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-47.ll
@@ -9,7 +9,7 @@
 define void @f1(i64 %a) {
 ; CHECK-LABEL: f1:
 ; CHECK: tmll %r2, 1
-; CHECK: je {{\.L.*}}
+; CHECK: ber %r14
 ; CHECK: br %r14
 entry:
   %and = and i64 %a, 1
@@ -28,7 +28,7 @@
 define void @f2(i64 %a) {
 ; CHECK-LABEL: f2:
 ; CHECK: tmll %r2, 65535
-; CHECK: jne {{\.L.*}}
+; CHECK: bner %r14
 ; CHECK: br %r14
 entry:
   %and = and i64 %a, 65535
@@ -47,7 +47,7 @@
 define void @f3(i64 %a) {
 ; CHECK-LABEL: f3:
 ; CHECK: tmlh %r2, 1
-; CHECK: jne {{\.L.*}}
+; CHECK: bner %r14
 ; CHECK: br %r14
 entry:
   %and = and i64 %a, 65536
@@ -84,7 +84,7 @@
 define void @f5(i64 %a) {
 ; CHECK-LABEL: f5:
 ; CHECK: tmlh %r2, 65535
-; CHECK: je {{\.L.*}}
+; CHECK: ber %r14
 ; CHECK: br %r14
 entry:
   %and = and i64 %a, 4294901760
@@ -103,7 +103,7 @@
 define void @f6(i64 %a) {
 ; CHECK-LABEL: f6:
 ; CHECK: tmhl %r2, 1
-; CHECK: je {{\.L.*}}
+; CHECK: ber %r14
 ; CHECK: br %r14
 entry:
   %and = and i64 %a, 4294967296
@@ -140,7 +140,7 @@
 define void @f8(i64 %a) {
 ; CHECK-LABEL: f8:
 ; CHECK: tmhl %r2, 65535
-; CHECK: jne {{\.L.*}}
+; CHECK: bner %r14
 ; CHECK: br %r14
 entry:
   %and = and i64 %a, 281470681743360
@@ -159,7 +159,7 @@
 define void @f9(i64 %a) {
 ; CHECK-LABEL: f9:
 ; CHECK: tmhh %r2, 1
-; CHECK: jne {{\.L.*}}
+; CHECK: bner %r14
 ; CHECK: br %r14
 entry:
   %and = and i64 %a, 281474976710656
@@ -178,7 +178,7 @@
 define void @f10(i64 %a) {
 ; CHECK-LABEL: f10:
 ; CHECK: tmhh %r2, 65535
-; CHECK: je {{\.L.*}}
+; CHECK: ber %r14
 ; CHECK: br %r14
 entry:
   %and = and i64 %a, 18446462598732840960
@@ -197,7 +197,7 @@
 define void @f11(i64 %a) {
 ; CHECK-LABEL: f11:
 ; CHECK: tmhl %r2, 32768
-; CHECK: jne {{\.L.*}}
+; CHECK: bner %r14
 ; CHECK: br %r14
 entry:
   %shl = shl i64 %a, 1
@@ -217,7 +217,7 @@
 define void @f12(i64 %a) {
 ; CHECK-LABEL: f12:
 ; CHECK: tmhh %r2, 256
-; CHECK: jne {{\.L.*}}
+; CHECK: bner %r14
 ; CHECK: br %r14
 entry:
   %shr = lshr i64 %a, 56
@@ -237,7 +237,7 @@
 define void @f13(i64 %a) {
 ; CHECK-LABEL: f13:
 ; CHECK: tmhh %r2, 49152
-; CHECK: jno {{\.L.*}}
+; CHECK: bnor %r14
 ; CHECK: br %r14
 entry:
   %cmp = icmp ult i64 %a, 13835058055282163712
@@ -255,7 +255,7 @@
 define void @f14(i64 %a) {
 ; CHECK-LABEL: f14:
 ; CHECK: tmhh %r2, 49152
-; CHECK: jno {{\.L.*}}
+; CHECK: bnor %r14
 ; CHECK: br %r14
 entry:
   %cmp = icmp ule i64 %a, 13835058055282163711
@@ -273,7 +273,7 @@
 define void @f15(i64 %a) {
 ; CHECK-LABEL: f15:
 ; CHECK: tmhh %r2, 49152
-; CHECK: jo {{\.L.*}}
+; CHECK: bor %r14
 ; CHECK: br %r14
 entry:
   %cmp = icmp ugt i64 %a, 13835058055282163711
@@ -291,7 +291,7 @@
 define void @f16(i64 %a) {
 ; CHECK-LABEL: f16:
 ; CHECK: tmhh %r2, 49152
-; CHECK: jo {{\.L.*}}
+; CHECK: bor %r14
 ; CHECK: br %r14
 entry:
   %cmp = icmp uge i64 %a, 13835058055282163712
@@ -329,7 +329,7 @@
 define void @f18(i64 %a) {
 ; CHECK-LABEL: f18:
 ; CHECK-NOT: tmhh
-; CHECK: cgijhe %r2, 0,
+; CHECK: cgibhe %r2, 0, 0(%r14)
 ; CHECK: br %r14
 entry:
   %cmp = icmp ult i64 %a, 9223372036854775808
Index: llvm/trunk/test/CodeGen/SystemZ/int-cmp-48.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/int-cmp-48.ll
+++ llvm/trunk/test/CodeGen/SystemZ/int-cmp-48.ll
@@ -8,7 +8,7 @@
 define void @f1(i8 *%src) {
 ; CHECK-LABEL: f1:
 ; CHECK: tm 0(%r2), 1
-; CHECK: je {{\.L.*}}
+; CHECK: ber %r14
 ; CHECK: br %r14
 entry:
   %byte = load i8 , i8 *%src
@@ -31,7 +31,7 @@
 ; CHECK: llc [[REG:%r[0-5]]], 0(%r2)
 ; CHECK: mvi 0(%r2), 0
 ; CHECK: tmll [[REG]], 1
-; CHECK: je {{\.L.*}}
+; CHECK: ber %r14
 ; CHECK: br %r14
 entry:
   %byte = load i8 , i8 *%src
Index: llvm/trunk/test/CodeGen/SystemZ/memchr-01.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/memchr-01.ll
+++ llvm/trunk/test/CodeGen/SystemZ/memchr-01.ll
@@ -13,7 +13,7 @@
 ; CHECK: [[LABEL:\.[^:]*]]:
 ; CHECK: srst %r2, [[REG]]
 ; CHECK-NEXT: jo [[LABEL]]
-; CHECK: jl {{\.L.*}}
+; CHECK: blr %r14
 ; CHECK: lghi %r2, 0
 ; CHECK: br %r14
   %res = call i8 *@memchr(i8 *%src, i16 %char, i32 %len)
Index: llvm/trunk/test/CodeGen/SystemZ/memchr-02.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/memchr-02.ll
+++ llvm/trunk/test/CodeGen/SystemZ/memchr-02.ll
@@ -12,7 +12,7 @@
 ; CHECK: [[LABEL:\.[^:]*]]:
 ; CHECK: srst %r2, %r3
 ; CHECK-NEXT: jo [[LABEL]]
-; CHECK: jl {{\.L.*}}
+; CHECK: blr %r14
 ; CHECK: lghi %r2, 0
 ; CHECK: br %r14
   %res = call i8 *@memchr(i8 *%src, i32 %char, i64 %len)
Index: llvm/trunk/test/CodeGen/SystemZ/memcmp-01.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/memcmp-01.ll
+++ llvm/trunk/test/CodeGen/SystemZ/memcmp-01.ll
@@ -29,7 +29,7 @@
 define void @f3(i8 *%src1, i8 *%src2, i32 *%dest) {
 ; CHECK-LABEL: f3:
 ; CHECK: clc 0(3,%r2), 0(%r3)
-; CHECK-NEXT: je {{\..*}}
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %res = call i32 @memcmp(i8 *%src1, i8 *%src2, i64 3)
   %cmp = icmp eq i32 %res, 0
@@ -47,7 +47,7 @@
 define void @f4(i8 *%src1, i8 *%src2, i32 *%dest) {
 ; CHECK-LABEL: f4:
 ; CHECK: clc 0(4,%r2), 0(%r3)
-; CHECK-NEXT: jlh {{\..*}}
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
 entry:
   %res = call i32 @memcmp(i8 *%src1, i8 *%src2, i64 4)
@@ -66,7 +66,7 @@
 define void @f5(i8 *%src1, i8 *%src2, i32 *%dest) {
 ; CHECK-LABEL: f5:
 ; CHECK: clc 0(5,%r2), 0(%r3)
-; CHECK-NEXT: jl {{\..*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %res = call i32 @memcmp(i8 *%src1, i8 *%src2, i64 5)
@@ -85,7 +85,7 @@
 define void @f6(i8 *%src1, i8 *%src2, i32 *%dest) {
 ; CHECK-LABEL: f6:
 ; CHECK: clc 0(6,%r2), 0(%r3)
-; CHECK-NEXT: jh {{\..*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
 entry:
   %res = call i32 @memcmp(i8 *%src1, i8 *%src2, i64 6)
@@ -108,7 +108,7 @@
 ; CHECK: ipm [[REG:%r[0-5]]]
 ; CHECK: srl [[REG]], 28
 ; CHECK: rll %r2, [[REG]], 31
-; CHECK: jl {{.L*}}
+; CHECK: blr %r14
 ; CHECK: br %r14
 entry:
   %res = call i32 @memcmp(i8 *%src1, i8 *%src2, i64 256)
@@ -143,7 +143,7 @@
 ; CHECK: jlh [[LABEL:\..*]]
 ; CHECK: clc 256(1,%r2), 256(%r3)
 ; CHECK: [[LABEL]]:
-; CHECK-NEXT: jl .L
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %res = call i32 @memcmp(i8 *%src1, i8 *%src2, i64 257)
Index: llvm/trunk/test/CodeGen/SystemZ/memcmp-02.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/memcmp-02.ll
+++ llvm/trunk/test/CodeGen/SystemZ/memcmp-02.ll
@@ -30,7 +30,7 @@
 define void @f3(i8 *%src1, i8 *%src2, i64 *%dest) {
 ; CHECK-LABEL: f3:
 ; CHECK: clc 0(3,%r2), 0(%r3)
-; CHECK-NEXT: je {{\..*}}
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %res = call i64 @memcmp(i8 *%src1, i8 *%src2, i64 3)
   %cmp = icmp eq i64 %res, 0
@@ -48,7 +48,7 @@
 define void @f4(i8 *%src1, i8 *%src2, i64 *%dest) {
 ; CHECK-LABEL: f4:
 ; CHECK: clc 0(4,%r2), 0(%r3)
-; CHECK-NEXT: jlh {{\..*}}
+; CHECK-NEXT: blhr %r14
 ; CHECK: br %r14
 entry:
   %res = call i64 @memcmp(i8 *%src1, i8 *%src2, i64 4)
@@ -67,7 +67,7 @@
 define void @f5(i8 *%src1, i8 *%src2, i64 *%dest) {
 ; CHECK-LABEL: f5:
 ; CHECK: clc 0(5,%r2), 0(%r3)
-; CHECK-NEXT: jl {{\..*}}
+; CHECK-NEXT: blr %r14
 ; CHECK: br %r14
 entry:
   %res = call i64 @memcmp(i8 *%src1, i8 *%src2, i64 5)
@@ -86,7 +86,7 @@
 define void @f6(i8 *%src1, i8 *%src2, i64 *%dest) {
 ; CHECK-LABEL: f6:
 ; CHECK: clc 0(6,%r2), 0(%r3)
-; CHECK-NEXT: jh {{\..*}}
+; CHECK-NEXT: bhr %r14
 ; CHECK: br %r14
 entry:
   %res = call i64 @memcmp(i8 *%src1, i8 *%src2, i64 6)
@@ -110,7 +110,7 @@
 ; CHECK: srl [[REG]], 28
 ; CHECK: rll [[REG]], [[REG]], 31
 ; CHECK: lgfr %r2, [[REG]]
-; CHECK: jl {{.L*}}
+; CHECK: blr %r14
 ; CHECK: br %r14
 entry:
   %res = call i64 @memcmp(i8 *%src1, i8 *%src2, i64 256)
Index: llvm/trunk/test/CodeGen/SystemZ/strcmp-01.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/strcmp-01.ll
+++ llvm/trunk/test/CodeGen/SystemZ/strcmp-01.ll
@@ -28,7 +28,7 @@
 ; CHECK: clst %r2, %r3
 ; CHECK-NEXT: jo [[LABEL]]
 ; CHECK-NEXT: BB#{{[0-9]+}}
-; CHECK-NEXT: je {{\.L.*}}
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %res = call i32 @strcmp(i8 *%src1, i8 *%src2)
   %cmp = icmp eq i32 %res, 0
@@ -54,7 +54,7 @@
 ; CHECK-NEXT: ipm [[REG:%r[0-5]]]
 ; CHECK: srl [[REG]], 28
 ; CHECK: rll %r2, [[REG]], 31
-; CHECK: jl {{\.L*}}
+; CHECK: blr %r14
 ; CHECK: br %r14
 entry:
   %res = call i32 @strcmp(i8 *%src1, i8 *%src2)
Index: llvm/trunk/test/CodeGen/SystemZ/strcmp-02.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/strcmp-02.ll
+++ llvm/trunk/test/CodeGen/SystemZ/strcmp-02.ll
@@ -29,7 +29,7 @@
 ; CHECK: clst %r2, %r3
 ; CHECK-NEXT: jo [[LABEL]]
 ; CHECK-NEXT: BB#{{[0-9]+}}
-; CHECK-NEXT: je {{\.L.*}}
+; CHECK-NEXT: ber %r14
 ; CHECK: br %r14
   %res = call i64 @strcmp(i8 *%src1, i8 *%src2)
   %cmp = icmp eq i64 %res, 0
@@ -56,7 +56,7 @@
 ; CHECK: srl [[REG]], 28
 ; CHECK: rll [[REG]], [[REG]], 31
 ; CHECK: lgfr %r2, [[REG]]
-; CHECK: jl {{\.L*}}
+; CHECK: blr %r14
 ; CHECK: br %r14
 entry:
   %res = call i64 @strcmp(i8 *%src1, i8 *%src2)
Index: llvm/trunk/test/CodeGen/SystemZ/vec-intrinsics.ll
===================================================================
--- llvm/trunk/test/CodeGen/SystemZ/vec-intrinsics.ll
+++ llvm/trunk/test/CodeGen/SystemZ/vec-intrinsics.ll
@@ -396,7 +396,7 @@
 define <16 x i8> @test_vpkshs_all_store(<8 x i16> %a, <8 x i16> %b, i32 *%ptr) {
 ; CHECK-LABEL: test_vpkshs_all_store:
 ; CHECK: vpkshs %v24, %v24, %v26
-; CHECK-NEXT: {{jno|jle}} {{\.L*}}
+; CHECK-NEXT: {{bnor|bler}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<16 x i8>, i32} @llvm.s390.vpkshs(<8 x i16> %a, <8 x i16> %b)
@@ -432,7 +432,7 @@
 define <8 x i16> @test_vpksfs_any_store(<4 x i32> %a, <4 x i32> %b, i32 *%ptr) {
 ; CHECK-LABEL: test_vpksfs_any_store:
 ; CHECK: vpksfs %v24, %v24, %v26
-; CHECK-NEXT: {{jhe|je}} {{\.L*}}
+; CHECK-NEXT: {{bher|ber}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<8 x i16>, i32} @llvm.s390.vpksfs(<4 x i32> %a, <4 x i32> %b)
@@ -469,7 +469,7 @@
                                          i32 *%ptr) {
 ; CHECK-LABEL: test_vpksgs_none_store:
 ; CHECK: vpksgs %v24, %v24, %v26
-; CHECK-NEXT: {{jnhe|jne}} {{\.L*}}
+; CHECK-NEXT: {{bnher|bner}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<4 x i32>, i32} @llvm.s390.vpksgs(<2 x i64> %a, <2 x i64> %b)
@@ -533,7 +533,7 @@
                                          i32 *%ptr) {
 ; CHECK-LABEL: test_vpklshs_all_store:
 ; CHECK: vpklshs %v24, %v24, %v26
-; CHECK-NEXT: {{jno|jle}} {{\.L*}}
+; CHECK-NEXT: {{bnor|bler}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<16 x i8>, i32} @llvm.s390.vpklshs(<8 x i16> %a, <8 x i16> %b)
@@ -570,7 +570,7 @@
                                          i32 *%ptr) {
 ; CHECK-LABEL: test_vpklsfs_any_store:
 ; CHECK: vpklsfs %v24, %v24, %v26
-; CHECK-NEXT: {{jhe|je}} {{\.L*}}
+; CHECK-NEXT: {{bher|ber}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<8 x i16>, i32} @llvm.s390.vpklsfs(<4 x i32> %a, <4 x i32> %b)
@@ -607,7 +607,7 @@
                                           i32 *%ptr) {
 ; CHECK-LABEL: test_vpklsgs_none_store:
 ; CHECK: vpklsgs %v24, %v24, %v26
-; CHECK-NEXT: {{jnhe|jne}} {{\.L*}}
+; CHECK-NEXT: {{bnher|bner}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<4 x i32>, i32} @llvm.s390.vpklsgs(<2 x i64> %a, <2 x i64> %b)
@@ -1705,7 +1705,7 @@
 ; CHECK-LABEL: test_vtm_all_store:
 ; CHECK-NOT: %r
 ; CHECK: vtm %v24, %v26
-; CHECK-NEXT: {{jno|jle}} {{\.L*}}
+; CHECK-NEXT: {{bnor|bler}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %res = call i32 @llvm.s390.vtm(<16 x i8> %a, <16 x i8> %b)
@@ -1752,7 +1752,7 @@
 ; CHECK-LABEL: test_vceqbs_any_store:
 ; CHECK-NOT: %r
 ; CHECK: vceqbs %v24, %v24, %v26
-; CHECK-NEXT: {{jo|jnle}} {{\.L*}}
+; CHECK-NEXT: {{bor|bnler}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<16 x i8>, i32} @llvm.s390.vceqbs(<16 x i8> %a, <16 x i8> %b)
@@ -1801,7 +1801,7 @@
 ; CHECK-LABEL: test_vceqhs_notall_store:
 ; CHECK-NOT: %r
 ; CHECK: vceqhs %v24, %v24, %v26
-; CHECK-NEXT: {{jhe|je}} {{\.L*}}
+; CHECK-NEXT: {{bher|ber}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<8 x i16>, i32} @llvm.s390.vceqhs(<8 x i16> %a, <8 x i16> %b)
@@ -1850,7 +1850,7 @@
 ; CHECK-LABEL: test_vceqfs_none_store:
 ; CHECK-NOT: %r
 ; CHECK: vceqfs %v24, %v24, %v26
-; CHECK-NEXT: {{jno|jle}} {{\.L*}}
+; CHECK-NEXT: {{bnor|bler}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<4 x i32>, i32} @llvm.s390.vceqfs(<4 x i32> %a, <4 x i32> %b)
@@ -1899,7 +1899,7 @@
 ; CHECK-LABEL: test_vceqgs_all_store:
 ; CHECK-NOT: %r
 ; CHECK: vceqgs %v24, %v24, %v26
-; CHECK-NEXT: {{jnhe|jne}} {{\.L*}}
+; CHECK-NEXT: {{bnher|bner}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<2 x i64>, i32} @llvm.s390.vceqgs(<2 x i64> %a, <2 x i64> %b)
@@ -1948,7 +1948,7 @@
 ; CHECK-LABEL: test_vchbs_any_store:
 ; CHECK-NOT: %r
 ; CHECK: vchbs %v24, %v24, %v26
-; CHECK-NEXT: {{jo|jnle}} {{\.L*}}
+; CHECK-NEXT: {{bor|bnler}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<16 x i8>, i32} @llvm.s390.vchbs(<16 x i8> %a, <16 x i8> %b)
@@ -1997,7 +1997,7 @@
 ; CHECK-LABEL: test_vchhs_notall_store:
 ; CHECK-NOT: %r
 ; CHECK: vchhs %v24, %v24, %v26
-; CHECK-NEXT: {{jhe|je}} {{\.L*}}
+; CHECK-NEXT: {{bher|ber}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<8 x i16>, i32} @llvm.s390.vchhs(<8 x i16> %a, <8 x i16> %b)
@@ -2045,7 +2045,7 @@
 ; CHECK-LABEL: test_vchfs_none_store:
 ; CHECK-NOT: %r
 ; CHECK: vchfs %v24, %v24, %v26
-; CHECK-NEXT: {{jno|jle}} {{\.L*}}
+; CHECK-NEXT: {{bnor|bler}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<4 x i32>, i32} @llvm.s390.vchfs(<4 x i32> %a, <4 x i32> %b)
@@ -2094,7 +2094,7 @@
 ; CHECK-LABEL: test_vchgs_all_store:
 ; CHECK-NOT: %r
 ; CHECK: vchgs %v24, %v24, %v26
-; CHECK-NEXT: {{jnhe|jne}} {{\.L*}}
+; CHECK-NEXT: {{bnher|bner}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<2 x i64>, i32} @llvm.s390.vchgs(<2 x i64> %a, <2 x i64> %b)
@@ -2143,7 +2143,7 @@
 ; CHECK-LABEL: test_vchlbs_any_store:
 ; CHECK-NOT: %r
 ; CHECK: vchlbs %v24, %v24, %v26
-; CHECK-NEXT: {{jo|jnle}} {{\.L*}}
+; CHECK-NEXT: {{bor|bnler}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<16 x i8>, i32} @llvm.s390.vchlbs(<16 x i8> %a, <16 x i8> %b)
@@ -2192,7 +2192,7 @@
 ; CHECK-LABEL: test_vchlhs_notall_store:
 ; CHECK-NOT: %r
 ; CHECK: vchlhs %v24, %v24, %v26
-; CHECK-NEXT: {{jhe|je}} {{\.L*}}
+; CHECK-NEXT: {{bher|ber}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<8 x i16>, i32} @llvm.s390.vchlhs(<8 x i16> %a, <8 x i16> %b)
@@ -2241,7 +2241,7 @@
 ; CHECK-LABEL: test_vchlfs_none_store:
 ; CHECK-NOT: %r
 ; CHECK: vchlfs %v24, %v24, %v26
-; CHECK-NEXT: {{jno|jle}} {{\.L*}}
+; CHECK-NEXT: {{bnor|bler}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<4 x i32>, i32} @llvm.s390.vchlfs(<4 x i32> %a, <4 x i32> %b)
@@ -2290,7 +2290,7 @@
 ; CHECK-LABEL: test_vchlgs_all_store:
 ; CHECK-NOT: %r
 ; CHECK: vchlgs %v24, %v24, %v26
-; CHECK-NEXT: {{jnhe|jne}} {{\.L*}}
+; CHECK-NEXT: {{bnher|bner}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<2 x i64>, i32} @llvm.s390.vchlgs(<2 x i64> %a, <2 x i64> %b)
@@ -3166,7 +3166,7 @@
 ; CHECK-LABEL: test_vfcedbs_any_store:
 ; CHECK-NOT: %r
 ; CHECK: vfcedbs %v24, %v24, %v26
-; CHECK-NEXT: {{jo|jnle}} {{\.L*}}
+; CHECK-NEXT: {{bor|bnler}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<2 x i64>, i32} @llvm.s390.vfcedbs(<2 x double> %a,
@@ -3218,7 +3218,7 @@
 ; CHECK-LABEL: test_vfchdbs_notall_store:
 ; CHECK-NOT: %r
 ; CHECK: vfchdbs %v24, %v24, %v26
-; CHECK-NEXT: {{jhe|je}} {{\.L*}}
+; CHECK-NEXT: {{bher|ber}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<2 x i64>, i32} @llvm.s390.vfchdbs(<2 x double> %a,
@@ -3270,7 +3270,7 @@
 ; CHECK-LABEL: test_vfchedbs_none_store:
 ; CHECK-NOT: %r
 ; CHECK: vfchedbs %v24, %v24, %v26
-; CHECK-NEXT: {{jno|jle}} {{\.L*}}
+; CHECK-NEXT: {{bnor|bler}} %r14
 ; CHECK: mvhi 0(%r2), 0
 ; CHECK: br %r14
   %call = call {<2 x i64>, i32} @llvm.s390.vfchedbs(<2 x double> %a,