Index: lib/Target/Mips/AsmParser/MipsAsmParser.cpp =================================================================== --- lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -1855,16 +1855,6 @@ ((Imm % 4 == 0) && Imm < 28 && Imm > 0))) return Error(IDLoc, "immediate operand value out of range"); break; - case Mips::ADDIUR1SP_MM: - Opnd = Inst.getOperand(1); - if (!Opnd.isImm()) - return Error(IDLoc, "expected immediate operand kind"); - Imm = Opnd.getImm(); - if (OffsetToAlignment(Imm, 4LL)) - return Error(IDLoc, "misaligned immediate operand value"); - if (Imm < 0 || Imm > 255) - return Error(IDLoc, "immediate operand value out of range"); - break; case Mips::ANDI16_MM: Opnd = Inst.getOperand(2); if (!Opnd.isImm()) @@ -3765,6 +3755,9 @@ case Match_UImm6_0: return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), "expected 6-bit unsigned immediate"); + case Match_UImm6_Lsl2: + return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), + "expected both 8-bit unsigned immediate and multiple of 4"); case Match_SImm6_0: return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), "expected 6-bit signed immediate"); Index: lib/Target/Mips/Disassembler/MipsDisassembler.cpp =================================================================== --- lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -362,11 +362,6 @@ uint64_t Address, const void *Decoder); -static DecodeStatus DecodeUImm6Lsl2(MCInst &Inst, - unsigned Value, - uint64_t Address, - const void *Decoder); - static DecodeStatus DecodeLiSimm7(MCInst &Inst, unsigned Value, uint64_t Address, @@ -382,9 +377,18 @@ uint64_t Address, const void *Decoder); +template +static DecodeStatus DecodeUImmWithOffsetAndScale(MCInst &Inst, unsigned Value, + uint64_t Address, + const void *Decoder); + template static DecodeStatus DecodeUImmWithOffset(MCInst &Inst, unsigned Value, - uint64_t Address, const void *Decoder); + uint64_t Address, + const void *Decoder) { + return DecodeUImmWithOffsetAndScale(Inst, Value, Address, + Decoder); +} template static DecodeStatus DecodeSImmWithOffset(MCInst &Inst, unsigned Value, @@ -407,9 +411,6 @@ static DecodeStatus DecodeANDI16Imm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder); -static DecodeStatus DecodeUImm5lsl2(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); - static DecodeStatus DecodeSimm23Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder); @@ -1896,14 +1897,6 @@ return MCDisassembler::Success; } -static DecodeStatus DecodeUImm6Lsl2(MCInst &Inst, - unsigned Value, - uint64_t Address, - const void *Decoder) { - Inst.addOperand(MCOperand::createImm(Value << 2)); - return MCDisassembler::Success; -} - static DecodeStatus DecodeLiSimm7(MCInst &Inst, unsigned Value, uint64_t Address, @@ -1931,11 +1924,12 @@ return MCDisassembler::Success; } -template -static DecodeStatus DecodeUImmWithOffset(MCInst &Inst, unsigned Value, - uint64_t Address, - const void *Decoder) { +template +static DecodeStatus DecodeUImmWithOffsetAndScale(MCInst &Inst, unsigned Value, + uint64_t Address, + const void *Decoder) { Value &= ((1 << Bits) - 1); + Value *= Scale; Inst.addOperand(MCOperand::createImm(Value + Offset)); return MCDisassembler::Success; } @@ -1996,12 +1990,6 @@ return MCDisassembler::Success; } -static DecodeStatus DecodeUImm5lsl2(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { - Inst.addOperand(MCOperand::createImm(Insn << 2)); - return MCDisassembler::Success; -} - static DecodeStatus DecodeRegListOperand(MCInst &Inst, unsigned Insn, uint64_t Address, Index: lib/Target/Mips/MicroMipsInstrInfo.td =================================================================== --- lib/Target/Mips/MicroMipsInstrInfo.td +++ lib/Target/Mips/MicroMipsInstrInfo.td @@ -10,11 +10,6 @@ let DecoderMethod = "DecodeSimm12"; } -def uimm6_lsl2 : Operand { - let EncoderMethod = "getUImm6Lsl2Encoding"; - let DecoderMethod = "DecodeUImm6Lsl2"; -} - def simm9_addiusp : Operand { let EncoderMethod = "getSImm9AddiuspValue"; let DecoderMethod = "DecodeSimm9SP"; Index: lib/Target/Mips/MipsInstrInfo.td =================================================================== --- lib/Target/Mips/MipsInstrInfo.td +++ lib/Target/Mips/MipsInstrInfo.td @@ -442,6 +442,13 @@ : ConstantUImmAsmOperandClass<8, [ConstantUImm10AsmOperandClass]>; def ConstantUImm7AsmOperandClass : ConstantUImmAsmOperandClass<7, [ConstantUImm8AsmOperandClass]>; +def ConstantUImm6Lsl2AsmOperandClass : AsmOperandClass { + let Name = "UImm6Lsl2"; + let RenderMethod = "addImmOperands"; + let PredicateMethod = "isScaledUImm<6, 2>"; + let SuperClasses = [ConstantUImm7AsmOperandClass]; + let DiagnosticType = "UImm6_Lsl2"; +} def ConstantUImm6AsmOperandClass : ConstantUImmAsmOperandClass<6, [ConstantUImm7AsmOperandClass]>; def ConstantSImm6AsmOperandClass @@ -614,7 +621,7 @@ def uimm5_lsl2 : Operand { let EncoderMethod = "getUImm5Lsl2Encoding"; - let DecoderMethod = "DecodeUImm5lsl2"; + let DecoderMethod = "DecodeUImmWithOffsetAndScale<5, 0, 4>"; let ParserMatchClass = ConstantUImm5Lsl2AsmOperandClass; } @@ -623,6 +630,12 @@ let ParserMatchClass = ConstantUImm5Plus32NormalizeAsmOperandClass; } +def uimm6_lsl2 : Operand { + let EncoderMethod = "getUImm6Lsl2Encoding"; + let DecoderMethod = "DecodeUImmWithOffsetAndScale<6, 0, 4>"; + let ParserMatchClass = ConstantUImm6Lsl2AsmOperandClass; +} + foreach I = {16} in def uimm # I : Operand { let PrintMethod = "printUImm<16>"; Index: test/MC/Mips/micromips-invalid.s =================================================================== --- test/MC/Mips/micromips-invalid.s +++ test/MC/Mips/micromips-invalid.s @@ -1,9 +1,9 @@ # RUN: not llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips 2>%t1 # RUN: FileCheck %s < %t1 - addiur1sp $7, 260 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range - addiur1sp $7, 241 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: misaligned immediate operand value - addiur1sp $8, 240 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + addiur1sp $7, 260 # CHECK: :[[@LINE]]:17: error: expected both 8-bit unsigned immediate and multiple of 4 + addiur1sp $7, 241 # CHECK: :[[@LINE]]:17: error: expected both 8-bit unsigned immediate and multiple of 4 + addiur1sp $8, 240 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction addiusp 1032 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range addu16 $6, $14, $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction subu16 $5, $16, $9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction Index: test/MC/Mips/micromips/invalid.s =================================================================== --- test/MC/Mips/micromips/invalid.s +++ test/MC/Mips/micromips/invalid.s @@ -1,6 +1,9 @@ # RUN: not llvm-mc %s -triple=mips -show-encoding -mattr=micromips 2>%t1 # RUN: FileCheck %s < %t1 + addiur1sp $7, 260 # CHECK: :[[@LINE]]:17: error: expected both 8-bit unsigned immediate and multiple of 4 + addiur1sp $7, 241 # CHECK: :[[@LINE]]:17: error: expected both 8-bit unsigned immediate and multiple of 4 + addiur1sp $8, 240 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction addius5 $2, -9 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate addius5 $2, 8 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate break -1 # CHECK: :[[@LINE]]:9: error: expected 10-bit unsigned immediate Index: test/MC/Mips/micromips32r6/invalid.s =================================================================== --- test/MC/Mips/micromips32r6/invalid.s +++ test/MC/Mips/micromips32r6/invalid.s @@ -1,9 +1,9 @@ # RUN: not llvm-mc %s -triple=mips -show-encoding -mcpu=mips32r6 -mattr=micromips 2>%t1 # RUN: FileCheck %s < %t1 - addiur1sp $7, 260 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range - addiur1sp $7, 241 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: misaligned immediate operand value - addiur1sp $8, 240 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + addiur1sp $7, 260 # CHECK: :[[@LINE]]:17: error: expected both 8-bit unsigned immediate and multiple of 4 + addiur1sp $7, 241 # CHECK: :[[@LINE]]:17: error: expected both 8-bit unsigned immediate and multiple of 4 + addiur1sp $8, 240 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction addiur2 $9, $7, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction addiur2 $6, $7, 10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range addius5 $2, -9 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate Index: test/MC/Mips/micromips64r6/invalid.s =================================================================== --- test/MC/Mips/micromips64r6/invalid.s +++ test/MC/Mips/micromips64r6/invalid.s @@ -1,9 +1,9 @@ # RUN: not llvm-mc %s -triple=mips -show-encoding -mcpu=mips64r6 -mattr=micromips 2>%t1 # RUN: FileCheck %s < %t1 - addiur1sp $7, 260 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range - addiur1sp $7, 241 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: misaligned immediate operand value - addiur1sp $8, 240 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + addiur1sp $7, 260 # CHECK: :[[@LINE]]:17: error: expected both 8-bit unsigned immediate and multiple of 4 + addiur1sp $7, 241 # CHECK: :[[@LINE]]:17: error: expected both 8-bit unsigned immediate and multiple of 4 + addiur1sp $8, 240 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction addiur2 $9, $7, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction addiur2 $6, $7, 10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range addius5 $2, -9 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate