Index: lib/Target/Mips/MicroMipsInstrInfo.td =================================================================== --- lib/Target/Mips/MicroMipsInstrInfo.td +++ lib/Target/Mips/MicroMipsInstrInfo.td @@ -62,7 +62,7 @@ class mem_mm_4_generic : Operand { let PrintMethod = "printMemOperand"; - let MIOperandInfo = (ops GPRMM16, simm4); + let MIOperandInfo = (ops ptr_rc, simm4); let OperandType = "OPERAND_MEMORY"; let ParserMatchClass = MicroMipsMemGPRMM16AsmOperand; } @@ -88,7 +88,7 @@ def mem_mm_sp_imm5_lsl2 : Operand { let PrintMethod = "printMemOperand"; - let MIOperandInfo = (ops GPR32:$base, simm5:$offset); + let MIOperandInfo = (ops ptr_rc:$base, simm5:$offset); let OperandType = "OPERAND_MEMORY"; let ParserMatchClass = MicroMipsMemSPAsmOperand; let EncoderMethod = "getMemEncodingMMSPImm5Lsl2"; @@ -103,7 +103,7 @@ def mem_mm_9 : Operand { let PrintMethod = "printMemOperand"; - let MIOperandInfo = (ops GPR32, simm9); + let MIOperandInfo = (ops ptr_rc, simm9); let EncoderMethod = "getMemEncodingMMImm9"; let ParserMatchClass = MipsMemAsmOperand; let OperandType = "OPERAND_MEMORY"; @@ -111,7 +111,7 @@ def mem_mm_12 : Operand { let PrintMethod = "printMemOperand"; - let MIOperandInfo = (ops GPR32, simm12); + let MIOperandInfo = (ops ptr_rc, simm12); let EncoderMethod = "getMemEncodingMMImm12"; let ParserMatchClass = MipsMemAsmOperand; let OperandType = "OPERAND_MEMORY"; @@ -119,7 +119,7 @@ def mem_mm_16 : Operand { let PrintMethod = "printMemOperand"; - let MIOperandInfo = (ops GPR32, simm16); + let MIOperandInfo = (ops ptr_rc, simm16); let EncoderMethod = "getMemEncodingMMImm16"; let ParserMatchClass = MipsMemAsmOperand; let OperandType = "OPERAND_MEMORY"; @@ -135,7 +135,7 @@ def mem_mm_4sp : Operand { let PrintMethod = "printMemOperand"; - let MIOperandInfo = (ops GPR32, uimm8); + let MIOperandInfo = (ops ptr_rc, uimm8); let EncoderMethod = "getMemEncodingMMImm4sp"; let ParserMatchClass = MipsMemUimm4AsmOperand; let OperandType = "OPERAND_MEMORY"; @@ -216,7 +216,7 @@ let ParserMatchClass = MovePRegPairAsmOperand; let PrintMethod = "printRegisterList"; let DecoderMethod = "DecodeMovePRegPair"; - let MIOperandInfo = (ops GPR32Opnd, GPR32Opnd); + let MIOperandInfo = (ops ptr_rc, ptr_rc); } class MovePMM16 : @@ -237,7 +237,7 @@ let ParserMatchClass = RegPairAsmOperand; let PrintMethod = "printRegisterPair"; let DecoderMethod = "DecodeRegPairOperand"; - let MIOperandInfo = (ops GPR32Opnd, GPR32Opnd); + let MIOperandInfo = (ops ptr_rc, ptr_rc); } class StorePairMM(MF.getTarget()) .getABI() .IsN64() Index: lib/Target/Mips/MipsRegisterInfo.td =================================================================== --- lib/Target/Mips/MipsRegisterInfo.td +++ lib/Target/Mips/MipsRegisterInfo.td @@ -330,6 +330,12 @@ // Reserved K0_64, K1_64, GP_64, SP_64, FP_64, RA_64)>; +def GPRMM16_64 : RegisterClass<"Mips", [i64], 64, (add + // Callee save + S0_64, S1_64, + // Return Values and Arguments + V0_64, V1_64, A0_64, A1_64, A2_64, A3_64)>; + def CPU16Regs : RegisterClass<"Mips", [i32], 32, (add // Return Values and Arguments V0, V1, A0, A1, A2, A3, Index: test/CodeGen/Mips/micromips-addiu.ll =================================================================== --- test/CodeGen/Mips/micromips-addiu.ll +++ test/CodeGen/Mips/micromips-addiu.ll @@ -1,5 +1,7 @@ ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \ ; RUN: -relocation-model=pic -O3 < %s | FileCheck %s +; RUN: llc -march=mips -mcpu=mips64r6 -mattr=+micromips \ +; RUN: -relocation-model=pic -O3 < %s | FileCheck %s @x = global i32 65504, align 4 @y = global i32 60929, align 4 Index: test/CodeGen/Mips/micromips-gp-rc.ll =================================================================== --- test/CodeGen/Mips/micromips-gp-rc.ll +++ test/CodeGen/Mips/micromips-gp-rc.ll @@ -1,5 +1,7 @@ ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \ ; RUN: -relocation-model=pic -O3 < %s | FileCheck %s +; RUN: llc -march=mips -mcpu=mips64r6 -mattr=+micromips \ +; RUN: -relocation-model=pic -O3 < %s | FileCheck %s @g = external global i32