Index: docs/AMDGPUUsage.rst
===================================================================
--- docs/AMDGPUUsage.rst
+++ docs/AMDGPUUsage.rst
@@ -9,6 +9,30 @@
 the R600 family up until the current Volcanic Islands (GCN Gen 3).
 
 
+Conventions
+===========
+
+Address Spaces
+--------------
+
+The AMDGPU back-end uses the following address space mapping:
+
+   ============= ============================================
+   Address Space Memory Space
+   ============= ============================================
+   0             Private
+   1             Global (RAT0, VTX0)
+   2             Constant
+   3             Local
+   4             Flat
+   5             Region
+   6             Direct addressible parameter (CONST0)
+   7             Indirect addressible parameter memory (VTX1)
+   ============= ============================================
+
+The terminology in the table is from the OpenCL standard and applies only to the GPU; on the CPU all of the address spaces point to the same memory.
+
+
 Assembler
 =========