Index: include/llvm/IR/Intrinsics.td =================================================================== --- include/llvm/IR/Intrinsics.td +++ include/llvm/IR/Intrinsics.td @@ -382,8 +382,6 @@ def int_exp : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>; def int_exp2 : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>; def int_fabs : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>; - def int_minnum : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, LLVMMatchType<0>]>; - def int_maxnum : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, LLVMMatchType<0>]>; def int_copysign : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, LLVMMatchType<0>]>; def int_floor : Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>]>; @@ -396,6 +394,13 @@ [IntrNoMem]>; } +def int_minnum : Intrinsic<[llvm_anyfloat_ty], + [LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem, Commutative] +>; +def int_maxnum : Intrinsic<[llvm_anyfloat_ty], + [LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem, Commutative] +>; + // NOTE: these are internal interfaces. def int_setjmp : Intrinsic<[llvm_i32_ty], [llvm_ptr_ty]>; def int_longjmp : Intrinsic<[], [llvm_ptr_ty, llvm_i32_ty], [IntrNoReturn]>; Index: include/llvm/Target/TargetSelectionDAG.td =================================================================== --- include/llvm/Target/TargetSelectionDAG.td +++ include/llvm/Target/TargetSelectionDAG.td @@ -391,10 +391,14 @@ [SDNPOutGlue]>; def sube : SDNode<"ISD::SUBE" , SDTIntBinOp, [SDNPOutGlue, SDNPInGlue]>; -def smin : SDNode<"ISD::SMIN" , SDTIntBinOp>; -def smax : SDNode<"ISD::SMAX" , SDTIntBinOp>; -def umin : SDNode<"ISD::UMIN" , SDTIntBinOp>; -def umax : SDNode<"ISD::UMAX" , SDTIntBinOp>; +def smin : SDNode<"ISD::SMIN" , SDTIntBinOp, + [SDNPCommutative, SDNPAssociative]>; +def smax : SDNode<"ISD::SMAX" , SDTIntBinOp, + [SDNPCommutative, SDNPAssociative]>; +def umin : SDNode<"ISD::UMIN" , SDTIntBinOp, + [SDNPCommutative, SDNPAssociative]>; +def umax : SDNode<"ISD::UMAX" , SDTIntBinOp, + [SDNPCommutative, SDNPAssociative]>; def sext_inreg : SDNode<"ISD::SIGN_EXTEND_INREG", SDTExtInreg>; def bitreverse : SDNode<"ISD::BITREVERSE" , SDTIntUnaryOp>; @@ -421,8 +425,10 @@ def fma : SDNode<"ISD::FMA" , SDTFPTernaryOp>; def fmad : SDNode<"ISD::FMAD" , SDTFPTernaryOp>; def fabs : SDNode<"ISD::FABS" , SDTFPUnaryOp>; -def fminnum : SDNode<"ISD::FMINNUM" , SDTFPBinOp>; -def fmaxnum : SDNode<"ISD::FMAXNUM" , SDTFPBinOp>; +def fminnum : SDNode<"ISD::FMINNUM" , SDTFPBinOp, + [SDNPCommutative, SDNPAssociative]>; +def fmaxnum : SDNode<"ISD::FMAXNUM" , SDTFPBinOp, + [SDNPCommutative, SDNPAssociative]>; def fminnan : SDNode<"ISD::FMINNAN" , SDTFPBinOp>; def fmaxnan : SDNode<"ISD::FMAXNAN" , SDTFPBinOp>; def fgetsign : SDNode<"ISD::FGETSIGN" , SDTFPToIntOp>;