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AMDGPU: Implement read_register and write_register intrinsics
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Authored by arsenm on Jan 22 2016, 4:34 PM.

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tstellarAMD
Summary

Some of the special intrinsics now that now correspond to a instruction
also have special setting of some registers, e.g. llvm.SI.sendmsg sets
m0 as well as use s_sendmsg. Using these explicit register intrinsics
may be a better option.

Reading the exec mask and others may be useful for debugging. For this
I'm not sure this is entirely correct because we would want this to
be convergent, although it's possible this is already treated
sufficently conservatively.

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arsenm updated this revision to Diff 45766.Jan 22 2016, 4:34 PM
arsenm retitled this revision from to AMDGPU: Implement read_register and write_register intrinsics.
arsenm updated this object.
arsenm added a reviewer: tstellarAMD.
arsenm added a subscriber: llvm-commits.
tstellarAMD accepted this revision.Jan 25 2016, 7:18 PM
tstellarAMD edited edge metadata.

LGTM.

This revision is now accepted and ready to land.Jan 25 2016, 7:18 PM
arsenm closed this revision.Jan 25 2016, 8:34 PM

r258785