diff --git a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp --- a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp +++ b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp @@ -317,8 +317,9 @@ target.addLegalDialect(); target.addIllegalDialect(); target.addIllegalOp(); + LLVM::FCeilOp, LLVM::FFloorOp, LLVM::FRemOp, LLVM::LogOp, + LLVM::Log10Op, LLVM::Log2Op, LLVM::PowOp, LLVM::SinOp, + LLVM::SqrtOp>(); // TODO: Remove once we support replacing non-root ops. target.addLegalOp(); @@ -386,6 +387,8 @@ "__ocml_expm1_f64"); populateOpPatterns(converter, patterns, "__ocml_floor_f32", "__ocml_floor_f64"); + populateOpPatterns(converter, patterns, "__ocml_fmod_f32", + "__ocml_fmod_f64"); populateOpPatterns(converter, patterns, "__ocml_log_f32", "__ocml_log_f64"); populateOpPatterns(converter, patterns, "__ocml_log10_f32", diff --git a/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir b/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir --- a/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir +++ b/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir @@ -574,6 +574,21 @@ // ----- +gpu.module @test_module { + // CHECK: llvm.func @__ocml_fmod_f32(f32, f32) -> f32 + // CHECK: llvm.func @__ocml_fmod_f64(f64, f64) -> f64 + // CHECK-LABEL: func @gpu_fmod + func.func @gpu_fmod(%arg_f32 : f32, %arg_f64 : f64) -> (f32, f64) { + %result32 = arith.remf %arg_f32, %arg_f32 : f32 + // CHECK: llvm.call @__ocml_fmod_f32(%{{.*}}, %{{.*}}) : (f32, f32) -> f32 + %result64 = arith.remf %arg_f64, %arg_f64 : f64 + // CHECK: llvm.call @__ocml_fmod_f64(%{{.*}}, %{{.*}}) : (f64, f64) -> f64 + func.return %result32, %result64 : f32, f64 + } +} + +// ----- + gpu.module @test_module { // CHECK-LABEL: func @gpu_shuffle() func.func @gpu_shuffle() -> (f32, f32) { @@ -612,4 +627,4 @@ %shfli, %predi = gpu.shuffle idx %arg0, %arg1, %arg2 : f32 func.return %shfl, %shfli : f32, f32 } -} \ No newline at end of file +}