Index: llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
===================================================================
--- llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
+++ llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
@@ -36,7 +36,7 @@
 #include "X86GenAsmWriter.inc"
 
 void X86ATTInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
-  OS << markup("<reg:") << '%' << getRegisterName(Reg) << markup(">");
+  markup(OS, Markup::Register) << '%' << getRegisterName(Reg);
 }
 
 void X86ATTInstPrinter::printInst(const MCInst *MI, uint64_t Address,
@@ -386,7 +386,7 @@
   } else if (Op.isImm()) {
     // Print immediates as signed values.
     int64_t Imm = Op.getImm();
-    O << markup("<imm:") << '$' << formatImm(Imm) << markup(">");
+    markup(O, Markup::Immediate) << '$' << formatImm(Imm);
 
     // TODO: This should be in a helper function in the base class, so it can
     // be used by other printers.
@@ -405,9 +405,9 @@
     }
   } else {
     assert(Op.isExpr() && "unknown operand kind in printOperand");
-    O << markup("<imm:") << '$';
+    WithMarkup M = markup(O, Markup::Immediate);
+    O << '$';
     Op.getExpr()->print(O, &MAI);
-    O << markup(">");
   }
 }
 
@@ -427,7 +427,7 @@
   const MCOperand &IndexReg = MI->getOperand(Op + X86::AddrIndexReg);
   const MCOperand &DispSpec = MI->getOperand(Op + X86::AddrDisp);
 
-  O << markup("<mem:");
+  WithMarkup M = markup(O, Markup::Memory);
 
   // If this has a segment register, print it.
   printOptionalSegReg(MI, Op + X86::AddrSegmentReg, O);
@@ -451,19 +451,17 @@
       printOperand(MI, Op + X86::AddrIndexReg, O);
       unsigned ScaleVal = MI->getOperand(Op + X86::AddrScaleAmt).getImm();
       if (ScaleVal != 1) {
-        O << ',' << markup("<imm:") << ScaleVal // never printed in hex.
-          << markup(">");
+        O << ',';
+        markup(O, Markup::Immediate) << ScaleVal; // never printed in hex.
       }
     }
     O << ')';
   }
-
-  O << markup(">");
 }
 
 void X86ATTInstPrinter::printSrcIdx(const MCInst *MI, unsigned Op,
                                     raw_ostream &O) {
-  O << markup("<mem:");
+  WithMarkup M = markup(O, Markup::Memory);
 
   // If this has a segment register, print it.
   printOptionalSegReg(MI, Op + 1, O);
@@ -471,26 +469,22 @@
   O << "(";
   printOperand(MI, Op, O);
   O << ")";
-
-  O << markup(">");
 }
 
 void X86ATTInstPrinter::printDstIdx(const MCInst *MI, unsigned Op,
                                     raw_ostream &O) {
-  O << markup("<mem:");
+  WithMarkup M = markup(O, Markup::Memory);
 
   O << "%es:(";
   printOperand(MI, Op, O);
   O << ")";
-
-  O << markup(">");
 }
 
 void X86ATTInstPrinter::printMemOffset(const MCInst *MI, unsigned Op,
                                        raw_ostream &O) {
   const MCOperand &DispSpec = MI->getOperand(Op);
 
-  O << markup("<mem:");
+  WithMarkup M = markup(O, Markup::Memory);
 
   // If this has a segment register, print it.
   printOptionalSegReg(MI, Op + 1, O);
@@ -501,8 +495,6 @@
     assert(DispSpec.isExpr() && "non-immediate displacement?");
     DispSpec.getExpr()->print(O, &MAI);
   }
-
-  O << markup(">");
 }
 
 void X86ATTInstPrinter::printU8Imm(const MCInst *MI, unsigned Op,
@@ -510,8 +502,8 @@
   if (MI->getOperand(Op).isExpr())
     return printOperand(MI, Op, O);
 
-  O << markup("<imm:") << '$' << formatImm(MI->getOperand(Op).getImm() & 0xff)
-    << markup(">");
+  markup(O, Markup::Immediate)
+      << '$' << formatImm(MI->getOperand(Op).getImm() & 0xff);
 }
 
 void X86ATTInstPrinter::printSTiRegOperand(const MCInst *MI, unsigned OpNo,
@@ -520,7 +512,7 @@
   unsigned Reg = Op.getReg();
   // Override the default printing to print st(0) instead st.
   if (Reg == X86::ST0)
-    OS << markup("<reg:") << "%st(0)" << markup(">");
+    markup(OS, Markup::Register) << "%st(0)";
   else
     printRegName(OS, Reg);
 }
Index: llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
===================================================================
--- llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
+++ llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
@@ -322,15 +322,13 @@
 
   const MCOperand &Op = MI->getOperand(OpNo);
   if (Op.isImm()) {
-    O << markup("<imm:");
     if (PrintBranchImmAsAddress) {
       uint64_t Target = Address + Op.getImm();
       if (MAI.getCodePointerSize() == 4)
         Target &= 0xffffffff;
-      O << formatHex(Target);
+      markup(O, Markup::Target) << formatHex(Target);
     } else
-      O << formatImm(Op.getImm());
-    O << markup(">");
+      markup(O, Markup::Immediate) << formatImm(Op.getImm());
   } else {
     assert(Op.isExpr() && "unknown pcrel immediate operand");
     // If a symbolic branch target was added as a constant expression then print
@@ -338,7 +336,7 @@
     const MCConstantExpr *BranchTarget = dyn_cast<MCConstantExpr>(Op.getExpr());
     int64_t Address;
     if (BranchTarget && BranchTarget->evaluateAsAbsolute(Address)) {
-      O << markup("<imm:") << formatHex((uint64_t)Address) << markup(">");
+      markup(O, Markup::Immediate) << formatHex((uint64_t)Address);
     } else {
       // Otherwise, just print the expression.
       Op.getExpr()->print(O, &MAI);
Index: llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
===================================================================
--- llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
+++ llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
@@ -34,7 +34,7 @@
 #include "X86GenAsmWriter1.inc"
 
 void X86IntelInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
-  OS << markup("<reg:") << getRegisterName(Reg) << markup(">");
+  markup(OS, Markup::Register) << getRegisterName(Reg);
 }
 
 void X86IntelInstPrinter::printInst(const MCInst *MI, uint64_t Address,
@@ -361,7 +361,7 @@
   if (Op.isReg()) {
     printRegName(O, Op.getReg());
   } else if (Op.isImm()) {
-    O << markup("<imm:") << formatImm((int64_t)Op.getImm()) << markup(">");
+    markup(O, Markup::Immediate) << formatImm((int64_t)Op.getImm());
   } else {
     assert(Op.isExpr() && "unknown operand kind in printOperand");
     O << "offset ";
@@ -388,7 +388,8 @@
   // If this has a segment register, print it.
   printOptionalSegReg(MI, Op + X86::AddrSegmentReg, O);
 
-  O << markup("<mem:") << '[';
+  WithMarkup M = markup(O, Markup::Memory);
+  O << '[';
 
   bool NeedPlus = false;
   if (BaseReg.getReg()) {
@@ -419,28 +420,33 @@
           DispVal = -DispVal;
         }
       }
-      O << markup("<imm:") << formatImm(DispVal) << markup(">");
+      markup(O, Markup::Immediate) << formatImm(DispVal);
     }
   }
 
-  O << ']' << markup(">");
+  O << ']';
 }
 
 void X86IntelInstPrinter::printSrcIdx(const MCInst *MI, unsigned Op,
                                       raw_ostream &O) {
   // If this has a segment register, print it.
   printOptionalSegReg(MI, Op + 1, O);
-  O << markup("<mem:") << '[';
+
+  WithMarkup M = markup(O, Markup::Memory);
+  O << '[';
   printOperand(MI, Op, O);
-  O << ']' << markup(">");
+  O << ']';
 }
 
 void X86IntelInstPrinter::printDstIdx(const MCInst *MI, unsigned Op,
                                       raw_ostream &O) {
   // DI accesses are always ES-based.
-  O << "es:" << markup("<mem:") << '[';
+  O << "es:";
+
+  WithMarkup M = markup(O, Markup::Memory);
+  O << '[';
   printOperand(MI, Op, O);
-  O << ']' << markup(">");
+  O << ']';
 }
 
 void X86IntelInstPrinter::printMemOffset(const MCInst *MI, unsigned Op,
@@ -450,16 +456,17 @@
   // If this has a segment register, print it.
   printOptionalSegReg(MI, Op + 1, O);
 
-  O << markup("<mem:") << '[';
+  WithMarkup M = markup(O, Markup::Memory);
+  O << '[';
 
   if (DispSpec.isImm()) {
-    O << markup("<imm:") << formatImm(DispSpec.getImm()) << markup(">");
+    markup(O, Markup::Immediate) << formatImm(DispSpec.getImm());
   } else {
     assert(DispSpec.isExpr() && "non-immediate displacement?");
     DispSpec.getExpr()->print(O, &MAI);
   }
 
-  O << ']' << markup(">");
+  O << ']';
 }
 
 void X86IntelInstPrinter::printU8Imm(const MCInst *MI, unsigned Op,
@@ -467,8 +474,7 @@
   if (MI->getOperand(Op).isExpr())
     return MI->getOperand(Op).getExpr()->print(O, &MAI);
 
-  O << markup("<imm:") << formatImm(MI->getOperand(Op).getImm() & 0xff)
-    << markup(">");
+  markup(O, Markup::Immediate) << formatImm(MI->getOperand(Op).getImm() & 0xff);
 }
 
 void X86IntelInstPrinter::printSTiRegOperand(const MCInst *MI, unsigned OpNo,