diff --git a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp
--- a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp
@@ -169,15 +169,17 @@
 
   // -mno-unaligned-access is default, unless -munaligned-access is specified.
   bool HasV = llvm::is_contained(Features, "+zve32x");
-  if (Args.hasFlag(options::OPT_munaligned_access,
-                   options::OPT_mno_unaligned_access, false)) {
-    Features.push_back("+unaligned-scalar-mem");
-    if (HasV)
-      Features.push_back("+unaligned-vector-mem");
-  } else {
-    Features.push_back("-unaligned-scalar-mem");
-    if (HasV)
-      Features.push_back("-unaligned-vector-mem");
+  if (const Arg *A = Args.getLastArg(options::OPT_munaligned_access,
+                                     options::OPT_mno_unaligned_access)) {
+    if (A->getOption().matches(options::OPT_munaligned_access)) {
+      Features.push_back("+unaligned-scalar-mem");
+      if (HasV)
+        Features.push_back("+unaligned-vector-mem");
+    } else {
+      Features.push_back("-unaligned-scalar-mem");
+      if (HasV)
+        Features.push_back("-unaligned-vector-mem");
+    }
   }
 
   // Now add any that the user explicitly requested on the command line,
diff --git a/clang/test/Driver/riscv-default-features.c b/clang/test/Driver/riscv-default-features.c
--- a/clang/test/Driver/riscv-default-features.c
+++ b/clang/test/Driver/riscv-default-features.c
@@ -3,10 +3,8 @@
 
 // RV32: "target-features"="+32bit,+a,+c,+m,+relax,
 // RV32-SAME: -save-restore
-// RV32-SAME: -unaligned-scalar-mem
 // RV64: "target-features"="+64bit,+a,+c,+m,+relax,
 // RV64-SAME: -save-restore
-// RV64-SAME: -unaligned-scalar-mem
 
 // Dummy function
 int foo(void){
diff --git a/clang/test/Driver/riscv-features.c b/clang/test/Driver/riscv-features.c
--- a/clang/test/Driver/riscv-features.c
+++ b/clang/test/Driver/riscv-features.c
@@ -39,8 +39,6 @@
 // NO-UNALIGNED-SCALAR-MEM: "-target-feature" "-unaligned-scalar-mem"
 // UNALIGNED-VECTOR-MEM: "-target-feature" "+unaligned-vector-mem"
 // NO-UNALIGNED-VECTOR-MEM: "-target-feature" "-unaligned-vector-mem"
-// DEFAULT: "-target-feature" "-unaligned-scalar-mem"
-// DEFAULT-NOT: "-target-feature" "+unaligned-scalar-mem"
 
 // RUN: %clang --target=riscv32-linux -### %s -fsyntax-only 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=DEFAULT-LINUX
diff --git a/llvm/lib/Target/RISCV/RISCVProcessors.td b/llvm/lib/Target/RISCV/RISCVProcessors.td
--- a/llvm/lib/Target/RISCV/RISCVProcessors.td
+++ b/llvm/lib/Target/RISCV/RISCVProcessors.td
@@ -181,7 +181,8 @@
                                        FeatureStdExtZfh,
                                        FeatureStdExtZvfh,
                                        FeatureStdExtZba,
-                                       FeatureStdExtZbb],
+                                       FeatureStdExtZbb,
+                                       FeatureUnalignedScalarMem],
                                       [TuneSiFive7,
                                        TuneDLenFactor2]>;