Index: llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp =================================================================== --- llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp +++ llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp @@ -903,7 +903,23 @@ return replaceOperand(II, 0, FAbsSrc); } - // TODO: is.fpclass(x, fcInf) -> fabs(x) == inf + if ((OrderedMask == fcInf || OrderedInvertedMask == fcInf) && + (IsOrdered || IsUnordered) && !IsStrict) { + // is.fpclass(x, fcInf) -> fcmp oeq fabs(x), +inf + // is.fpclass(x, ~fcInf) -> fcmp one fabs(x), +inf + // is.fpclass(x, fcInf|fcNan) -> fcmp ueq fabs(x), +inf + // is.fpclass(x, ~(fcInf|fcNan)) -> fcmp une fabs(x), +inf + Constant *Inf = ConstantFP::getInfinity(Src0->getType()); + FCmpInst::Predicate Pred = + IsUnordered ? FCmpInst::FCMP_UEQ : FCmpInst::FCMP_OEQ; + if (OrderedInvertedMask == fcInf) + Pred = IsUnordered ? FCmpInst::FCMP_UNE : FCmpInst::FCMP_ONE; + + Value *Fabs = Builder.CreateUnaryIntrinsic(Intrinsic::fabs, Src0); + Value *CmpInf = Builder.CreateFCmp(Pred, Fabs, Inf); + CmpInf->takeName(&II); + return replaceInstUsesWith(II, CmpInf); + } if ((OrderedMask == fcPosInf || OrderedMask == fcNegInf) && (IsOrdered || IsUnordered) && !IsStrict) { Index: llvm/test/Transforms/InstCombine/and-fcmp.ll =================================================================== --- llvm/test/Transforms/InstCombine/and-fcmp.ll +++ llvm/test/Transforms/InstCombine/and-fcmp.ll @@ -4794,7 +4794,8 @@ define i1 @clang_builtin_isnormal_inf_check_oge(half %x) { ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_oge( -; CHECK-NEXT: [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 516) +; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) +; CHECK-NEXT: [[AND:%.*]] = fcmp oeq half [[TMP1]], 0xH7C00 ; CHECK-NEXT: ret i1 [[AND]] ; %fabs.x = call half @llvm.fabs.f16(half %x) @@ -4806,7 +4807,8 @@ define i1 @clang_builtin_isnormal_inf_check_olt(half %x) { ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_olt( -; CHECK-NEXT: [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 504) +; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) +; CHECK-NEXT: [[AND:%.*]] = fcmp one half [[TMP1]], 0xH7C00 ; CHECK-NEXT: ret i1 [[AND]] ; %fabs.x = call half @llvm.fabs.f16(half %x) @@ -4833,7 +4835,8 @@ define i1 @clang_builtin_isnormal_inf_check_oeq(half %x) { ; CHECK-LABEL: @clang_builtin_isnormal_inf_check_oeq( -; CHECK-NEXT: [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 516) +; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) +; CHECK-NEXT: [[AND:%.*]] = fcmp oeq half [[TMP1]], 0xH7C00 ; CHECK-NEXT: ret i1 [[AND]] ; %fabs.x = call half @llvm.fabs.f16(half %x) Index: llvm/test/Transforms/InstCombine/combine-is.fpclass-and-fcmp.ll =================================================================== --- llvm/test/Transforms/InstCombine/combine-is.fpclass-and-fcmp.ll +++ llvm/test/Transforms/InstCombine/combine-is.fpclass-and-fcmp.ll @@ -135,7 +135,8 @@ define i1 @fcmp_isfinite_or_class_subnormal(half %x) { ; CHECK-LABEL: @fcmp_isfinite_or_class_subnormal( -; CHECK-NEXT: [[SUBNORMAL_CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 504) +; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) +; CHECK-NEXT: [[SUBNORMAL_CLASS:%.*]] = fcmp one half [[TMP1]], 0xH7C00 ; CHECK-NEXT: ret i1 [[SUBNORMAL_CLASS]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -148,8 +149,9 @@ ; -> isfinite define i1 @fcmp_issubnormal_or_class_finite(half %x) { ; CHECK-LABEL: @fcmp_issubnormal_or_class_finite( -; CHECK-NEXT: [[IS_FINITE_CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 504) -; CHECK-NEXT: ret i1 [[IS_FINITE_CLASS]] +; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) +; CHECK-NEXT: [[OR:%.*]] = fcmp one half [[TMP1]], 0xH7C00 +; CHECK-NEXT: ret i1 [[OR]] ; %fabs = call half @llvm.fabs.f16(half %x) %is.subnormal = fcmp olt half %fabs, 0xH0400 @@ -161,8 +163,9 @@ ; -> isfinite define i1 @class_finite_or_fcmp_issubnormal(half %x) { ; CHECK-LABEL: @class_finite_or_fcmp_issubnormal( -; CHECK-NEXT: [[IS_FINITE_CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 504) -; CHECK-NEXT: ret i1 [[IS_FINITE_CLASS]] +; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) +; CHECK-NEXT: [[OR:%.*]] = fcmp one half [[TMP1]], 0xH7C00 +; CHECK-NEXT: ret i1 [[OR]] ; %fabs = call half @llvm.fabs.f16(half %x) %is.subnormal = fcmp olt half %fabs, 0xH0400 @@ -174,8 +177,8 @@ ; -> issubnormal define i1 @fcmp_issubnormal_and_class_finite(half %x) { ; CHECK-LABEL: @fcmp_issubnormal_and_class_finite( -; CHECK-NEXT: [[IS_FINITE_CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 240) -; CHECK-NEXT: ret i1 [[IS_FINITE_CLASS]] +; CHECK-NEXT: [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 240) +; CHECK-NEXT: ret i1 [[AND]] ; %fabs = call half @llvm.fabs.f16(half %x) %is.subnormal = fcmp olt half %fabs, 0xH0400 @@ -186,8 +189,8 @@ define i1 @class_inf_or_fcmp_issubnormal(half %x) { ; CHECK-LABEL: @class_inf_or_fcmp_issubnormal( -; CHECK-NEXT: [[IS_INF_CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 756) -; CHECK-NEXT: ret i1 [[IS_INF_CLASS]] +; CHECK-NEXT: [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 756) +; CHECK-NEXT: ret i1 [[OR]] ; %fabs = call half @llvm.fabs.f16(half %x) %is.subnormal = fcmp olt half %fabs, 0xH0400 @@ -199,8 +202,9 @@ ; -> isfinite define <2 x i1> @class_finite_or_fcmp_issubnormal_vector(<2 x half> %x) { ; CHECK-LABEL: @class_finite_or_fcmp_issubnormal_vector( -; CHECK-NEXT: [[IS_FINITE_CLASS:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f16(<2 x half> [[X:%.*]], i32 504) -; CHECK-NEXT: ret <2 x i1> [[IS_FINITE_CLASS]] +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x half> @llvm.fabs.v2f16(<2 x half> [[X:%.*]]) +; CHECK-NEXT: [[OR:%.*]] = fcmp one <2 x half> [[TMP1]], +; CHECK-NEXT: ret <2 x i1> [[OR]] ; %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x) %is.subnormal = fcmp olt <2 x half> %fabs, Index: llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll =================================================================== --- llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll +++ llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll @@ -250,7 +250,8 @@ ; Negative test define i1 @oeq_0_or_fabs_ult_inf(half %x) { ; CHECK-LABEL: @oeq_0_or_fabs_ult_inf( -; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 507) +; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) +; CHECK-NEXT: [[CLASS:%.*]] = fcmp une half [[TMP1]], 0xH7C00 ; CHECK-NEXT: ret i1 [[CLASS]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -623,7 +624,8 @@ define i1 @issubnormal_or_finite_olt(half %x) { ; CHECK-LABEL: @issubnormal_or_finite_olt( -; CHECK-NEXT: [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 504) +; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) +; CHECK-NEXT: [[OR:%.*]] = fcmp one half [[TMP1]], 0xH7C00 ; CHECK-NEXT: ret i1 [[OR]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -724,7 +726,8 @@ define i1 @is_finite_or_uno(half %x) { ; CHECK-LABEL: @is_finite_or_uno( -; CHECK-NEXT: [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 519) +; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) +; CHECK-NEXT: [[OR:%.*]] = fcmp ueq half [[TMP1]], 0xH7C00 ; CHECK-NEXT: ret i1 [[OR]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -736,7 +739,8 @@ define i1 @oeq_isinf_or_uno(half %x) { ; CHECK-LABEL: @oeq_isinf_or_uno( -; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 519) +; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) +; CHECK-NEXT: [[CLASS:%.*]] = fcmp ueq half [[TMP1]], 0xH7C00 ; CHECK-NEXT: ret i1 [[CLASS]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -771,7 +775,8 @@ define i1 @oeq_isinf_and_ord(half %x) { ; CHECK-LABEL: @oeq_isinf_and_ord( -; CHECK-NEXT: [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 516) +; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) +; CHECK-NEXT: [[AND:%.*]] = fcmp oeq half [[TMP1]], 0xH7C00 ; CHECK-NEXT: ret i1 [[AND]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -902,7 +907,8 @@ ; -> pinf|ninf define i1 @isnormalinf_and_inf(half %x) #0 { ; CHECK-LABEL: @isnormalinf_and_inf( -; CHECK-NEXT: [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 516) +; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) +; CHECK-NEXT: [[AND:%.*]] = fcmp oeq half [[TMP1]], 0xH7C00 ; CHECK-NEXT: ret i1 [[AND]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -970,7 +976,8 @@ ; -> ~ninf define i1 @not_isnormalinf_or_inf(half %x) #0 { ; CHECK-LABEL: @not_isnormalinf_or_inf( -; CHECK-NEXT: [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 507) +; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) +; CHECK-NEXT: [[OR:%.*]] = fcmp une half [[TMP1]], 0xH7C00 ; CHECK-NEXT: ret i1 [[OR]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -1287,7 +1294,8 @@ define i1 @oge_fabs_eq_inf_and_ord(half %x) #0 { ; CHECK-LABEL: @oge_fabs_eq_inf_and_ord( -; CHECK-NEXT: [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 516) +; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) +; CHECK-NEXT: [[AND:%.*]] = fcmp oeq half [[TMP1]], 0xH7C00 ; CHECK-NEXT: ret i1 [[AND]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -1310,7 +1318,8 @@ define i1 @oge_fabs_eq_inf_or_uno(half %x) #0 { ; CHECK-LABEL: @oge_fabs_eq_inf_or_uno( -; CHECK-NEXT: [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 519) +; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) +; CHECK-NEXT: [[OR:%.*]] = fcmp ueq half [[TMP1]], 0xH7C00 ; CHECK-NEXT: ret i1 [[OR]] ; %fabs = call half @llvm.fabs.f16(half %x) @@ -1357,7 +1366,8 @@ define i1 @ult_fabs_eq_inf_or_uno(half %x) #0 { ; CHECK-LABEL: @ult_fabs_eq_inf_or_uno( -; CHECK-NEXT: [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 507) +; CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.fabs.f16(half [[X:%.*]]) +; CHECK-NEXT: [[OR:%.*]] = fcmp une half [[TMP1]], 0xH7C00 ; CHECK-NEXT: ret i1 [[OR]] ; %fabs = call half @llvm.fabs.f16(half %x) Index: llvm/test/Transforms/InstCombine/is_fpclass.ll =================================================================== --- llvm/test/Transforms/InstCombine/is_fpclass.ll +++ llvm/test/Transforms/InstCombine/is_fpclass.ll @@ -107,7 +107,7 @@ define i1 @test_class_isnan_f32_strict(float %x) strictfp { ; CHECK-LABEL: @test_class_isnan_f32_strict( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 3) #[[ATTR6:[0-9]+]] +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 3) #[[ATTR0:[0-9]+]] ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 3) strictfp @@ -333,7 +333,7 @@ define i1 @test_class_is_not_p0_n0_f32_strict(float %x) strictfp { ; CHECK-LABEL: @test_class_is_not_p0_n0_f32_strict( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 927) #[[ATTR6]] +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 927) #[[ATTR0]] ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 927) strictfp ; ~fcZero & fcAllFlags @@ -387,7 +387,7 @@ define i1 @test_class_is_p0_n0_f32_strict(float %x) strictfp { ; CHECK-LABEL: @test_class_is_p0_n0_f32_strict( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 96) #[[ATTR6]] +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 96) #[[ATTR0]] ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 96) strictfp @@ -540,7 +540,8 @@ define i1 @test_class_is_inf_f32(float %x) { ; CHECK-LABEL: @test_class_is_inf_f32( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 516) +; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]]) +; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq float [[TMP1]], 0x7FF0000000000000 ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 516) ; fcInf @@ -549,7 +550,8 @@ define <2 x i1> @test_class_is_inf_v2f32(<2 x float> %x) { ; CHECK-LABEL: @test_class_is_inf_v2f32( -; CHECK-NEXT: [[VAL:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[X:%.*]], i32 516) +; CHECK-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.fabs.v2f32(<2 x float> [[X:%.*]]) +; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq <2 x float> [[TMP1]], ; CHECK-NEXT: ret <2 x i1> [[VAL]] ; %val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 516) ; fcInf @@ -558,7 +560,8 @@ define i1 @test_class_is_inf_or_nan_f32(float %x) { ; CHECK-LABEL: @test_class_is_inf_or_nan_f32( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 519) +; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]]) +; CHECK-NEXT: [[VAL:%.*]] = fcmp ueq float [[TMP1]], 0x7FF0000000000000 ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 519) ; fcInf|fcNan @@ -567,7 +570,7 @@ define i1 @test_class_is_pinf_f32_strict(float %x) strictfp { ; CHECK-LABEL: @test_class_is_pinf_f32_strict( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 512) #[[ATTR6]] +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 512) #[[ATTR0]] ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 512) strictfp ; fcPosInf @@ -576,7 +579,7 @@ define i1 @test_class_is_ninf_f32_strict(float %x) strictfp { ; CHECK-LABEL: @test_class_is_ninf_f32_strict( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 4) #[[ATTR6]] +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 4) #[[ATTR0]] ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 4) strictfp ; fcNegInf @@ -585,7 +588,7 @@ define i1 @test_class_is_inf_f32_strict(float %x) strictfp { ; CHECK-LABEL: @test_class_is_inf_f32_strict( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 516) #[[ATTR6]] +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 516) #[[ATTR0]] ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 516) strictfp ; fcInf @@ -594,7 +597,7 @@ define i1 @test_class_is_pinf_or_nan_f32_strict(float %x) strictfp { ; CHECK-LABEL: @test_class_is_pinf_or_nan_f32_strict( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 515) #[[ATTR6]] +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 515) #[[ATTR0]] ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 515) strictfp ; fcPosInf|fcNan @@ -603,7 +606,7 @@ define i1 @test_class_is_ninf_or_nan_f32_strict(float %x) strictfp { ; CHECK-LABEL: @test_class_is_ninf_or_nan_f32_strict( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 7) #[[ATTR6]] +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 7) #[[ATTR0]] ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 7) strictfp ; fcNegInf|fcNan @@ -612,7 +615,7 @@ define i1 @test_class_is_inf_or_nan_f32_strict(float %x) strictfp { ; CHECK-LABEL: @test_class_is_inf_or_nan_f32_strict( -; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 519) #[[ATTR6]] +; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 519) #[[ATTR0]] ; CHECK-NEXT: ret i1 [[VAL]] ; %val = call i1 @llvm.is.fpclass.f32(float %x, i32 519) strictfp ; fcInf|fcNan @@ -949,7 +952,8 @@ define i1 @test_class_not_is_inf_nan(float %x) { ; CHECK-LABEL: @test_class_not_is_inf_nan( -; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 504) +; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]]) +; CHECK-NEXT: [[CLASS:%.*]] = fcmp one float [[TMP1]], 0x7FF0000000000000 ; CHECK-NEXT: ret i1 [[CLASS]] ; %class = call i1 @llvm.is.fpclass.f32(float %x, i32 519) @@ -1739,7 +1743,7 @@ ; -> ninf|pnormal|negsubnormal|pzero|snan define i1 @test_class_fneg_posinf_negnormal_possubnormal_negzero_snan_strictfp(float %arg) strictfp { ; CHECK-LABEL: @test_class_fneg_posinf_negnormal_possubnormal_negzero_snan_strictfp( -; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 341) #[[ATTR6]] +; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 341) #[[ATTR0]] ; CHECK-NEXT: ret i1 [[CLASS]] ; %fneg = fneg float %arg @@ -1893,7 +1897,8 @@ ; -> posinf define i1 @test_class_fabs_posinf(float %arg) { ; CHECK-LABEL: @test_class_fabs_posinf( -; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 516) +; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[ARG:%.*]]) +; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[TMP1]], 0x7FF0000000000000 ; CHECK-NEXT: ret i1 [[CLASS]] ; %fabs = call float @llvm.fabs.f32(float %arg) @@ -2070,7 +2075,7 @@ ; -> pinf|psubnormal|snan define i1 @test_class_fabs_posinf_negnormal_possubnormal_negzero_snan_strictfp(float %arg) strictfp { ; CHECK-LABEL: @test_class_fabs_posinf_negnormal_possubnormal_negzero_snan_strictfp( -; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 661) #[[ATTR6]] +; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 661) #[[ATTR0]] ; CHECK-NEXT: ret i1 [[CLASS]] ; %fabs = call float @llvm.fabs.f32(float %arg) strictfp @@ -2150,7 +2155,8 @@ define i1 @test_class_fneg_fabs_neginf(float %arg) { ; CHECK-LABEL: @test_class_fneg_fabs_neginf( -; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 516) +; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[ARG:%.*]]) +; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[TMP1]], 0x7FF0000000000000 ; CHECK-NEXT: ret i1 [[CLASS]] ; %fabs = call float @llvm.fabs.f32(float %arg) @@ -2400,7 +2406,7 @@ ; strictfp doesn't matter define i1 @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero_snan_strictfp(float %arg) strictfp { ; CHECK-LABEL: @test_class_fneg_fabs_posinf_negnormal_possubnormal_negzero_snan_strictfp( -; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 361) #[[ATTR6]] +; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 361) #[[ATTR0]] ; CHECK-NEXT: ret i1 [[CLASS]] ; %fabs = call float @llvm.fabs.f32(float %arg) strictfp @@ -2524,7 +2530,8 @@ define i1 @test_class_is_inf_or_nan_nozero_src(float nofpclass(zero) %arg) { ; CHECK-LABEL: @test_class_is_inf_or_nan_nozero_src( -; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 519) +; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[ARG:%.*]]) +; CHECK-NEXT: [[CLASS:%.*]] = fcmp ueq float [[TMP1]], 0x7FF0000000000000 ; CHECK-NEXT: ret i1 [[CLASS]] ; %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 519) @@ -2533,7 +2540,8 @@ define i1 @test_class_is_inf_or_nan_noinf_src(float nofpclass(inf) %arg) { ; CHECK-LABEL: @test_class_is_inf_or_nan_noinf_src( -; CHECK-NEXT: [[CLASS:%.*]] = fcmp uno float [[ARG:%.*]], 0.000000e+00 +; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[ARG:%.*]]) +; CHECK-NEXT: [[CLASS:%.*]] = fcmp ueq float [[TMP1]], 0x7FF0000000000000 ; CHECK-NEXT: ret i1 [[CLASS]] ; %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 519) @@ -2542,7 +2550,8 @@ define i1 @test_class_is_inf_or_nan_nonan_src(float nofpclass(nan) %arg) { ; CHECK-LABEL: @test_class_is_inf_or_nan_nonan_src( -; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 516) +; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[ARG:%.*]]) +; CHECK-NEXT: [[CLASS:%.*]] = fcmp ueq float [[TMP1]], 0x7FF0000000000000 ; CHECK-NEXT: ret i1 [[CLASS]] ; %class = call i1 @llvm.is.fpclass.f32(float %arg, i32 519)