Index: llvm/trunk/lib/Target/Mips/MipsFastISel.cpp
===================================================================
--- llvm/trunk/lib/Target/Mips/MipsFastISel.cpp
+++ llvm/trunk/lib/Target/Mips/MipsFastISel.cpp
@@ -192,7 +192,8 @@
         TII(*Subtarget->getInstrInfo()), TLI(*Subtarget->getTargetLowering()) {
     MFI = funcInfo.MF->getInfo<MipsFunctionInfo>();
     Context = &funcInfo.Fn->getContext();
-    bool ISASupported = !Subtarget->hasMips32r6() && Subtarget->hasMips32();
+    bool ISASupported = !Subtarget->hasMips32r6() &&
+                        !Subtarget->inMicroMipsMode() && Subtarget->hasMips32();
     TargetSupported =
         ISASupported && (TM.getRelocationModel() == Reloc::PIC_) &&
         (static_cast<const MipsTargetMachine &>(TM).getABI().IsO32());
Index: llvm/trunk/test/CodeGen/Mips/Fast-ISel/check-disabled-mcpus.ll
===================================================================
--- llvm/trunk/test/CodeGen/Mips/Fast-ISel/check-disabled-mcpus.ll
+++ llvm/trunk/test/CodeGen/Mips/Fast-ISel/check-disabled-mcpus.ll
@@ -7,6 +7,8 @@
 
 ; RUN: llc -march=mips -mcpu=mips32r6 -O0 -relocation-model=pic \
 ; RUN:     -fast-isel-verbose <%s 2>&1 | FileCheck %s
+; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+micromips -O0 -relocation-model=pic \
+; RUN:     -fast-isel-verbose <%s 2>&1 | FileCheck %s
 
 ; RUN: llc -march=mips -mcpu=mips64 -O0 -relocation-model=pic \
 ; RUN:     -fast-isel-verbose <%s 2>&1 | FileCheck %s
Index: llvm/trunk/test/CodeGen/Mips/micromips-zero-mat-uses.ll
===================================================================
--- llvm/trunk/test/CodeGen/Mips/micromips-zero-mat-uses.ll
+++ llvm/trunk/test/CodeGen/Mips/micromips-zero-mat-uses.ll
@@ -1,8 +0,0 @@
-; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+micromips,+nooddspreg -O0 < %s | FileCheck %s
-
-; CHECK: addiu    $[[R0:[0-9]+]], $zero, 0
-; CHECK: subu16   $2, $[[R0]], ${{[0-9]+}}
-define i32 @foo() {
-  %1 = sub i32 0, undef
-  ret i32 %1
-}