diff --git a/llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll b/llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll
@@ -0,0 +1,195 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -verify-machineinstrs -no-integrated-as < %s \
+; RUN:   | FileCheck -check-prefixes=RV32I %s
+; RUN: llc -mtriple=riscv64 -verify-machineinstrs -no-integrated-as < %s \
+; RUN:   | FileCheck -check-prefixes=RV64I %s
+; RUN: llc -mtriple=riscv32 -relocation-model=pic -verify-machineinstrs -no-integrated-as < %s \
+; RUN:   | FileCheck -check-prefixes=RV32I-PIC %s
+; RUN: llc -mtriple=riscv64 -relocation-model=pic -verify-machineinstrs -no-integrated-as < %s \
+; RUN:   | FileCheck -check-prefixes=RV64I-PIC %s
+
+define void @constraint_m_1(ptr %a) nounwind {
+; RV32I-LABEL: constraint_m_1:
+; RV32I:       # %bb.0:
+; RV32I-NEXT:    #APP
+; RV32I-NEXT:    #NO_APP
+; RV32I-NEXT:    ret
+;
+; RV64I-LABEL: constraint_m_1:
+; RV64I:       # %bb.0:
+; RV64I-NEXT:    #APP
+; RV64I-NEXT:    #NO_APP
+; RV64I-NEXT:    ret
+;
+; RV32I-PIC-LABEL: constraint_m_1:
+; RV32I-PIC:       # %bb.0:
+; RV32I-PIC-NEXT:    #APP
+; RV32I-PIC-NEXT:    #NO_APP
+; RV32I-PIC-NEXT:    ret
+;
+; RV64I-PIC-LABEL: constraint_m_1:
+; RV64I-PIC:       # %bb.0:
+; RV64I-PIC-NEXT:    #APP
+; RV64I-PIC-NEXT:    #NO_APP
+; RV64I-PIC-NEXT:    ret
+  call void asm sideeffect "", "=*m"(ptr elementtype(i32) %a)
+  ret void
+}
+
+define i32 @constraint_m_2(ptr %a) nounwind {
+; RV32I-LABEL: constraint_m_2:
+; RV32I:       # %bb.0:
+; RV32I-NEXT:    #APP
+; RV32I-NEXT:    lw a0, 0(a0)
+; RV32I-NEXT:    #NO_APP
+; RV32I-NEXT:    ret
+;
+; RV64I-LABEL: constraint_m_2:
+; RV64I:       # %bb.0:
+; RV64I-NEXT:    #APP
+; RV64I-NEXT:    lw a0, 0(a0)
+; RV64I-NEXT:    #NO_APP
+; RV64I-NEXT:    ret
+;
+; RV32I-PIC-LABEL: constraint_m_2:
+; RV32I-PIC:       # %bb.0:
+; RV32I-PIC-NEXT:    #APP
+; RV32I-PIC-NEXT:    lw a0, 0(a0)
+; RV32I-PIC-NEXT:    #NO_APP
+; RV32I-PIC-NEXT:    ret
+;
+; RV64I-PIC-LABEL: constraint_m_2:
+; RV64I-PIC:       # %bb.0:
+; RV64I-PIC-NEXT:    #APP
+; RV64I-PIC-NEXT:    lw a0, 0(a0)
+; RV64I-PIC-NEXT:    #NO_APP
+; RV64I-PIC-NEXT:    ret
+  %1 = tail call i32 asm "lw $0, $1", "=r,*m"(ptr elementtype(i32) %a)
+  ret i32 %1
+}
+
+define i32 @constraint_m_with_offset(ptr %a) nounwind {
+; RV32I-LABEL: constraint_m_with_offset:
+; RV32I:       # %bb.0:
+; RV32I-NEXT:    #APP
+; RV32I-NEXT:    lw a0, 4(a0)
+; RV32I-NEXT:    #NO_APP
+; RV32I-NEXT:    ret
+;
+; RV64I-LABEL: constraint_m_with_offset:
+; RV64I:       # %bb.0:
+; RV64I-NEXT:    #APP
+; RV64I-NEXT:    lw a0, 4(a0)
+; RV64I-NEXT:    #NO_APP
+; RV64I-NEXT:    ret
+;
+; RV32I-PIC-LABEL: constraint_m_with_offset:
+; RV32I-PIC:       # %bb.0:
+; RV32I-PIC-NEXT:    #APP
+; RV32I-PIC-NEXT:    lw a0, 4(a0)
+; RV32I-PIC-NEXT:    #NO_APP
+; RV32I-PIC-NEXT:    ret
+;
+; RV64I-PIC-LABEL: constraint_m_with_offset:
+; RV64I-PIC:       # %bb.0:
+; RV64I-PIC-NEXT:    #APP
+; RV64I-PIC-NEXT:    lw a0, 4(a0)
+; RV64I-PIC-NEXT:    #NO_APP
+; RV64I-PIC-NEXT:    ret
+  %1 = getelementptr i32, ptr %a, i32 1
+  %2 = tail call i32 asm "lw $0, $1", "=r,*m"(ptr elementtype(i32) %1)
+  ret i32 %2
+}
+
+define void @constraint_o_1(ptr %a) nounwind {
+; RV32I-LABEL: constraint_o_1:
+; RV32I:       # %bb.0:
+; RV32I-NEXT:    #APP
+; RV32I-NEXT:    #NO_APP
+; RV32I-NEXT:    ret
+;
+; RV64I-LABEL: constraint_o_1:
+; RV64I:       # %bb.0:
+; RV64I-NEXT:    #APP
+; RV64I-NEXT:    #NO_APP
+; RV64I-NEXT:    ret
+;
+; RV32I-PIC-LABEL: constraint_o_1:
+; RV32I-PIC:       # %bb.0:
+; RV32I-PIC-NEXT:    #APP
+; RV32I-PIC-NEXT:    #NO_APP
+; RV32I-PIC-NEXT:    ret
+;
+; RV64I-PIC-LABEL: constraint_o_1:
+; RV64I-PIC:       # %bb.0:
+; RV64I-PIC-NEXT:    #APP
+; RV64I-PIC-NEXT:    #NO_APP
+; RV64I-PIC-NEXT:    ret
+  call void asm sideeffect "", "=*o"(ptr elementtype(i32) %a)
+  ret void
+}
+
+define i32 @constraint_o_2(ptr %a) nounwind {
+; RV32I-LABEL: constraint_o_2:
+; RV32I:       # %bb.0:
+; RV32I-NEXT:    #APP
+; RV32I-NEXT:    lw a0, 0(a0)
+; RV32I-NEXT:    #NO_APP
+; RV32I-NEXT:    ret
+;
+; RV64I-LABEL: constraint_o_2:
+; RV64I:       # %bb.0:
+; RV64I-NEXT:    #APP
+; RV64I-NEXT:    lw a0, 0(a0)
+; RV64I-NEXT:    #NO_APP
+; RV64I-NEXT:    ret
+;
+; RV32I-PIC-LABEL: constraint_o_2:
+; RV32I-PIC:       # %bb.0:
+; RV32I-PIC-NEXT:    #APP
+; RV32I-PIC-NEXT:    lw a0, 0(a0)
+; RV32I-PIC-NEXT:    #NO_APP
+; RV32I-PIC-NEXT:    ret
+;
+; RV64I-PIC-LABEL: constraint_o_2:
+; RV64I-PIC:       # %bb.0:
+; RV64I-PIC-NEXT:    #APP
+; RV64I-PIC-NEXT:    lw a0, 0(a0)
+; RV64I-PIC-NEXT:    #NO_APP
+; RV64I-PIC-NEXT:    ret
+  %1 = tail call i32 asm "lw $0, $1", "=r,*o"(ptr elementtype(i32) %a)
+  ret i32 %1
+}
+
+define i32 @constraint_o_with_offset(ptr %a) nounwind {
+; RV32I-LABEL: constraint_o_with_offset:
+; RV32I:       # %bb.0:
+; RV32I-NEXT:    #APP
+; RV32I-NEXT:    lw a0, 4(a0)
+; RV32I-NEXT:    #NO_APP
+; RV32I-NEXT:    ret
+;
+; RV64I-LABEL: constraint_o_with_offset:
+; RV64I:       # %bb.0:
+; RV64I-NEXT:    #APP
+; RV64I-NEXT:    lw a0, 4(a0)
+; RV64I-NEXT:    #NO_APP
+; RV64I-NEXT:    ret
+;
+; RV32I-PIC-LABEL: constraint_o_with_offset:
+; RV32I-PIC:       # %bb.0:
+; RV32I-PIC-NEXT:    #APP
+; RV32I-PIC-NEXT:    lw a0, 4(a0)
+; RV32I-PIC-NEXT:    #NO_APP
+; RV32I-PIC-NEXT:    ret
+;
+; RV64I-PIC-LABEL: constraint_o_with_offset:
+; RV64I-PIC:       # %bb.0:
+; RV64I-PIC-NEXT:    #APP
+; RV64I-PIC-NEXT:    lw a0, 4(a0)
+; RV64I-PIC-NEXT:    #NO_APP
+; RV64I-PIC-NEXT:    ret
+  %1 = getelementptr i32, ptr %a, i32 1
+  %2 = tail call i32 asm "lw $0, $1", "=r,*o"(ptr elementtype(i32) %1)
+  ret i32 %2
+}
diff --git a/llvm/test/CodeGen/RISCV/inline-asm.ll b/llvm/test/CodeGen/RISCV/inline-asm.ll
--- a/llvm/test/CodeGen/RISCV/inline-asm.ll
+++ b/llvm/test/CodeGen/RISCV/inline-asm.ll
@@ -75,112 +75,6 @@
   ret i32 %2
 }
 
-define void @constraint_m(ptr %a) nounwind {
-; RV32I-LABEL: constraint_m:
-; RV32I:       # %bb.0:
-; RV32I-NEXT:    #APP
-; RV32I-NEXT:    #NO_APP
-; RV32I-NEXT:    ret
-;
-; RV64I-LABEL: constraint_m:
-; RV64I:       # %bb.0:
-; RV64I-NEXT:    #APP
-; RV64I-NEXT:    #NO_APP
-; RV64I-NEXT:    ret
-  call void asm sideeffect "", "=*m"(ptr elementtype(i32) %a)
-  ret void
-}
-
-define i32 @constraint_m2(ptr %a) nounwind {
-; RV32I-LABEL: constraint_m2:
-; RV32I:       # %bb.0:
-; RV32I-NEXT:    #APP
-; RV32I-NEXT:    lw a0, 0(a0)
-; RV32I-NEXT:    #NO_APP
-; RV32I-NEXT:    ret
-;
-; RV64I-LABEL: constraint_m2:
-; RV64I:       # %bb.0:
-; RV64I-NEXT:    #APP
-; RV64I-NEXT:    lw a0, 0(a0)
-; RV64I-NEXT:    #NO_APP
-; RV64I-NEXT:    ret
-  %1 = tail call i32 asm "lw $0, $1", "=r,*m"(ptr elementtype(i32) %a)
-  ret i32 %1
-}
-
-define i32 @constraint_m_with_offset(ptr %a) nounwind {
-; RV32I-LABEL: constraint_m_with_offset:
-; RV32I:       # %bb.0:
-; RV32I-NEXT:    #APP
-; RV32I-NEXT:    lw a0, 4(a0)
-; RV32I-NEXT:    #NO_APP
-; RV32I-NEXT:    ret
-;
-; RV64I-LABEL: constraint_m_with_offset:
-; RV64I:       # %bb.0:
-; RV64I-NEXT:    #APP
-; RV64I-NEXT:    lw a0, 4(a0)
-; RV64I-NEXT:    #NO_APP
-; RV64I-NEXT:    ret
-  %1 = getelementptr i32, ptr %a, i32 1
-  %2 = tail call i32 asm "lw $0, $1", "=r,*m"(ptr elementtype(i32) %1)
-  ret i32 %2
-}
-
-define void @constraint_o(ptr %a) nounwind {
-; RV32I-LABEL: constraint_o:
-; RV32I:       # %bb.0:
-; RV32I-NEXT:    #APP
-; RV32I-NEXT:    #NO_APP
-; RV32I-NEXT:    ret
-;
-; RV64I-LABEL: constraint_o:
-; RV64I:       # %bb.0:
-; RV64I-NEXT:    #APP
-; RV64I-NEXT:    #NO_APP
-; RV64I-NEXT:    ret
-  call void asm sideeffect "", "=*o"(ptr elementtype(i32) %a)
-  ret void
-}
-
-define i32 @constraint_o2(ptr %a) nounwind {
-; RV32I-LABEL: constraint_o2:
-; RV32I:       # %bb.0:
-; RV32I-NEXT:    #APP
-; RV32I-NEXT:    lw a0, 0(a0)
-; RV32I-NEXT:    #NO_APP
-; RV32I-NEXT:    ret
-;
-; RV64I-LABEL: constraint_o2:
-; RV64I:       # %bb.0:
-; RV64I-NEXT:    #APP
-; RV64I-NEXT:    lw a0, 0(a0)
-; RV64I-NEXT:    #NO_APP
-; RV64I-NEXT:    ret
-  %1 = tail call i32 asm "lw $0, $1", "=r,*o"(ptr elementtype(i32) %a)
-  ret i32 %1
-}
-
-define i32 @constraint_o_with_offset(ptr %a) nounwind {
-; RV32I-LABEL: constraint_o_with_offset:
-; RV32I:       # %bb.0:
-; RV32I-NEXT:    #APP
-; RV32I-NEXT:    lw a0, 4(a0)
-; RV32I-NEXT:    #NO_APP
-; RV32I-NEXT:    ret
-;
-; RV64I-LABEL: constraint_o_with_offset:
-; RV64I:       # %bb.0:
-; RV64I-NEXT:    #APP
-; RV64I-NEXT:    lw a0, 4(a0)
-; RV64I-NEXT:    #NO_APP
-; RV64I-NEXT:    ret
-  %1 = getelementptr i32, ptr %a, i32 1
-  %2 = tail call i32 asm "lw $0, $1", "=r,*o"(ptr elementtype(i32) %1)
-  ret i32 %2
-}
-
 define void @constraint_I() nounwind {
 ; RV32I-LABEL: constraint_I:
 ; RV32I:       # %bb.0: