diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -14340,9 +14340,9 @@
   EVT SrcVT = N0.getValueType();
   bool isLE = DAG.getDataLayout().isLittleEndian();
 
-  // noop truncate
-  if (SrcVT == VT)
-    return N0;
+  // trunc(undef) = undef
+  if (N0.isUndef())
+    return DAG.getUNDEF(VT);
 
   // fold (truncate (truncate x)) -> (truncate x)
   if (N0.getOpcode() == ISD::TRUNCATE)
diff --git a/llvm/test/CodeGen/RISCV/pr64503.ll b/llvm/test/CodeGen/RISCV/pr64503.ll
--- a/llvm/test/CodeGen/RISCV/pr64503.ll
+++ b/llvm/test/CodeGen/RISCV/pr64503.ll
@@ -4,12 +4,8 @@
 define i1 @f(i64 %LGV1) {
 ; CHECK-LABEL: f:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    li a0, 1
-; CHECK-NEXT:    beqz a1, .LBB0_2
-; CHECK-NEXT:  # %bb.1:
-; CHECK-NEXT:    snez a0, a1
+; CHECK-NEXT:    sltu a0, a0, a1
 ; CHECK-NEXT:    xori a0, a0, 1
-; CHECK-NEXT:  .LBB0_2:
 ; CHECK-NEXT:    ret
   %B1 = xor i64 %LGV1, %LGV1
   %B2 = srem i64 1, %B1
@@ -21,11 +17,8 @@
 define i64 @g(ptr %A, i64 %0) {
 ; CHECK-LABEL: g:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    li a0, 1
-; CHECK-NEXT:    beqz a2, .LBB1_2
-; CHECK-NEXT:  # %bb.1:
-; CHECK-NEXT:    slti a0, a2, 1
-; CHECK-NEXT:  .LBB1_2:
+; CHECK-NEXT:    slt a0, a0, a2
+; CHECK-NEXT:    xori a0, a0, 1
 ; CHECK-NEXT:    sb a0, 0(zero)
 ; CHECK-NEXT:    ret
   store i64 poison, ptr %A, align 4