diff --git a/llvm/test/Transforms/InstSimplify/icmp-orx-x.ll b/llvm/test/Transforms/InstSimplify/icmp-orx-x.ll new file mode 100644 --- /dev/null +++ b/llvm/test/Transforms/InstSimplify/icmp-orx-x.ll @@ -0,0 +1,107 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -passes=instsimplify -S | FileCheck %s + +define i1 @or_simplify_ule(i8 %y_in, i8 %rhs_in, i1 %c) { +; CHECK-LABEL: @or_simplify_ule( +; CHECK-NEXT: [[Y:%.*]] = or i8 [[Y_IN:%.*]], 1 +; CHECK-NEXT: [[RHS:%.*]] = and i8 [[RHS_IN:%.*]], -2 +; CHECK-NEXT: [[LBO:%.*]] = or i8 [[Y]], [[RHS]] +; CHECK-NEXT: [[R:%.*]] = icmp ule i8 [[LBO]], [[RHS]] +; CHECK-NEXT: ret i1 [[R]] +; + %y = or i8 %y_in, 1 + %rhs = and i8 %rhs_in, -2 + %lbo = or i8 %y, %rhs + %r = icmp ule i8 %lbo, %rhs + ret i1 %r +} + +define i1 @or_simplify_uge(i8 %y_in, i8 %rhs_in, i1 %c) { +; CHECK-LABEL: @or_simplify_uge( +; CHECK-NEXT: [[Y:%.*]] = or i8 [[Y_IN:%.*]], -127 +; CHECK-NEXT: [[RHS:%.*]] = and i8 [[RHS_IN:%.*]], 127 +; CHECK-NEXT: [[LBO:%.*]] = or i8 [[Y]], [[RHS]] +; CHECK-NEXT: [[R:%.*]] = icmp uge i8 [[RHS]], [[LBO]] +; CHECK-NEXT: ret i1 [[R]] +; + %y = or i8 %y_in, 129 + %rhs = and i8 %rhs_in, 127 + %lbo = or i8 %y, %rhs + %r = icmp uge i8 %rhs, %lbo + ret i1 %r +} + +define i1 @or_simplify_ule_fail(i8 %y_in, i8 %rhs_in) { +; CHECK-LABEL: @or_simplify_ule_fail( +; CHECK-NEXT: [[Y:%.*]] = or i8 [[Y_IN:%.*]], 64 +; CHECK-NEXT: [[RHS:%.*]] = and i8 [[RHS_IN:%.*]], 127 +; CHECK-NEXT: [[LBO:%.*]] = or i8 [[Y]], [[RHS]] +; CHECK-NEXT: [[R:%.*]] = icmp ule i8 [[LBO]], [[RHS]] +; CHECK-NEXT: ret i1 [[R]] +; + %y = or i8 %y_in, 64 + %rhs = and i8 %rhs_in, 127 + %lbo = or i8 %y, %rhs + %r = icmp ule i8 %lbo, %rhs + ret i1 %r +} + +define i1 @or_simplify_ugt(i8 %y_in, i8 %rhs_in) { +; CHECK-LABEL: @or_simplify_ugt( +; CHECK-NEXT: [[Y:%.*]] = or i8 [[Y_IN:%.*]], 1 +; CHECK-NEXT: [[RHS:%.*]] = and i8 [[RHS_IN:%.*]], -2 +; CHECK-NEXT: [[LBO:%.*]] = or i8 [[Y]], [[RHS]] +; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[LBO]], [[RHS]] +; CHECK-NEXT: ret i1 [[R]] +; + %y = or i8 %y_in, 1 + %rhs = and i8 %rhs_in, -2 + %lbo = or i8 %y, %rhs + %r = icmp ugt i8 %lbo, %rhs + ret i1 %r +} + +define i1 @or_simplify_ult(i8 %y_in, i8 %rhs_in) { +; CHECK-LABEL: @or_simplify_ult( +; CHECK-NEXT: [[Y:%.*]] = or i8 [[Y_IN:%.*]], 36 +; CHECK-NEXT: [[RHS:%.*]] = and i8 [[RHS_IN:%.*]], -5 +; CHECK-NEXT: [[LBO:%.*]] = or i8 [[Y]], [[RHS]] +; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[RHS]], [[LBO]] +; CHECK-NEXT: ret i1 [[R]] +; + %y = or i8 %y_in, 36 + %rhs = and i8 %rhs_in, -5 + %lbo = or i8 %y, %rhs + %r = icmp ult i8 %rhs, %lbo + ret i1 %r +} + +define i1 @or_simplify_ugt_fail(i8 %y_in, i8 %rhs_in) { +; CHECK-LABEL: @or_simplify_ugt_fail( +; CHECK-NEXT: [[Y:%.*]] = and i8 [[Y_IN:%.*]], -2 +; CHECK-NEXT: [[RHS:%.*]] = or i8 [[RHS_IN:%.*]], 1 +; CHECK-NEXT: [[LBO:%.*]] = or i8 [[Y]], [[RHS]] +; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[LBO]], [[RHS]] +; CHECK-NEXT: ret i1 [[R]] +; + %y = and i8 %y_in, -2 + %rhs = or i8 %rhs_in, 1 + %lbo = or i8 %y, %rhs + %r = icmp ugt i8 %lbo, %rhs + ret i1 %r +} + +define i1 @pr64610(ptr %b) { +; CHECK-LABEL: @pr64610( +; CHECK-NEXT: [[V:%.*]] = load i1, ptr [[B:%.*]], align 2 +; CHECK-NEXT: [[S:%.*]] = select i1 [[V]], i32 74, i32 0 +; CHECK-NEXT: [[OR:%.*]] = or i32 [[S]], 1 +; CHECK-NEXT: [[R:%.*]] = icmp ugt i32 [[OR]], [[S]] +; CHECK-NEXT: ret i1 [[R]] +; + %v = load i1, ptr %b, align 2 + %s = select i1 %v, i32 74, i32 0 + %or = or i32 %s, 1 + %r = icmp ugt i32 %or, %s + ret i1 %r +}