Index: lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
===================================================================
--- lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -413,6 +413,8 @@
   }
 
   bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override;
+  unsigned validateTargetOperandClass(MCParsedAsmOperand &Op,
+                                      unsigned Kind) override;
   unsigned checkTargetMatchPredicate(MCInst &Inst) override;
   bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
                                OperandVector &Operands, MCStreamer &Out,
@@ -1327,6 +1329,15 @@
   return MatchOperand_Success;
 }
 
+static bool isTokenValidOptionalOp(ArrayRef<OptionalOperand> Operands,
+                                   StringRef Token) {
+  for (const OptionalOperand &Op : Operands) {
+    if (Op.Name == Token)
+      return true;
+  }
+  return false;
+}
+
 static bool operandsHasOptionalOp(const OperandVector &Operands,
                                   const OptionalOperand &OOp) {
   for (unsigned i = 0; i < Operands.size(); i++) {
@@ -1601,6 +1612,14 @@
   {"tfe",    AMDGPUOperand::ImmTyTFE, true, 0, nullptr}
 };
 
+static bool isTokenValidFlatOptionalOp(StringRef Token) {
+  return isTokenValidOptionalOp(FlatOptionalOps, Token);
+}
+
+static bool isTokenValidFlatAtomicOptionalOp(StringRef Token) {
+  return isTokenValidOptionalOp(FlatAtomicOptionalOps, Token);
+}
+
 AMDGPUAsmParser::OperandMatchResultTy
 AMDGPUAsmParser::parseFlatOptionalOps(OperandVector &Operands) {
   return parseOptionalOps(FlatOptionalOps, Operands);
@@ -1890,3 +1909,26 @@
 #define GET_MATCHER_IMPLEMENTATION
 #include "AMDGPUGenAsmMatcher.inc"
 
+unsigned AMDGPUAsmParser::validateTargetOperandClass(MCParsedAsmOperand &AsmOp,
+                                                     unsigned Kind) {
+  AMDGPUOperand &Op = static_cast<AMDGPUOperand &>(AsmOp);
+  if (!Op.isToken())
+    return MCTargetAsmParser::validateTargetOperandClass(Op, Kind);
+
+  StringRef Token = Op.getToken();
+
+  switch (Kind) {
+  default: break;
+  case MCK_FlatOptionalOps:
+    if (isTokenValidFlatOptionalOp(Token))
+      return Match_Success;
+    break;
+  case MCK_FlatAtomicOptionalOps:
+    if (isTokenValidFlatAtomicOptionalOp(Token))
+      return Match_Success;
+    break;
+  }
+
+  return MCTargetAsmParser::validateTargetOperandClass(Op, Kind);
+}
+
Index: lib/Target/AMDGPU/SIInstrInfo.td
===================================================================
--- lib/Target/AMDGPU/SIInstrInfo.td
+++ lib/Target/AMDGPU/SIInstrInfo.td
@@ -440,6 +440,20 @@
 def GDSMatchClass : GDSBaseMatchClass <"parseDSOptionalOps">;
 def GDS01MatchClass : GDSBaseMatchClass <"parseDSOff01OptionalOps">;
 
+def FlatOptionalOpsMatchClass : AsmOperandClass {
+  let Name = "FlatOptionalOps";
+  let PredicateMethod = "isImm";
+  let ParserMethod = "parseFlatOptionalOps";
+  let RenderMethod = "addImmOperands";
+}
+
+def FlatAtomicOptionalOpsMatchClass : AsmOperandClass {
+  let Name = "FlatAtomicOptionalOps";
+  let PredicateMethod = "isImm";
+  let ParserMethod = "parseFlatAtomicOptionalOps";
+  let RenderMethod = "addImmOperands";
+}
+
 class GLCBaseMatchClass <string parser> : AsmOperandClass {
   let Name = "GLC"#parser;
   let PredicateMethod = "isImm";
@@ -448,7 +462,6 @@
 }
 
 def GLCMubufMatchClass : GLCBaseMatchClass <"parseMubufOptionalOps">;
-def GLCFlatMatchClass : GLCBaseMatchClass <"parseFlatOptionalOps">;
 
 class SLCBaseMatchClass <string parser> : AsmOperandClass {
   let Name = "SLC"#parser;
@@ -458,8 +471,6 @@
 }
 
 def SLCMubufMatchClass : SLCBaseMatchClass <"parseMubufOptionalOps">;
-def SLCFlatMatchClass : SLCBaseMatchClass <"parseFlatOptionalOps">;
-def SLCFlatAtomicMatchClass : SLCBaseMatchClass <"parseFlatAtomicOptionalOps">;
 
 class TFEBaseMatchClass <string parser> : AsmOperandClass {
   let Name = "TFE"#parser;
@@ -469,8 +480,6 @@
 }
 
 def TFEMubufMatchClass : TFEBaseMatchClass <"parseMubufOptionalOps">;
-def TFEFlatMatchClass : TFEBaseMatchClass <"parseFlatOptionalOps">;
-def TFEFlatAtomicMatchClass : TFEBaseMatchClass <"parseFlatAtomicOptionalOps">;
 
 def OModMatchClass : AsmOperandClass {
   let Name = "OMod";
@@ -541,7 +550,7 @@
 }
 
 def glc : glc_base <GLCMubufMatchClass>;
-def glc_flat : glc_base <GLCFlatMatchClass>;
+def glc_flat : glc_base <FlatOptionalOpsMatchClass>;
 
 class slc_base <AsmOperandClass mc> : Operand <i1> {
   let PrintMethod = "printSLC";
@@ -549,8 +558,8 @@
 }
 
 def slc : slc_base <SLCMubufMatchClass>;
-def slc_flat : slc_base <SLCFlatMatchClass>;
-def slc_flat_atomic : slc_base <SLCFlatAtomicMatchClass>;
+def slc_flat : slc_base <FlatOptionalOpsMatchClass>;
+def slc_flat_atomic : slc_base <FlatAtomicOptionalOpsMatchClass>;
 
 class tfe_base <AsmOperandClass mc> : Operand <i1> {
   let PrintMethod = "printTFE";
@@ -558,8 +567,8 @@
 }
 
 def tfe : tfe_base <TFEMubufMatchClass>;
-def tfe_flat : tfe_base <TFEFlatMatchClass>;
-def tfe_flat_atomic : tfe_base <TFEFlatAtomicMatchClass>;
+def tfe_flat : tfe_base <FlatOptionalOpsMatchClass>;
+def tfe_flat_atomic : tfe_base <FlatAtomicOptionalOpsMatchClass>;
 
 def omod : Operand <i32> {
   let PrintMethod = "printOModSI";