diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -1612,6 +1612,7 @@ PredictableSelectIsExpensive = Subtarget->getSchedModel().isOutOfOrder(); setPrefLoopAlignment(Align(1ULL << Subtarget->getPrefLoopLogAlignment())); + setPrefFunctionAlignment(Align(1ULL << Subtarget->getPrefLoopLogAlignment())); setMinFunctionAlignment(Subtarget->isThumb() ? Align(2) : Align(4)); diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h --- a/llvm/lib/Target/ARM/ARMSubtarget.h +++ b/llvm/lib/Target/ARM/ARMSubtarget.h @@ -198,7 +198,7 @@ /// operand cycle returned by the itinerary data for pre-ISel operands. int PreISelOperandLatencyAdjustment = 2; - /// What alignment is preferred for loop bodies, in log2(bytes). + /// What alignment is preferred for loop bodies and functions, in log2(bytes). unsigned PrefLoopLogAlignment = 0; /// The cost factor for MVE instructions, representing the multiple beats an diff --git a/llvm/test/CodeGen/ARM/preferred-function-alignment.ll b/llvm/test/CodeGen/ARM/preferred-function-alignment.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/ARM/preferred-function-alignment.ll @@ -0,0 +1,23 @@ +; RUN: llc -mtriple=arm-none-eabi -mcpu=cortex-m85 < %s | FileCheck --check-prefixes=CHECK,ALIGN-16,ALIGN-CS-16 %s +; RUN: llc -mtriple=arm-none-eabi -mcpu=cortex-m23 < %s | FileCheck --check-prefixes=CHECK,ALIGN-16,ALIGN-CS-16 %s + +; RUN: llc -mtriple=arm-none-eabi -mcpu=cortex-a5 < %s | FileCheck --check-prefixes=CHECK,ALIGN-32,ALIGN-CS-32 %s +; RUN: llc -mtriple=arm-none-eabi -mcpu=cortex-m33 < %s | FileCheck --check-prefixes=CHECK,ALIGN-32,ALIGN-CS-16 %s +; RUN: llc -mtriple=arm-none-eabi -mcpu=cortex-m55 < %s | FileCheck --check-prefixes=CHECK,ALIGN-32,ALIGN-CS-16 %s + + +; CHECK-LABEL: test +; ALIGN-16: .p2align 1 +; ALIGN-32: .p2align 2 + +define void @test() { + ret void +} + +; CHECK-LABEL: test_optsize +; ALIGN-CS-16: .p2align 1 +; ALIGN-CS-32: .p2align 2 + +define void @test_optsize() optsize { + ret void +}