diff --git a/lldb/test/API/commands/register/register/aarch64_mte_ctrl_register/Makefile b/lldb/test/API/commands/register/register/aarch64_mte_ctrl_register/Makefile
new file mode 100644
--- /dev/null
+++ b/lldb/test/API/commands/register/register/aarch64_mte_ctrl_register/Makefile
@@ -0,0 +1,3 @@
+C_SOURCES := main.c
+
+include Makefile.rules
diff --git a/lldb/test/API/commands/register/register/aarch64_mte_ctrl_register/TestMTECtrlRegister.py b/lldb/test/API/commands/register/register/aarch64_mte_ctrl_register/TestMTECtrlRegister.py
new file mode 100644
--- /dev/null
+++ b/lldb/test/API/commands/register/register/aarch64_mte_ctrl_register/TestMTECtrlRegister.py
@@ -0,0 +1,50 @@
+"""
+Test that LLDB correctly reads, writes and restores the MTE control register on
+AArch64 Linux.
+"""
+
+import lldb
+from lldbsuite.test.decorators import *
+from lldbsuite.test.lldbtest import *
+from lldbsuite.test import lldbutil
+
+
+class MTECtrlRegisterTestCase(TestBase):
+    @no_debug_info_test
+    @skipIf(archs=no_match(["aarch64"]))
+    @skipIf(oslist=no_match(["linux"]))
+    def test_mte_ctrl_register(self):
+        if not self.isAArch64MTE():
+            self.skipTest("Target must support MTE.")
+
+        self.build()
+        self.line = line_number("main.c", "// Set a break point here.")
+
+        exe = self.getBuildArtifact("a.out")
+        self.runCmd("file " + exe, CURRENT_EXECUTABLE_SET)
+
+        lldbutil.run_break_set_by_file_and_line(
+            self, "main.c", self.line, num_expected_locations=1
+        )
+        self.runCmd("run", RUN_SUCCEEDED)
+
+        self.expect(
+            "process status",
+            STOPPED_DUE_TO_BREAKPOINT,
+            substrs=["stop reason = breakpoint 1."],
+        )
+
+        # Bit 0 = tagged addressing enabled
+        # Bit 1 = synchronous faults
+        # Bit 2 = asynchronous faults
+        # We start enabled with synchronous faults.
+        self.expect("register read mte_ctrl", substrs=["0x0000000000000003"])
+
+        # Change to asynchronous faults.
+        self.runCmd("register write mte_ctrl 5")
+        self.expect("register read mte_ctrl", substrs=["0x0000000000000005"])
+
+        # This would return to synchronous faults if we did not restore the
+        # previous value.
+        self.expect("expression setup_mte()", substrs=["= 0"])
+        self.expect("register read mte_ctrl", substrs=["0x0000000000000005"])
\ No newline at end of file
diff --git a/lldb/test/API/commands/register/register/aarch64_mte_ctrl_register/main.c b/lldb/test/API/commands/register/register/aarch64_mte_ctrl_register/main.c
new file mode 100644
--- /dev/null
+++ b/lldb/test/API/commands/register/register/aarch64_mte_ctrl_register/main.c
@@ -0,0 +1,21 @@
+#include <asm/hwcap.h>
+#include <asm/mman.h>
+#include <sys/auxv.h>
+#include <sys/mman.h>
+#include <sys/prctl.h>
+#include <unistd.h>
+
+int setup_mte() {
+  return prctl(PR_SET_TAGGED_ADDR_CTRL, PR_TAGGED_ADDR_ENABLE | PR_MTE_TCF_SYNC,
+               0, 0, 0);
+}
+
+int main(int argc, char const *argv[]) {
+  if (!(getauxval(AT_HWCAP2) & HWCAP2_MTE))
+    return 1;
+
+  if (setup_mte())
+    return 1;
+
+  return 0; // Set a break point here.
+}