Index: lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
===================================================================
--- lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
+++ lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
@@ -61,6 +61,13 @@
   unsigned getRegisterBitWidth(bool Vector);
   unsigned getMaxInterleaveFactor(unsigned VF);
 
+  int getArithmeticInstrCost(
+    unsigned Opcode, Type *Ty,
+    TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
+    TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
+    TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
+    TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None);
+
   unsigned getCFInstrCost(unsigned Opcode);
 
   unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) {
Index: lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+++ lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
@@ -83,6 +83,67 @@
   return 64;
 }
 
+int AMDGPUTTIImpl::getArithmeticInstrCost(
+    unsigned Opcode, Type *Ty, TTI::OperandValueKind Opd1Info,
+    TTI::OperandValueKind Opd2Info, TTI::OperandValueProperties Opd1PropInfo,
+    TTI::OperandValueProperties Opd2PropInfo) {
+
+  EVT OrigTy = TLI->getValueType(DL, Ty);
+  if (!OrigTy.isSimple()) {
+    return BaseT::getArithmeticInstrCost(Opcode, Ty, Opd1Info, Opd2Info,
+                                         Opd1PropInfo, Opd2PropInfo);
+  }
+
+  // Legalize the type.
+  std::pair<int, MVT> LT = TLI->getTypeLegalizationCost(DL, Ty);
+  int ISD = TLI->InstructionOpcodeToISD(Opcode);
+
+  // Because we don't have any legal vector operations, but the legal types, we
+  // need to account for split vectors.
+  unsigned NElts = LT.second.isVector() ?
+    LT.second.getVectorNumElements() : 1;
+
+  MVT::SimpleValueType SLT = LT.second.getScalarType().SimpleTy;
+
+  switch (ISD) {
+  case ISD::FADD:
+  case ISD::FSUB:
+  case ISD::FMUL:
+    if (SLT == MVT::f64)
+      return 2 * LT.first * NElts;
+
+    if (SLT == MVT::f32 || SLT == MVT::f16)
+      return LT.first * NElts;
+    break;
+
+  case ISD::FDIV:
+  case ISD::FREM:
+    // FIXME: frem should be handled separately. The fdiv in it is most of it,
+    // but the current lowering is also not entirely correct.
+    if (SLT == MVT::f64) {
+      int Cost = 24;
+
+      if (ST->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS)
+        Cost += 3;
+
+      return LT.first * Cost * NElts;
+    }
+
+    // Assuming no fp32 denormals lowering
+    if (SLT == MVT::f32 || SLT == MVT::f16) {
+      assert(!ST->hasFP32Denormals() && "will change when supported");
+      return 6 * LT.first * NElts;
+    }
+
+    break;
+  default:
+    break;
+  }
+
+  return BaseT::getArithmeticInstrCost(Opcode, Ty, Opd1Info, Opd2Info,
+                                       Opd1PropInfo, Opd2PropInfo);
+}
+
 unsigned AMDGPUTTIImpl::getCFInstrCost(unsigned Opcode) {
   // XXX - For some reason this isn't called for switch.
   switch (Opcode) {
Index: test/Analysis/CostModel/AMDGPU/fadd.ll
===================================================================
--- /dev/null
+++ test/Analysis/CostModel/AMDGPU/fadd.ll
@@ -0,0 +1,84 @@
+; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa < %s | FileCheck %s
+
+; CHECK: 'fadd_f32'
+; CHECK: estimated cost of 1 for {{.*}} fadd float
+define void @fadd_f32(float addrspace(1)* %out, float addrspace(1)* %vaddr, float %b) #0 {
+  %vec = load float, float addrspace(1)* %vaddr
+  %add = fadd float %vec, %b
+  store float %add, float addrspace(1)* %out
+  ret void
+}
+
+; CHECK: 'fadd_v2f32'
+; CHECK: estimated cost of 2 for {{.*}} fadd <2 x float>
+define void @fadd_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr, <2 x float> %b) #0 {
+  %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
+  %add = fadd <2 x float> %vec, %b
+  store <2 x float> %add, <2 x float> addrspace(1)* %out
+  ret void
+}
+
+; CHECK: 'fadd_v3f32'
+; CHECK: estimated cost of 3 for {{.*}} fadd <3 x float>
+define void @fadd_v3f32(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr, <3 x float> %b) #0 {
+  %vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
+  %add = fadd <3 x float> %vec, %b
+  store <3 x float> %add, <3 x float> addrspace(1)* %out
+  ret void
+}
+
+; CHECK: 'fadd_f64'
+; CHECK: estimated cost of 2 for {{.*}} fadd double
+define void @fadd_f64(double addrspace(1)* %out, double addrspace(1)* %vaddr, double %b) #0 {
+  %vec = load double, double addrspace(1)* %vaddr
+  %add = fadd double %vec, %b
+  store double %add, double addrspace(1)* %out
+  ret void
+}
+
+; CHECK: 'fadd_v2f64'
+; CHECK: estimated cost of 4 for {{.*}} fadd <2 x double>
+define void @fadd_v2f64(<2 x double> addrspace(1)* %out, <2 x double> addrspace(1)* %vaddr, <2 x double> %b) #0 {
+  %vec = load <2 x double>, <2 x double> addrspace(1)* %vaddr
+  %add = fadd <2 x double> %vec, %b
+  store <2 x double> %add, <2 x double> addrspace(1)* %out
+  ret void
+}
+
+; CHECK: 'fadd_v3f64'
+; CHECK: estimated cost of 6 for {{.*}} fadd <3 x double>
+define void @fadd_v3f64(<3 x double> addrspace(1)* %out, <3 x double> addrspace(1)* %vaddr, <3 x double> %b) #0 {
+  %vec = load <3 x double>, <3 x double> addrspace(1)* %vaddr
+  %add = fadd <3 x double> %vec, %b
+  store <3 x double> %add, <3 x double> addrspace(1)* %out
+  ret void
+}
+
+; CHECK: 'fadd_f16'
+; CHECK: estimated cost of 1 for {{.*}} fadd half
+define void @fadd_f16(half addrspace(1)* %out, half addrspace(1)* %vaddr, half %b) #0 {
+  %vec = load half, half addrspace(1)* %vaddr
+  %add = fadd half %vec, %b
+  store half %add, half addrspace(1)* %out
+  ret void
+}
+
+; CHECK: 'fadd_v2f16'
+; CHECK: estimated cost of 2 for {{.*}} fadd <2 x half>
+define void @fadd_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %vaddr, <2 x half> %b) #0 {
+  %vec = load <2 x half>, <2 x half> addrspace(1)* %vaddr
+  %add = fadd <2 x half> %vec, %b
+  store <2 x half> %add, <2 x half> addrspace(1)* %out
+  ret void
+}
+
+; CHECK: 'fadd_v4f16'
+; CHECK: estimated cost of 4 for {{.*}} fadd <4 x half>
+define void @fadd_v4f16(<4 x half> addrspace(1)* %out, <4 x half> addrspace(1)* %vaddr, <4 x half> %b) #0 {
+  %vec = load <4 x half>, <4 x half> addrspace(1)* %vaddr
+  %add = fadd <4 x half> %vec, %b
+  store <4 x half> %add, <4 x half> addrspace(1)* %out
+  ret void
+}
+
+attributes #0 = { nounwind }
Index: test/Analysis/CostModel/AMDGPU/fdiv.ll
===================================================================
--- /dev/null
+++ test/Analysis/CostModel/AMDGPU/fdiv.ll
@@ -0,0 +1,88 @@
+; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri < %s | FileCheck -check-prefix=COMMON -check-prefix=CI %s
+; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=tahiti < %s | FileCheck -check-prefix=COMMON -check-prefix=SI %s
+
+; CHECK: 'fdiv_f32'
+; COMMON: estimated cost of 6 for {{.*}} fdiv float
+define void @fdiv_f32(float addrspace(1)* %out, float addrspace(1)* %vaddr, float %b) #0 {
+  %vec = load float, float addrspace(1)* %vaddr
+  %add = fdiv float %vec, %b
+  store float %add, float addrspace(1)* %out
+  ret void
+}
+
+; COMMON: 'fdiv_v2f32'
+; COMMON: estimated cost of 12 for {{.*}} fdiv <2 x float>
+define void @fdiv_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr, <2 x float> %b) #0 {
+  %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
+  %add = fdiv <2 x float> %vec, %b
+  store <2 x float> %add, <2 x float> addrspace(1)* %out
+  ret void
+}
+
+; COMMON: 'fdiv_v3f32'
+; COMMON: estimated cost of 18 for {{.*}} fdiv <3 x float>
+define void @fdiv_v3f32(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr, <3 x float> %b) #0 {
+  %vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
+  %add = fdiv <3 x float> %vec, %b
+  store <3 x float> %add, <3 x float> addrspace(1)* %out
+  ret void
+}
+
+; COMMON: 'fdiv_f64'
+; CI: estimated cost of 24 for {{.*}} fdiv double
+; SI: estimated cost of 27 for {{.*}} fdiv double
+define void @fdiv_f64(double addrspace(1)* %out, double addrspace(1)* %vaddr, double %b) #0 {
+  %vec = load double, double addrspace(1)* %vaddr
+  %add = fdiv double %vec, %b
+  store double %add, double addrspace(1)* %out
+  ret void
+}
+
+; COMMON: 'fdiv_v2f64'
+; CI: estimated cost of 48 for {{.*}} fdiv <2 x double>
+; SI: estimated cost of 54 for {{.*}} fdiv <2 x double>
+define void @fdiv_v2f64(<2 x double> addrspace(1)* %out, <2 x double> addrspace(1)* %vaddr, <2 x double> %b) #0 {
+  %vec = load <2 x double>, <2 x double> addrspace(1)* %vaddr
+  %add = fdiv <2 x double> %vec, %b
+  store <2 x double> %add, <2 x double> addrspace(1)* %out
+  ret void
+}
+
+; COMMON: 'fdiv_v3f64'
+; CI: estimated cost of 72 for {{.*}} fdiv <3 x double>
+; SI: estimated cost of 81 for {{.*}} fdiv <3 x double>
+define void @fdiv_v3f64(<3 x double> addrspace(1)* %out, <3 x double> addrspace(1)* %vaddr, <3 x double> %b) #0 {
+  %vec = load <3 x double>, <3 x double> addrspace(1)* %vaddr
+  %add = fdiv <3 x double> %vec, %b
+  store <3 x double> %add, <3 x double> addrspace(1)* %out
+  ret void
+}
+
+; COMMON: 'fdiv_f16'
+; COMMON: estimated cost of 6 for {{.*}} fdiv half
+define void @fdiv_f16(half addrspace(1)* %out, half addrspace(1)* %vaddr, half %b) #0 {
+  %vec = load half, half addrspace(1)* %vaddr
+  %add = fdiv half %vec, %b
+  store half %add, half addrspace(1)* %out
+  ret void
+}
+
+; COMMON: 'fdiv_v2f16'
+; COMMON: estimated cost of 12 for {{.*}} fdiv <2 x half>
+define void @fdiv_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %vaddr, <2 x half> %b) #0 {
+  %vec = load <2 x half>, <2 x half> addrspace(1)* %vaddr
+  %add = fdiv <2 x half> %vec, %b
+  store <2 x half> %add, <2 x half> addrspace(1)* %out
+  ret void
+}
+
+; COMMON: 'fdiv_v4f16'
+; COMMON: estimated cost of 24 for {{.*}} fdiv <4 x half>
+define void @fdiv_v4f16(<4 x half> addrspace(1)* %out, <4 x half> addrspace(1)* %vaddr, <4 x half> %b) #0 {
+  %vec = load <4 x half>, <4 x half> addrspace(1)* %vaddr
+  %add = fdiv <4 x half> %vec, %b
+  store <4 x half> %add, <4 x half> addrspace(1)* %out
+  ret void
+}
+
+attributes #0 = { nounwind }
Index: test/Analysis/CostModel/AMDGPU/fsub.ll
===================================================================
--- /dev/null
+++ test/Analysis/CostModel/AMDGPU/fsub.ll
@@ -0,0 +1,82 @@
+; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa < %s | FileCheck %s
+
+; CHECK: 'fsub_f32'
+; CHECK: estimated cost of 1 for {{.*}} fsub float
+define void @fsub_f32(float addrspace(1)* %out, float addrspace(1)* %vaddr, float %b) #0 {
+  %vec = load float, float addrspace(1)* %vaddr
+  %add = fsub float %vec, %b
+  store float %add, float addrspace(1)* %out
+  ret void
+}
+
+; CHECK: 'fsub_v2f32'
+; CHECK: estimated cost of 2 for {{.*}} fsub <2 x float>
+define void @fsub_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr, <2 x float> %b) #0 {
+  %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
+  %add = fsub <2 x float> %vec, %b
+  store <2 x float> %add, <2 x float> addrspace(1)* %out
+  ret void
+}
+
+; CHECK: 'fsub_v3f32'
+; CHECK: estimated cost of 3 for {{.*}} fsub <3 x float>
+define void @fsub_v3f32(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr, <3 x float> %b) #0 {
+  %vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
+  %add = fsub <3 x float> %vec, %b
+  store <3 x float> %add, <3 x float> addrspace(1)* %out
+  ret void
+}
+
+; CHECK: 'fsub_f64'
+; CHECK: estimated cost of 2 for {{.*}} fsub double
+define void @fsub_f64(double addrspace(1)* %out, double addrspace(1)* %vaddr, double %b) #0 {
+  %vec = load double, double addrspace(1)* %vaddr
+  %add = fsub double %vec, %b
+  store double %add, double addrspace(1)* %out
+  ret void
+}
+
+; CHECK: 'fsub_v2f64'
+; CHECK: estimated cost of 4 for {{.*}} fsub <2 x double>
+define void @fsub_v2f64(<2 x double> addrspace(1)* %out, <2 x double> addrspace(1)* %vaddr, <2 x double> %b) #0 {
+  %vec = load <2 x double>, <2 x double> addrspace(1)* %vaddr
+  %add = fsub <2 x double> %vec, %b
+  store <2 x double> %add, <2 x double> addrspace(1)* %out
+  ret void
+}
+
+; CHECK: 'fsub_v3f64'
+; CHECK: estimated cost of 6 for {{.*}} fsub <3 x double>
+define void @fsub_v3f64(<3 x double> addrspace(1)* %out, <3 x double> addrspace(1)* %vaddr, <3 x double> %b) #0 {
+  %vec = load <3 x double>, <3 x double> addrspace(1)* %vaddr
+  %add = fsub <3 x double> %vec, %b
+  store <3 x double> %add, <3 x double> addrspace(1)* %out
+  ret void
+}
+
+; CHECK: 'fsub_f16'
+; CHECK: estimated cost of 1 for {{.*}} fsub half
+define void @fsub_f16(half addrspace(1)* %out, half addrspace(1)* %vaddr, half %b) #0 {
+  %vec = load half, half addrspace(1)* %vaddr
+  %add = fsub half %vec, %b
+  store half %add, half addrspace(1)* %out
+  ret void
+}
+
+; CHECK: 'fsub_v2f16'
+; CHECK: estimated cost of 2 for {{.*}} fsub <2 x half>
+define void @fsub_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %vaddr, <2 x half> %b) #0 {
+  %vec = load <2 x half>, <2 x half> addrspace(1)* %vaddr
+  %add = fsub <2 x half> %vec, %b
+  store <2 x half> %add, <2 x half> addrspace(1)* %out
+  ret void
+}
+
+; CHECK: 'fsub_v4f16'
+; CHECK: estimated cost of 4 for {{.*}} fsub <4 x half>
+define void @fsub_v4f16(<4 x half> addrspace(1)* %out, <4 x half> addrspace(1)* %vaddr, <4 x half> %b) #0 {
+  %vec = load <4 x half>, <4 x half> addrspace(1)* %vaddr
+  %add = fsub <4 x half> %vec, %b
+  store <4 x half> %add, <4 x half> addrspace(1)* %out
+  ret void
+}