diff --git a/llvm/include/llvm/CodeGen/LiveRangeCalc.h b/llvm/include/llvm/CodeGen/LiveRangeCalc.h
--- a/llvm/include/llvm/CodeGen/LiveRangeCalc.h
+++ b/llvm/include/llvm/CodeGen/LiveRangeCalc.h
@@ -86,7 +86,7 @@
   ///  2. LiveOut[MBB].second.getNode() == MBB
   ///     The live-out value is defined in MBB.
   ///  3. forall P in preds(MBB): LiveOut[P] == LiveOut[MBB]
-  ///     The live-out value passses through MBB. All predecessors must carry
+  ///     The live-out value passes through MBB. All predecessors must carry
   ///     the same value.
   ///
   /// The domtree node may be null, it can be computed.
diff --git a/llvm/include/llvm/CodeGen/PBQP/Graph.h b/llvm/include/llvm/CodeGen/PBQP/Graph.h
--- a/llvm/include/llvm/CodeGen/PBQP/Graph.h
+++ b/llvm/include/llvm/CodeGen/PBQP/Graph.h
@@ -352,7 +352,7 @@
     /// Lock this graph to the given solver instance in preparation
     /// for running the solver. This method will call solver.handleAddNode for
     /// each node in the graph, and handleAddEdge for each edge, to give the
-    /// solver an opportunity to set up any requried metadata.
+    /// solver an opportunity to set up any required metadata.
     void setSolver(SolverT &S) {
       assert(!Solver && "Solver already set. Call unsetSolver().");
       Solver = &S;
diff --git a/llvm/include/llvm/CodeGen/SelectionDAG.h b/llvm/include/llvm/CodeGen/SelectionDAG.h
--- a/llvm/include/llvm/CodeGen/SelectionDAG.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAG.h
@@ -1627,7 +1627,7 @@
   /// Expand the specified \c ISD::VACOPY node as the Legalize pass would.
   SDValue expandVACopy(SDNode *Node);
 
-  /// Returs an GlobalAddress of the function from the current module with
+  /// Returns a GlobalAddress of the function from the current module with
   /// name matching the given ExternalSymbol. Additionally can provide the
   /// matched function.
   /// Panics the function doesn't exists.
diff --git a/llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.cpp b/llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.cpp
--- a/llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.cpp
+++ b/llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.cpp
@@ -103,7 +103,7 @@
 
 bool LiveDebugValues::runOnMachineFunction(MachineFunction &MF) {
   // Except for Wasm, all targets should be only using physical register at this
-  // point. Wasm only use virtual registers throught its pipeline, but its
+  // point. Wasm only use virtual registers throughout its pipeline, but its
   // virtual registers don't participate  in this LiveDebugValues analysis; only
   // its target indices do.
   assert(MF.getTarget().getTargetTriple().isWasm() ||
diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp
--- a/llvm/lib/CodeGen/MachineBasicBlock.cpp
+++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp
@@ -1561,7 +1561,7 @@
   *getProbabilityIterator(I) = Prob;
 }
 
-/// Return probability iterator corresonding to the I successor iterator
+/// Return probability iterator corresponding to the I successor iterator
 MachineBasicBlock::const_probability_iterator
 MachineBasicBlock::getProbabilityIterator(
     MachineBasicBlock::const_succ_iterator I) const {
@@ -1571,7 +1571,7 @@
   return Probs.begin() + index;
 }
 
-/// Return probability iterator corresonding to the I successor iterator.
+/// Return probability iterator corresponding to the I successor iterator.
 MachineBasicBlock::probability_iterator
 MachineBasicBlock::getProbabilityIterator(MachineBasicBlock::succ_iterator I) {
   assert(Probs.size() == Successors.size() && "Async probability list!");
diff --git a/llvm/test/CodeGen/AMDGPU/sign_extend.ll b/llvm/test/CodeGen/AMDGPU/sign_extend.ll
--- a/llvm/test/CodeGen/AMDGPU/sign_extend.ll
+++ b/llvm/test/CodeGen/AMDGPU/sign_extend.ll
@@ -253,7 +253,7 @@
 }
 
 ; This purpose of this test is to make sure the i16 = sign_extend i1 node
-; makes it all the way throught the legalizer/optimizer to make sure
+; makes it all the way through the legalizer/optimizer to make sure
 ; we select this correctly.  In the s_sext_i1_to_i16, the sign_extend node
 ; is optimized to a select very early.
 define amdgpu_kernel void @s_sext_i1_to_i16_with_and(ptr addrspace(1) %out, i32 %a, i32 %b, i32 %c, i32 %d) nounwind {