diff --git a/llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp b/llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp --- a/llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp +++ b/llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp @@ -522,9 +522,11 @@ auto *UseBlock = UseMI->getParent(); // Replace uses in Endif block if (UseBlock == Endif) { - if (UseMI->isPHI()) { + if (UseMI->isPHI()) O.setReg(NewReg); - } else { + else if (UseMI->isDebugInstr()) + continue; + else { // DetectDeadLanes may mark register uses as undef without removing // them, in which case a non-phi instruction using the original register // may exist in the Endif block even though the register is not live diff --git a/llvm/test/CodeGen/AMDGPU/si-optimize-vgpr-live-range-dbg-instr.ll b/llvm/test/CodeGen/AMDGPU/si-optimize-vgpr-live-range-dbg-instr.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/si-optimize-vgpr-live-range-dbg-instr.ll @@ -0,0 +1,77 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 < %s | FileCheck -check-prefix=GCN %s + +declare void @llvm.dbg.value(metadata, metadata, metadata) #0 + +define void @__omp_offloading_35_36570d3__ZN6openmc31process_advance_particle_eventsEv_l252_debug___omp_outlined_debug___omp_outlined(i1 %0) { +; GCN-LABEL: __omp_offloading_35_36570d3__ZN6openmc31process_advance_particle_eventsEv_l252_debug___omp_outlined_debug___omp_outlined: +; GCN: .Lfunc_begin0: +; GCN-NEXT: .cfi_sections .debug_frame +; GCN-NEXT: .cfi_startproc +; GCN-NEXT: ; %bb.0: +; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GCN-NEXT: v_mov_b32_e32 v1, 0 +; GCN-NEXT: v_mov_b32_e32 v2, 0 +; GCN-NEXT: global_load_dwordx2 v[1:2], v[1:2], off +; GCN-NEXT: v_and_b32_e32 v0, 1, v0 +; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0 +; GCN-NEXT: s_xor_b64 s[4:5], vcc, -1 +; GCN-NEXT: s_and_saveexec_b64 s[6:7], s[4:5] +; GCN-NEXT: s_xor_b64 s[4:5], exec, s[6:7] +; GCN-NEXT: s_cbranch_execnz .LBB0_3 +; GCN-NEXT: ; %bb.1: ; %Flow +; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] +; GCN-NEXT: s_cbranch_execnz .LBB0_4 +; GCN-NEXT: .LBB0_2: +; GCN-NEXT: s_or_b64 exec, exec, s[4:5] +; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GCN-NEXT: s_setpc_b64 s[30:31] +; GCN-NEXT: .LBB0_3: +; GCN-NEXT: v_mov_b32_e32 v3, 0 +; GCN-NEXT: v_mov_b32_e32 v4, v3 +; GCN-NEXT: s_waitcnt vmcnt(0) +; GCN-NEXT: flat_store_dwordx2 v[1:2], v[3:4] +; GCN-NEXT: ; implicit-def: $vgpr1_vgpr2 +; GCN-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5] +; GCN-NEXT: s_cbranch_execz .LBB0_2 +; GCN-NEXT: .LBB0_4: +; GCN-NEXT: v_mov_b32_e32 v3, 0 +; GCN-NEXT: v_mov_b32_e32 v4, v3 +; GCN-NEXT: s_waitcnt vmcnt(0) +; GCN-NEXT: flat_store_dwordx2 v[1:2], v[3:4] +; GCN-NEXT: s_or_b64 exec, exec, s[4:5] +; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) +; GCN-NEXT: s_setpc_b64 s[30:31] + %2 = load ptr, ptr addrspace(1) null, align 8 + br i1 %0, label %3, label %4 + +3: ; preds = %1 + store double 0.000000e+00, ptr %2, align 8 + br label %5 + +4: ; preds = %1 + store double 0.000000e+00, ptr %2, align 8 + br label %5 + +5: ; preds = %4, %3 + call void @llvm.dbg.value(metadata !DIArgList(ptr %2, i64 0), metadata !0, metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_constu, 2712, DW_OP_mul, DW_OP_plus, DW_OP_plus_uconst, 2680, DW_OP_stack_value)), !dbg !DILocation(scope: !1) + ret void +} + +attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } + +!llvm.dbg.cu = !{!6} + +!7 = !{!1} +!6 = distinct !DICompileUnit(language: DW_LANG_C99, producer: "clang version 3.0 (trunk 131941)", isOptimized: true, emissionKind: FullDebug, file: !8, enums: !9, retainedTypes: !9) +!0 = !DILocalVariable(name: "c", line: 2, scope: !1, file: !2, type: !5) +!1 = distinct !DISubprogram(name: "main", line: 1, isLocal: false, isDefinition: true, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: false, unit: !6, scopeLine: 1, file: !8, scope: !2, type: !3) +!2 = !DIFile(filename: "/d/j/debug-test.c", directory: "/Volumes/Data/b") +!3 = !DISubroutineType(types: !4) +!4 = !{!5} +!5 = !DIBasicType(tag: DW_TAG_base_type, name: "int", size: 32, align: 32, encoding: DW_ATE_signed) +!8 = !DIFile(filename: "/d/j/debug-test.c", directory: "/Volumes/Data/b") +!9 = !{} + +!llvm.module.flags = !{!10} +!10 = !{i32 1, !"Debug Info Version", i32 3}