Index: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp =================================================================== --- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp +++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp @@ -73,17 +73,22 @@ // Some ABIs align 64 bit integers and doubles to 64 bits, others to 32. if (TT.isArch64Bit() || TT.isOSWindows() || TT.isOSNaCl()) Ret += "-i64:64"; + else if (TT.isOSIAMCU()) + Ret += "-i64:32-f64:32"; else Ret += "-f64:32:64"; // Some ABIs align long double to 128 bits, others to 32. - if (TT.isOSNaCl()) + if (TT.isOSNaCl() || TT.isOSIAMCU()) ; // No f80 else if (TT.isArch64Bit() || TT.isOSDarwin()) Ret += "-f80:128"; else Ret += "-f80:32"; + if (TT.isOSIAMCU()) + Ret += "-f128:32"; + // The registers can hold 8, 16, 32 or, in x86-64, 64 bits. if (TT.isArch64Bit()) Ret += "-n8:16:32:64"; @@ -91,7 +96,7 @@ Ret += "-n8:16:32"; // The stack is aligned to 32 bits on some ABIs and 128 bits on others. - if (!TT.isArch64Bit() && TT.isOSWindows()) + if ((!TT.isArch64Bit() && TT.isOSWindows()) || TT.isOSIAMCU()) Ret += "-a:0:32-S32"; else Ret += "-S128"; Index: llvm/trunk/test/CodeGen/X86/mcu-abi.ll =================================================================== --- llvm/trunk/test/CodeGen/X86/mcu-abi.ll +++ llvm/trunk/test/CodeGen/X86/mcu-abi.ll @@ -82,6 +82,8 @@ ret i32 %i1 } +%struct.S = type { i8 } + ; CHECK-LABEL: test_lib_args: ; CHECK: movl %edx, %eax ; CHECK: calll __fixsfsi @@ -108,5 +110,50 @@ declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1) #1 +; CHECK-LABEL: test_alignment_d: +; CHECK-NOT: andl {{.+}}, %esp +define void @test_alignment_d() #0 { +entry: + %d = alloca double + store double 2.000000e+00, double* %d + call void @food(double* inreg %d) + ret void +} + +; CHECK-LABEL: test_alignment_i: +; CHECK-NOT: andl {{.+}}, %esp +define void @test_alignment_i() #0 { +entry: + %i = alloca i64 + store i64 2, i64* %i + call void @fooi(i64* inreg %i) + ret void +} + + +; CHECK-LABEL: test_alignment_s: +; CHECK-NOT: andl {{.+}}, %esp +define void @test_alignment_s() #0 { + %s = alloca %struct.S, align 4 + call void @foos(%struct.S* inreg %s) + ret void +} + + +; CHECK-LABEL: test_alignment_fp: +; CHECK-NOT: andl {{.+}}, %esp +define void @test_alignment_fp() #0 { +entry: + %f = alloca fp128 + store fp128 0xL00000000000000004000000000000000, fp128* %f + call void @foofp(fp128* inreg %f) + ret void +} + +declare void @food(double* inreg) +declare void @fooi(i64* inreg) +declare void @foos(%struct.S* inreg) +declare void @foofp(fp128* inreg) + attributes #0 = { nounwind "use-soft-float"="true"} attributes #1 = { nounwind argmemonly }