diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp --- a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp @@ -1507,8 +1507,11 @@ unsigned DestBitSize = DestTy->getScalarSizeInBits(); // If the value being extended is zero or positive, use a zext instead. - if (isKnownNonNegative(Src, DL, 0, &AC, &Sext, &DT)) - return CastInst::Create(Instruction::ZExt, Src, DestTy); + if (isKnownNonNegative(Src, DL, 0, &AC, &Sext, &DT)) { + auto *ZExtInst = CastInst::Create(Instruction::ZExt, Src, DestTy); + ZExtInst->setWasSext(true); + return ZExtInst; + } // Try to extend the entire expression tree to the wide destination type. if (shouldChangeType(SrcTy, DestTy) && canEvaluateSExtd(Src, DestTy)) { diff --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp --- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp @@ -395,15 +395,25 @@ return replaceInstUsesWith(I, R); // (zext bool X) * (zext bool Y) --> zext (and X, Y) - // (sext bool X) * (sext bool Y) --> zext (and X, Y) // Note: -1 * -1 == 1 * 1 == 1 (if the extends match, the result is the same) - if (((match(Op0, m_ZExt(m_Value(X))) && match(Op1, m_ZExt(m_Value(Y)))) || - (match(Op0, m_SExt(m_Value(X))) && match(Op1, m_SExt(m_Value(Y))))) && + if ((match(Op0, m_ZExt(m_Value(X))) && match(Op1, m_ZExt(m_Value(Y)))) && X->getType()->isIntOrIntVectorTy(1) && X->getType() == Y->getType() && (Op0->hasOneUse() || Op1->hasOneUse() || X == Y)) { Value *And = Builder.CreateAnd(X, Y, "mulbool"); return CastInst::Create(Instruction::ZExt, And, Ty); } + + // (sext bool X) * (sext bool Y) --> zext (and X, Y) + // Note: -1 * -1 == 1 * 1 == 1 (if the extends match, the result is the same) + if ((match(Op0, m_SExt(m_Value(X))) && match(Op1, m_SExt(m_Value(Y)))) && + X->getType()->isIntOrIntVectorTy(1) && X->getType() == Y->getType() && + (Op0->hasOneUse() || Op1->hasOneUse() || X == Y)) { + Value *And = Builder.CreateAnd(X, Y, "mulbool"); + auto *ZExtInst = CastInst::Create(Instruction::ZExt, And, Ty); + ZExtInst->setWasSext(true); + return ZExtInst; + } + // (sext bool X) * (zext bool Y) --> sext (and X, Y) // (zext bool X) * (sext bool Y) --> sext (and X, Y) // Note: -1 * 1 == 1 * -1 == -1 diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp --- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp @@ -379,6 +379,8 @@ Value *Y; if (match(Op1, m_OneUse(m_SExt(m_Value(Y))))) { Value *NewExt = Builder.CreateZExt(Y, Ty, Op1->getName()); + if (auto *ZExtI = dyn_cast(NewExt)) + ZExtI->setWasSext(true); return BinaryOperator::Create(I.getOpcode(), Op0, NewExt); } @@ -1264,7 +1266,9 @@ // zeros? lshr (sext iM X to iN), N-1 --> zext (lshr X, M-1) to iN if (ShAmtC == BitWidth - 1) { Value *NewLShr = Builder.CreateLShr(X, SrcTyBitWidth - 1); - return new ZExtInst(NewLShr, Ty); + auto *ZExt = new ZExtInst(NewLShr, Ty); + ZExt->setWasSext(true); + return ZExt; } // lshr (sext iM X to iN), N-M --> zext (ashr X, min(N-M, M-1)) to iN diff --git a/llvm/lib/Transforms/Scalar/BDCE.cpp b/llvm/lib/Transforms/Scalar/BDCE.cpp --- a/llvm/lib/Transforms/Scalar/BDCE.cpp +++ b/llvm/lib/Transforms/Scalar/BDCE.cpp @@ -119,8 +119,11 @@ if (Demanded.countLeadingZeros() >= (DestBitSize - SrcBitSize)) { clearAssumptionsOfUsers(SE, DB); IRBuilder<> Builder(SE); - I.replaceAllUsesWith( - Builder.CreateZExt(SE->getOperand(0), DstTy, SE->getName())); + Value *ZExt = + Builder.CreateZExt(SE->getOperand(0), DstTy, SE->getName()); + if (auto *ZExtI = dyn_cast(ZExt)) + ZExtI->setWasSext(true); + I.replaceAllUsesWith(ZExt); Worklist.push_back(SE); Changed = true; NumSExt2ZExt++; diff --git a/llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp b/llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp --- a/llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp +++ b/llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp @@ -1047,6 +1047,7 @@ auto *ZExt = CastInst::CreateZExtOrBitCast(Base, SDI->getType(), "", SDI); ZExt->takeName(SDI); ZExt->setDebugLoc(SDI->getDebugLoc()); + ZExt->setWasSext(true); SDI->replaceAllUsesWith(ZExt); SDI->eraseFromParent(); diff --git a/llvm/lib/Transforms/Utils/SCCPSolver.cpp b/llvm/lib/Transforms/Utils/SCCPSolver.cpp --- a/llvm/lib/Transforms/Utils/SCCPSolver.cpp +++ b/llvm/lib/Transforms/Utils/SCCPSolver.cpp @@ -142,6 +142,7 @@ if (InsertedValues.count(Op0) || !isNonNegative(Op0)) return false; NewInst = new ZExtInst(Op0, Inst.getType(), "", &Inst); + NewInst->setWasSext(true); break; } case Instruction::AShr: { diff --git a/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp b/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp --- a/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp +++ b/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp @@ -549,6 +549,7 @@ assert(DoesZExtCollapse && "Unprofitable zext?"); Ext = new ZExtInst(Op1, IVTy, "zext", ICI); Pred = ICmpInst::getUnsignedPredicate(Pred); + Ext->setWasSext(true); } else { assert(DoesSExtCollapse && "Unprofitable sext?"); Ext = new SExtInst(Op1, IVTy, "sext", ICI); diff --git a/llvm/test/Transforms/BDCE/sext_multi_uses.ll b/llvm/test/Transforms/BDCE/sext_multi_uses.ll --- a/llvm/test/Transforms/BDCE/sext_multi_uses.ll +++ b/llvm/test/Transforms/BDCE/sext_multi_uses.ll @@ -3,7 +3,7 @@ define i32 @ZEXT_0(i16 %a) { ; CHECK-LABEL: @ZEXT_0( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[EXT1:%.*]] = zext i16 [[A:%.*]] to i32 +; CHECK-NEXT: [[EXT1:%.*]] = zext was_sext i16 [[A:%.*]] to i32 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[EXT1]], 65280 ; CHECK-NEXT: [[LSR:%.*]] = lshr i32 [[EXT1]], 8 ; CHECK-NEXT: [[AND2:%.*]] = and i32 [[LSR]], 255 @@ -22,7 +22,7 @@ define i32 @ZEXT_1(i16 %a) { ; CHECK-LABEL: @ZEXT_1( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[EXT1:%.*]] = zext i16 [[A:%.*]] to i32 +; CHECK-NEXT: [[EXT1:%.*]] = zext was_sext i16 [[A:%.*]] to i32 ; CHECK-NEXT: [[LSR:%.*]] = lshr i32 [[EXT1]], 8 ; CHECK-NEXT: [[AND2:%.*]] = and i32 [[LSR]], 255 ; CHECK-NEXT: [[AND:%.*]] = or i32 [[EXT1]], -65536 @@ -99,7 +99,7 @@ define i16 @clear_assumptions(i8 %x, i16 %y) { ; CHECK-LABEL: @clear_assumptions( -; CHECK-NEXT: [[EXT1:%.*]] = zext i8 [[X:%.*]] to i16 +; CHECK-NEXT: [[EXT1:%.*]] = zext was_sext i8 [[X:%.*]] to i16 ; CHECK-NEXT: [[ADD:%.*]] = add i16 [[EXT1]], [[Y:%.*]] ; CHECK-NEXT: [[AND:%.*]] = and i16 [[ADD]], 255 ; CHECK-NEXT: ret i16 [[AND]] diff --git a/llvm/test/Transforms/CorrelatedValuePropagation/cond-at-use.ll b/llvm/test/Transforms/CorrelatedValuePropagation/cond-at-use.ll --- a/llvm/test/Transforms/CorrelatedValuePropagation/cond-at-use.ll +++ b/llvm/test/Transforms/CorrelatedValuePropagation/cond-at-use.ll @@ -520,7 +520,7 @@ define i32 @sext_convert(i16 %x) { ; CHECK-LABEL: @sext_convert( -; CHECK-NEXT: [[EXT:%.*]] = zext i16 [[X:%.*]] to i32 +; CHECK-NEXT: [[EXT:%.*]] = zext was_sext i16 [[X:%.*]] to i32 ; CHECK-NEXT: [[CMP:%.*]] = icmp sge i16 [[X]], 0 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[EXT]], i32 24 ; CHECK-NEXT: ret i32 [[SEL]] diff --git a/llvm/test/Transforms/CorrelatedValuePropagation/sext.ll b/llvm/test/Transforms/CorrelatedValuePropagation/sext.ll --- a/llvm/test/Transforms/CorrelatedValuePropagation/sext.ll +++ b/llvm/test/Transforms/CorrelatedValuePropagation/sext.ll @@ -18,13 +18,32 @@ ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], -1 ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]] ; CHECK: for.body: -; CHECK-NEXT: [[EXT_WIDE1:%.*]] = zext i32 [[A]] to i64 -; CHECK-NEXT: call void @use64(i64 [[EXT_WIDE1]]) -; CHECK-NEXT: [[EXT]] = trunc i64 [[EXT_WIDE1]] to i32 +; CHECK-NEXT: [[EXT_WIDE:%.*]] = zext was_sext i32 [[A]] to i64 +; CHECK-NEXT: call void @use64(i64 [[EXT_WIDE]]) +; CHECK-NEXT: [[EXT]] = trunc i64 [[EXT_WIDE]] to i32 ; CHECK-NEXT: br label [[FOR_COND]] ; CHECK: for.end: ; CHECK-NEXT: ret void ; +; DEBUG-LABEL: @test1( +; DEBUG-NEXT: entry: +; DEBUG-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG16:![0-9]+]] +; DEBUG: for.cond: +; DEBUG-NEXT: [[A:%.*]] = phi i32 [ [[N:%.*]], [[ENTRY:%.*]] ], [ [[EXT:%.*]], [[FOR_BODY:%.*]] ], !dbg [[DBG17:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i32 [[A]], metadata [[META9:![0-9]+]], metadata !DIExpression()), !dbg [[DBG17]] +; DEBUG-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], -1, !dbg [[DBG18:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i1 [[CMP]], metadata [[META11:![0-9]+]], metadata !DIExpression()), !dbg [[DBG18]] +; DEBUG-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]], !dbg [[DBG19:![0-9]+]] +; DEBUG: for.body: +; DEBUG-NEXT: [[EXT_WIDE:%.*]] = zext was_sext i32 [[A]] to i64, !dbg [[DBG20:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i64 [[EXT_WIDE]], metadata [[META13:![0-9]+]], metadata !DIExpression()), !dbg [[DBG20]] +; DEBUG-NEXT: call void @use64(i64 [[EXT_WIDE]]), !dbg [[DBG21:![0-9]+]] +; DEBUG-NEXT: [[EXT]] = trunc i64 [[EXT_WIDE]] to i32, !dbg [[DBG22:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i32 [[EXT]], metadata [[META15:![0-9]+]], metadata !DIExpression()), !dbg [[DBG22]] +; DEBUG-NEXT: br label [[FOR_COND]], !dbg [[DBG23:![0-9]+]] +; DEBUG: for.end: +; DEBUG-NEXT: ret void, !dbg [[DBG24:![0-9]+]] +; entry: br label %for.cond @@ -60,6 +79,25 @@ ; CHECK: for.end: ; CHECK-NEXT: ret void ; +; DEBUG-LABEL: @test2( +; DEBUG-NEXT: entry: +; DEBUG-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG31:![0-9]+]] +; DEBUG: for.cond: +; DEBUG-NEXT: [[A:%.*]] = phi i32 [ [[N:%.*]], [[ENTRY:%.*]] ], [ [[EXT:%.*]], [[FOR_BODY:%.*]] ], !dbg [[DBG32:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i32 [[A]], metadata [[META27:![0-9]+]], metadata !DIExpression()), !dbg [[DBG32]] +; DEBUG-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], -2, !dbg [[DBG33:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i1 [[CMP]], metadata [[META28:![0-9]+]], metadata !DIExpression()), !dbg [[DBG33]] +; DEBUG-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]], !dbg [[DBG34:![0-9]+]] +; DEBUG: for.body: +; DEBUG-NEXT: [[EXT_WIDE:%.*]] = sext i32 [[A]] to i64, !dbg [[DBG35:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i64 [[EXT_WIDE]], metadata [[META29:![0-9]+]], metadata !DIExpression()), !dbg [[DBG35]] +; DEBUG-NEXT: call void @use64(i64 [[EXT_WIDE]]), !dbg [[DBG36:![0-9]+]] +; DEBUG-NEXT: [[EXT]] = trunc i64 [[EXT_WIDE]] to i32, !dbg [[DBG37:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i32 [[EXT]], metadata [[META30:![0-9]+]], metadata !DIExpression()), !dbg [[DBG37]] +; DEBUG-NEXT: br label [[FOR_COND]], !dbg [[DBG38:![0-9]+]] +; DEBUG: for.end: +; DEBUG-NEXT: ret void, !dbg [[DBG39:![0-9]+]] +; entry: br label %for.cond @@ -85,13 +123,28 @@ ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N:%.*]], -1 ; CHECK-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]] ; CHECK: bb: -; CHECK-NEXT: [[EXT_WIDE1:%.*]] = zext i32 [[N]] to i64 -; CHECK-NEXT: call void @use64(i64 [[EXT_WIDE1]]) -; CHECK-NEXT: [[EXT:%.*]] = trunc i64 [[EXT_WIDE1]] to i32 +; CHECK-NEXT: [[EXT_WIDE:%.*]] = zext was_sext i32 [[N]] to i64 +; CHECK-NEXT: call void @use64(i64 [[EXT_WIDE]]) +; CHECK-NEXT: [[EXT:%.*]] = trunc i64 [[EXT_WIDE]] to i32 ; CHECK-NEXT: br label [[EXIT]] ; CHECK: exit: ; CHECK-NEXT: ret void ; +; DEBUG-LABEL: @test3( +; DEBUG-NEXT: entry: +; DEBUG-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N:%.*]], -1, !dbg [[DBG45:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i1 [[CMP]], metadata [[META42:![0-9]+]], metadata !DIExpression()), !dbg [[DBG45]] +; DEBUG-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]], !dbg [[DBG46:![0-9]+]] +; DEBUG: bb: +; DEBUG-NEXT: [[EXT_WIDE:%.*]] = zext was_sext i32 [[N]] to i64, !dbg [[DBG47:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i64 [[EXT_WIDE]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG47]] +; DEBUG-NEXT: call void @use64(i64 [[EXT_WIDE]]), !dbg [[DBG48:![0-9]+]] +; DEBUG-NEXT: [[EXT:%.*]] = trunc i64 [[EXT_WIDE]] to i32, !dbg [[DBG49:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i32 [[EXT]], metadata [[META44:![0-9]+]], metadata !DIExpression()), !dbg [[DBG49]] +; DEBUG-NEXT: br label [[EXIT]], !dbg [[DBG50:![0-9]+]] +; DEBUG: exit: +; DEBUG-NEXT: ret void, !dbg [[DBG51:![0-9]+]] +; entry: %cmp = icmp sgt i32 %n, -1 br i1 %cmp, label %bb, label %exit @@ -120,6 +173,21 @@ ; CHECK: exit: ; CHECK-NEXT: ret void ; +; DEBUG-LABEL: @test4( +; DEBUG-NEXT: entry: +; DEBUG-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N:%.*]], -2, !dbg [[DBG57:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i1 [[CMP]], metadata [[META54:![0-9]+]], metadata !DIExpression()), !dbg [[DBG57]] +; DEBUG-NEXT: br i1 [[CMP]], label [[BB:%.*]], label [[EXIT:%.*]], !dbg [[DBG58:![0-9]+]] +; DEBUG: bb: +; DEBUG-NEXT: [[EXT_WIDE:%.*]] = sext i32 [[N]] to i64, !dbg [[DBG59:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i64 [[EXT_WIDE]], metadata [[META55:![0-9]+]], metadata !DIExpression()), !dbg [[DBG59]] +; DEBUG-NEXT: call void @use64(i64 [[EXT_WIDE]]), !dbg [[DBG60:![0-9]+]] +; DEBUG-NEXT: [[EXT:%.*]] = trunc i64 [[EXT_WIDE]] to i32, !dbg [[DBG61:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i32 [[EXT]], metadata [[META56:![0-9]+]], metadata !DIExpression()), !dbg [[DBG61]] +; DEBUG-NEXT: br label [[EXIT]], !dbg [[DBG62:![0-9]+]] +; DEBUG: exit: +; DEBUG-NEXT: ret void, !dbg [[DBG63:![0-9]+]] +; entry: %cmp = icmp sgt i32 %n, -2 br i1 %cmp, label %bb, label %exit diff --git a/llvm/test/Transforms/InstCombine/adjust-for-minmax.ll b/llvm/test/Transforms/InstCombine/adjust-for-minmax.ll --- a/llvm/test/Transforms/InstCombine/adjust-for-minmax.ll +++ b/llvm/test/Transforms/InstCombine/adjust-for-minmax.ll @@ -7,8 +7,8 @@ define i32 @smax1(i32 %n) { ; CHECK-LABEL: @smax1( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0) +; CHECK-NEXT: ret i32 [[M]] ; %t = icmp sgt i32 %n, 0 %m = select i1 %t, i32 %n, i32 0 @@ -19,8 +19,8 @@ define i32 @smin1(i32 %n) { ; CHECK-LABEL: @smin1( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[N:%.*]], i32 0) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call i32 @llvm.smin.i32(i32 [[N:%.*]], i32 0) +; CHECK-NEXT: ret i32 [[M]] ; %t = icmp slt i32 %n, 0 %m = select i1 %t, i32 %n, i32 0 @@ -31,8 +31,8 @@ define i32 @smax2(i32 %n) { ; CHECK-LABEL: @smax2( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0) +; CHECK-NEXT: ret i32 [[M]] ; %t = icmp sge i32 %n, 1 %m = select i1 %t, i32 %n, i32 0 @@ -43,8 +43,8 @@ define i32 @smin2(i32 %n) { ; CHECK-LABEL: @smin2( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[N:%.*]], i32 0) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call i32 @llvm.smin.i32(i32 [[N:%.*]], i32 0) +; CHECK-NEXT: ret i32 [[M]] ; %t = icmp sle i32 %n, -1 %m = select i1 %t, i32 %n, i32 0 @@ -55,8 +55,8 @@ define i32 @smax3(i32 %n) { ; CHECK-LABEL: @smax3( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0) +; CHECK-NEXT: ret i32 [[M]] ; %t = icmp sgt i32 %n, -1 %m = select i1 %t, i32 %n, i32 0 @@ -67,8 +67,8 @@ define <2 x i32> @smax3_vec(<2 x i32> %n) { ; CHECK-LABEL: @smax3_vec( -; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[N:%.*]], <2 x i32> zeroinitializer) -; CHECK-NEXT: ret <2 x i32> [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[N:%.*]], <2 x i32> zeroinitializer) +; CHECK-NEXT: ret <2 x i32> [[M]] ; %t = icmp sgt <2 x i32> %n, %m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> zeroinitializer @@ -79,8 +79,8 @@ define i32 @smin3(i32 %n) { ; CHECK-LABEL: @smin3( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[N:%.*]], i32 0) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call i32 @llvm.smin.i32(i32 [[N:%.*]], i32 0) +; CHECK-NEXT: ret i32 [[M]] ; %t = icmp slt i32 %n, 1 %m = select i1 %t, i32 %n, i32 0 @@ -91,8 +91,8 @@ define <2 x i32> @smin3_vec(<2 x i32> %n) { ; CHECK-LABEL: @smin3_vec( -; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[N:%.*]], <2 x i32> zeroinitializer) -; CHECK-NEXT: ret <2 x i32> [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[N:%.*]], <2 x i32> zeroinitializer) +; CHECK-NEXT: ret <2 x i32> [[M]] ; %t = icmp slt <2 x i32> %n, %m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> zeroinitializer @@ -103,8 +103,8 @@ define i32 @umax3(i32 %n) { ; CHECK-LABEL: @umax3( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[N:%.*]], i32 5) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call i32 @llvm.umax.i32(i32 [[N:%.*]], i32 5) +; CHECK-NEXT: ret i32 [[M]] ; %t = icmp ugt i32 %n, 4 %m = select i1 %t, i32 %n, i32 5 @@ -115,8 +115,8 @@ define <2 x i32> @umax3_vec(<2 x i32> %n) { ; CHECK-LABEL: @umax3_vec( -; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umax.v2i32(<2 x i32> [[N:%.*]], <2 x i32> ) -; CHECK-NEXT: ret <2 x i32> [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call <2 x i32> @llvm.umax.v2i32(<2 x i32> [[N:%.*]], <2 x i32> ) +; CHECK-NEXT: ret <2 x i32> [[M]] ; %t = icmp ugt <2 x i32> %n, %m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> @@ -127,8 +127,8 @@ define i32 @umin3(i32 %n) { ; CHECK-LABEL: @umin3( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[N:%.*]], i32 6) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call i32 @llvm.umin.i32(i32 [[N:%.*]], i32 6) +; CHECK-NEXT: ret i32 [[M]] ; %t = icmp ult i32 %n, 7 %m = select i1 %t, i32 %n, i32 6 @@ -139,8 +139,8 @@ define <2 x i32> @umin3_vec(<2 x i32> %n) { ; CHECK-LABEL: @umin3_vec( -; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[N:%.*]], <2 x i32> ) -; CHECK-NEXT: ret <2 x i32> [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[N:%.*]], <2 x i32> ) +; CHECK-NEXT: ret <2 x i32> [[M]] ; %t = icmp ult <2 x i32> %n, %m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> @@ -151,8 +151,8 @@ define i32 @smax4(i32 %n) { ; CHECK-LABEL: @smax4( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0) +; CHECK-NEXT: ret i32 [[M]] ; %t = icmp sge i32 %n, 0 %m = select i1 %t, i32 %n, i32 0 @@ -163,8 +163,8 @@ define <2 x i32> @smax4_vec(<2 x i32> %n) { ; CHECK-LABEL: @smax4_vec( -; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[N:%.*]], <2 x i32> zeroinitializer) -; CHECK-NEXT: ret <2 x i32> [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[N:%.*]], <2 x i32> zeroinitializer) +; CHECK-NEXT: ret <2 x i32> [[M]] ; %t = icmp sge <2 x i32> %n, zeroinitializer %m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> zeroinitializer @@ -175,8 +175,8 @@ define i32 @smin4(i32 %n) { ; CHECK-LABEL: @smin4( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[N:%.*]], i32 0) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call i32 @llvm.smin.i32(i32 [[N:%.*]], i32 0) +; CHECK-NEXT: ret i32 [[M]] ; %t = icmp sle i32 %n, 0 %m = select i1 %t, i32 %n, i32 0 @@ -187,8 +187,8 @@ define <2 x i32> @smin4_vec(<2 x i32> %n) { ; CHECK-LABEL: @smin4_vec( -; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[N:%.*]], <2 x i32> zeroinitializer) -; CHECK-NEXT: ret <2 x i32> [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[N:%.*]], <2 x i32> zeroinitializer) +; CHECK-NEXT: ret <2 x i32> [[M]] ; %t = icmp sle <2 x i32> %n, zeroinitializer %m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> zeroinitializer @@ -199,8 +199,8 @@ define i32 @umax4(i32 %n) { ; CHECK-LABEL: @umax4( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[N:%.*]], i32 8) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call i32 @llvm.umax.i32(i32 [[N:%.*]], i32 8) +; CHECK-NEXT: ret i32 [[M]] ; %t = icmp uge i32 %n, 8 %m = select i1 %t, i32 %n, i32 8 @@ -211,8 +211,8 @@ define <2 x i32> @umax4_vec(<2 x i32> %n) { ; CHECK-LABEL: @umax4_vec( -; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umax.v2i32(<2 x i32> [[N:%.*]], <2 x i32> ) -; CHECK-NEXT: ret <2 x i32> [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call <2 x i32> @llvm.umax.v2i32(<2 x i32> [[N:%.*]], <2 x i32> ) +; CHECK-NEXT: ret <2 x i32> [[M]] ; %t = icmp uge <2 x i32> %n, %m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> @@ -223,8 +223,8 @@ define i32 @umin4(i32 %n) { ; CHECK-LABEL: @umin4( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[N:%.*]], i32 9) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call i32 @llvm.umin.i32(i32 [[N:%.*]], i32 9) +; CHECK-NEXT: ret i32 [[M]] ; %t = icmp ule i32 %n, 9 %m = select i1 %t, i32 %n, i32 9 @@ -235,8 +235,8 @@ define <2 x i32> @umin4_vec(<2 x i32> %n) { ; CHECK-LABEL: @umin4_vec( -; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[N:%.*]], <2 x i32> ) -; CHECK-NEXT: ret <2 x i32> [[TMP1]] +; CHECK-NEXT: [[M:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[N:%.*]], <2 x i32> ) +; CHECK-NEXT: ret <2 x i32> [[M]] ; %t = icmp ule <2 x i32> %n, %m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> @@ -246,8 +246,8 @@ define i64 @smax_sext(i32 %a) { ; CHECK-LABEL: @smax_sext( ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[A:%.*]], i32 0) -; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 -; CHECK-NEXT: ret i64 [[TMP2]] +; CHECK-NEXT: [[MAX:%.*]] = zext was_sext i32 [[TMP1]] to i64 +; CHECK-NEXT: ret i64 [[MAX]] ; %a_ext = sext i32 %a to i64 %cmp = icmp sgt i32 %a, -1 @@ -258,8 +258,8 @@ define <2 x i64> @smax_sext_vec(<2 x i32> %a) { ; CHECK-LABEL: @smax_sext_vec( ; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[A:%.*]], <2 x i32> zeroinitializer) -; CHECK-NEXT: [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64> -; CHECK-NEXT: ret <2 x i64> [[TMP2]] +; CHECK-NEXT: [[MAX:%.*]] = zext was_sext <2 x i32> [[TMP1]] to <2 x i64> +; CHECK-NEXT: ret <2 x i64> [[MAX]] ; %a_ext = sext <2 x i32> %a to <2 x i64> %cmp = icmp sgt <2 x i32> %a, @@ -270,8 +270,8 @@ define i64 @smin_sext(i32 %a) { ; CHECK-LABEL: @smin_sext( ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A:%.*]], i32 0) -; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[TMP1]] to i64 -; CHECK-NEXT: ret i64 [[TMP2]] +; CHECK-NEXT: [[MIN:%.*]] = sext i32 [[TMP1]] to i64 +; CHECK-NEXT: ret i64 [[MIN]] ; %a_ext = sext i32 %a to i64 %cmp = icmp slt i32 %a, 1 @@ -282,8 +282,8 @@ define <2 x i64>@smin_sext_vec(<2 x i32> %a) { ; CHECK-LABEL: @smin_sext_vec( ; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[A:%.*]], <2 x i32> zeroinitializer) -; CHECK-NEXT: [[TMP2:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64> -; CHECK-NEXT: ret <2 x i64> [[TMP2]] +; CHECK-NEXT: [[MIN:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64> +; CHECK-NEXT: ret <2 x i64> [[MIN]] ; %a_ext = sext <2 x i32> %a to <2 x i64> %cmp = icmp slt <2 x i32> %a, @@ -294,8 +294,8 @@ define i64 @umax_sext(i32 %a) { ; CHECK-LABEL: @umax_sext( ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[A:%.*]], i32 3) -; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[TMP1]] to i64 -; CHECK-NEXT: ret i64 [[TMP2]] +; CHECK-NEXT: [[MAX:%.*]] = sext i32 [[TMP1]] to i64 +; CHECK-NEXT: ret i64 [[MAX]] ; %a_ext = sext i32 %a to i64 %cmp = icmp ugt i32 %a, 2 @@ -306,8 +306,8 @@ define <2 x i64> @umax_sext_vec(<2 x i32> %a) { ; CHECK-LABEL: @umax_sext_vec( ; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umax.v2i32(<2 x i32> [[A:%.*]], <2 x i32> ) -; CHECK-NEXT: [[TMP2:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64> -; CHECK-NEXT: ret <2 x i64> [[TMP2]] +; CHECK-NEXT: [[MAX:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64> +; CHECK-NEXT: ret <2 x i64> [[MAX]] ; %a_ext = sext <2 x i32> %a to <2 x i64> %cmp = icmp ugt <2 x i32> %a, @@ -318,8 +318,8 @@ define i64 @umin_sext(i32 %a) { ; CHECK-LABEL: @umin_sext( ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[A:%.*]], i32 2) -; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 -; CHECK-NEXT: ret i64 [[TMP2]] +; CHECK-NEXT: [[MIN:%.*]] = zext was_sext i32 [[TMP1]] to i64 +; CHECK-NEXT: ret i64 [[MIN]] ; %a_ext = sext i32 %a to i64 %cmp = icmp ult i32 %a, 3 @@ -330,8 +330,8 @@ define <2 x i64> @umin_sext_vec(<2 x i32> %a) { ; CHECK-LABEL: @umin_sext_vec( ; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[A:%.*]], <2 x i32> ) -; CHECK-NEXT: [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64> -; CHECK-NEXT: ret <2 x i64> [[TMP2]] +; CHECK-NEXT: [[MIN:%.*]] = zext was_sext <2 x i32> [[TMP1]] to <2 x i64> +; CHECK-NEXT: ret <2 x i64> [[MIN]] ; %a_ext = sext <2 x i32> %a to <2 x i64> %cmp = icmp ult <2 x i32> %a, @@ -342,8 +342,8 @@ define i64 @umax_sext2(i32 %a) { ; CHECK-LABEL: @umax_sext2( ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[A:%.*]], i32 2) -; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[TMP1]] to i64 -; CHECK-NEXT: ret i64 [[TMP2]] +; CHECK-NEXT: [[MIN:%.*]] = sext i32 [[TMP1]] to i64 +; CHECK-NEXT: ret i64 [[MIN]] ; %a_ext = sext i32 %a to i64 %cmp = icmp ult i32 %a, 3 @@ -354,8 +354,8 @@ define <2 x i64> @umax_sext2_vec(<2 x i32> %a) { ; CHECK-LABEL: @umax_sext2_vec( ; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umax.v2i32(<2 x i32> [[A:%.*]], <2 x i32> ) -; CHECK-NEXT: [[TMP2:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64> -; CHECK-NEXT: ret <2 x i64> [[TMP2]] +; CHECK-NEXT: [[MIN:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64> +; CHECK-NEXT: ret <2 x i64> [[MIN]] ; %a_ext = sext <2 x i32> %a to <2 x i64> %cmp = icmp ult <2 x i32> %a, @@ -366,8 +366,8 @@ define i64 @umin_sext2(i32 %a) { ; CHECK-LABEL: @umin_sext2( ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[A:%.*]], i32 3) -; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 -; CHECK-NEXT: ret i64 [[TMP2]] +; CHECK-NEXT: [[MIN:%.*]] = zext was_sext i32 [[TMP1]] to i64 +; CHECK-NEXT: ret i64 [[MIN]] ; %a_ext = sext i32 %a to i64 %cmp = icmp ugt i32 %a, 2 @@ -378,8 +378,8 @@ define <2 x i64> @umin_sext2_vec(<2 x i32> %a) { ; CHECK-LABEL: @umin_sext2_vec( ; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[A:%.*]], <2 x i32> ) -; CHECK-NEXT: [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64> -; CHECK-NEXT: ret <2 x i64> [[TMP2]] +; CHECK-NEXT: [[MIN:%.*]] = zext was_sext <2 x i32> [[TMP1]] to <2 x i64> +; CHECK-NEXT: ret <2 x i64> [[MIN]] ; %a_ext = sext <2 x i32> %a to <2 x i64> %cmp = icmp ugt <2 x i32> %a, @@ -390,8 +390,8 @@ define i64 @umax_zext(i32 %a) { ; CHECK-LABEL: @umax_zext( ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[A:%.*]], i32 3) -; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 -; CHECK-NEXT: ret i64 [[TMP2]] +; CHECK-NEXT: [[MAX:%.*]] = zext i32 [[TMP1]] to i64 +; CHECK-NEXT: ret i64 [[MAX]] ; %a_ext = zext i32 %a to i64 %cmp = icmp ugt i32 %a, 2 @@ -402,8 +402,8 @@ define <2 x i64> @umax_zext_vec(<2 x i32> %a) { ; CHECK-LABEL: @umax_zext_vec( ; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umax.v2i32(<2 x i32> [[A:%.*]], <2 x i32> ) -; CHECK-NEXT: [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64> -; CHECK-NEXT: ret <2 x i64> [[TMP2]] +; CHECK-NEXT: [[MAX:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64> +; CHECK-NEXT: ret <2 x i64> [[MAX]] ; %a_ext = zext <2 x i32> %a to <2 x i64> %cmp = icmp ugt <2 x i32> %a, @@ -414,8 +414,8 @@ define i64 @umin_zext(i32 %a) { ; CHECK-LABEL: @umin_zext( ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[A:%.*]], i32 2) -; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 -; CHECK-NEXT: ret i64 [[TMP2]] +; CHECK-NEXT: [[MIN:%.*]] = zext i32 [[TMP1]] to i64 +; CHECK-NEXT: ret i64 [[MIN]] ; %a_ext = zext i32 %a to i64 %cmp = icmp ult i32 %a, 3 @@ -426,8 +426,8 @@ define <2 x i64> @umin_zext_vec(<2 x i32> %a) { ; CHECK-LABEL: @umin_zext_vec( ; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[A:%.*]], <2 x i32> ) -; CHECK-NEXT: [[TMP2:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64> -; CHECK-NEXT: ret <2 x i64> [[TMP2]] +; CHECK-NEXT: [[MIN:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64> +; CHECK-NEXT: ret <2 x i64> [[MIN]] ; %a_ext = zext <2 x i32> %a to <2 x i64> %cmp = icmp ult <2 x i32> %a, diff --git a/llvm/test/Transforms/InstCombine/cast-mul-select.ll b/llvm/test/Transforms/InstCombine/cast-mul-select.ll --- a/llvm/test/Transforms/InstCombine/cast-mul-select.ll +++ b/llvm/test/Transforms/InstCombine/cast-mul-select.ll @@ -9,17 +9,20 @@ ; CHECK-NEXT: [[C:%.*]] = mul i32 [[X:%.*]], [[Y:%.*]] ; CHECK-NEXT: [[D:%.*]] = and i32 [[C]], 255 ; CHECK-NEXT: ret i32 [[D]] +; +; DBGINFO-LABEL: @mul( +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 [[X:%.*]], metadata [[META9:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_stack_value)), !dbg [[DBG15:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 [[Y:%.*]], metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_stack_value)), !dbg [[DBG16:![0-9]+]] +; DBGINFO-NEXT: [[C:%.*]] = mul i32 [[X]], [[Y]], !dbg [[DBG17:![0-9]+]] +; DBGINFO-NEXT: [[D:%.*]] = and i32 [[C]], 255, !dbg [[DBG18:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 [[C]], metadata [[META12:![0-9]+]], metadata !DIExpression()), !dbg [[DBG17]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 [[D]], metadata [[META13:![0-9]+]], metadata !DIExpression()), !dbg [[DBG18]] +; DBGINFO-NEXT: ret i32 [[D]], !dbg [[DBG19:![0-9]+]] +; ; Test that when zext is evaluated in different type ; we preserve the debug information in the resulting ; instruction. -; DBGINFO-LABEL: @mul( -; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 %x, {{.*}} !DIExpression(DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_stack_value)) -; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 %y, {{.*}} !DIExpression(DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_stack_value)) -; DBGINFO-NEXT: [[C:%.*]] = mul i32 {{.*}} -; DBGINFO-NEXT: [[D:%.*]] = and i32 {{.*}} -; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 [[C]] -; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 [[D]] %A = trunc i32 %x to i8 %B = trunc i32 %y to i8 @@ -34,6 +37,18 @@ ; CHECK-NEXT: [[E:%.*]] = select i1 [[COND:%.*]], i32 [[Z:%.*]], i32 [[D]] ; CHECK-NEXT: [[F:%.*]] = and i32 [[E]], 255 ; CHECK-NEXT: ret i32 [[F]] +; +; DBGINFO-LABEL: @select1( +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 [[X:%.*]], metadata [[META22:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_stack_value)), !dbg [[DBG28:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 [[Y:%.*]], metadata [[META23:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_stack_value)), !dbg [[DBG29:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 [[Z:%.*]], metadata [[META24:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_stack_value)), !dbg [[DBG30:![0-9]+]] +; DBGINFO-NEXT: [[D:%.*]] = add i32 [[X]], [[Y]], !dbg [[DBG31:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata !DIArgList(i32 [[X]], i32 [[Y]]), metadata [[META25:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_LLVM_arg, 1, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_plus, DW_OP_stack_value)), !dbg [[DBG31]] +; DBGINFO-NEXT: [[E:%.*]] = select i1 [[COND:%.*]], i32 [[Z]], i32 [[D]], !dbg [[DBG32:![0-9]+]] +; DBGINFO-NEXT: [[F:%.*]] = and i32 [[E]], 255, !dbg [[DBG33:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 [[E]], metadata [[META26:![0-9]+]], metadata !DIExpression()), !dbg [[DBG32]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 [[F]], metadata [[META27:![0-9]+]], metadata !DIExpression()), !dbg [[DBG33]] +; DBGINFO-NEXT: ret i32 [[F]], !dbg [[DBG34:![0-9]+]] ; %A = trunc i32 %x to i8 %B = trunc i32 %y to i8 @@ -49,6 +64,17 @@ ; CHECK-NEXT: [[D:%.*]] = add i8 [[X:%.*]], [[Y:%.*]] ; CHECK-NEXT: [[E:%.*]] = select i1 [[COND:%.*]], i8 [[Z:%.*]], i8 [[D]] ; CHECK-NEXT: ret i8 [[E]] +; +; DBGINFO-LABEL: @select2( +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i8 [[X:%.*]], metadata [[META37:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_stack_value)), !dbg [[DBG43:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i8 [[Y:%.*]], metadata [[META38:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_stack_value)), !dbg [[DBG44:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i8 [[Z:%.*]], metadata [[META39:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_stack_value)), !dbg [[DBG45:![0-9]+]] +; DBGINFO-NEXT: [[D:%.*]] = add i8 [[X]], [[Y]], !dbg [[DBG46:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata !DIArgList(i8 [[X]], i8 [[Y]]), metadata [[META40:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_LLVM_arg, 1, DW_OP_LLVM_convert, 8, DW_ATE_unsigned, DW_OP_LLVM_convert, 32, DW_ATE_unsigned, DW_OP_plus, DW_OP_stack_value)), !dbg [[DBG46]] +; DBGINFO-NEXT: [[E:%.*]] = select i1 [[COND:%.*]], i8 [[Z]], i8 [[D]], !dbg [[DBG47:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 poison, metadata [[META41:![0-9]+]], metadata !DIExpression()), !dbg [[DBG47]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i8 [[E]], metadata [[META42:![0-9]+]], metadata !DIExpression()), !dbg [[DBG48:![0-9]+]] +; DBGINFO-NEXT: ret i8 [[E]], !dbg [[DBG49:![0-9]+]] ; %A = zext i8 %x to i32 %B = zext i8 %y to i32 @@ -69,6 +95,17 @@ ; CHECK-NEXT: [[M:%.*]] = mul i64 [[A]], [[A]] ; CHECK-NEXT: [[T:%.*]] = trunc i64 [[M]] to i32 ; CHECK-NEXT: ret i32 [[T]] +; +; DBGINFO-LABEL: @eval_trunc_multi_use_in_one_inst( +; DBGINFO-NEXT: [[Z:%.*]] = zext i32 [[X:%.*]] to i64, !dbg [[DBG57:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i64 [[Z]], metadata [[META52:![0-9]+]], metadata !DIExpression()), !dbg [[DBG57]] +; DBGINFO-NEXT: [[A:%.*]] = add nuw nsw i64 [[Z]], 15, !dbg [[DBG58:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i64 [[A]], metadata [[META54:![0-9]+]], metadata !DIExpression()), !dbg [[DBG58]] +; DBGINFO-NEXT: [[M:%.*]] = mul i64 [[A]], [[A]], !dbg [[DBG59:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i64 [[M]], metadata [[META55:![0-9]+]], metadata !DIExpression()), !dbg [[DBG59]] +; DBGINFO-NEXT: [[T:%.*]] = trunc i64 [[M]] to i32, !dbg [[DBG60:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 [[T]], metadata [[META56:![0-9]+]], metadata !DIExpression()), !dbg [[DBG60]] +; DBGINFO-NEXT: ret i32 [[T]], !dbg [[DBG61:![0-9]+]] ; %z = zext i32 %x to i64 %a = add nsw nuw i64 %z, 15 @@ -84,6 +121,17 @@ ; CHECK-NEXT: [[M:%.*]] = mul nuw nsw i16 [[A]], [[A]] ; CHECK-NEXT: [[R:%.*]] = zext i16 [[M]] to i32 ; CHECK-NEXT: ret i32 [[R]] +; +; DBGINFO-LABEL: @eval_zext_multi_use_in_one_inst( +; DBGINFO-NEXT: [[T:%.*]] = trunc i32 [[X:%.*]] to i16, !dbg [[DBG69:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i16 [[T]], metadata [[META64:![0-9]+]], metadata !DIExpression()), !dbg [[DBG69]] +; DBGINFO-NEXT: [[A:%.*]] = and i16 [[T]], 5, !dbg [[DBG70:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i16 [[A]], metadata [[META66:![0-9]+]], metadata !DIExpression()), !dbg [[DBG70]] +; DBGINFO-NEXT: [[M:%.*]] = mul nuw nsw i16 [[A]], [[A]], !dbg [[DBG71:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i16 [[M]], metadata [[META67:![0-9]+]], metadata !DIExpression()), !dbg [[DBG71]] +; DBGINFO-NEXT: [[R:%.*]] = zext i16 [[M]] to i32, !dbg [[DBG72:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 [[R]], metadata [[META68:![0-9]+]], metadata !DIExpression()), !dbg [[DBG72]] +; DBGINFO-NEXT: ret i32 [[R]], !dbg [[DBG73:![0-9]+]] ; %t = trunc i32 %x to i16 %a = and i16 %t, 5 @@ -100,6 +148,19 @@ ; CHECK-NEXT: [[O:%.*]] = or i16 [[M]], -32768 ; CHECK-NEXT: [[R:%.*]] = sext i16 [[O]] to i32 ; CHECK-NEXT: ret i32 [[R]] +; +; DBGINFO-LABEL: @eval_sext_multi_use_in_one_inst( +; DBGINFO-NEXT: [[T:%.*]] = trunc i32 [[X:%.*]] to i16, !dbg [[DBG81:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i16 [[T]], metadata [[META76:![0-9]+]], metadata !DIExpression()), !dbg [[DBG81]] +; DBGINFO-NEXT: [[A:%.*]] = and i16 [[T]], 14, !dbg [[DBG82:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i16 [[A]], metadata [[META77:![0-9]+]], metadata !DIExpression()), !dbg [[DBG82]] +; DBGINFO-NEXT: [[M:%.*]] = mul nuw nsw i16 [[A]], [[A]], !dbg [[DBG83:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i16 [[M]], metadata [[META78:![0-9]+]], metadata !DIExpression()), !dbg [[DBG83]] +; DBGINFO-NEXT: [[O:%.*]] = or i16 [[M]], -32768, !dbg [[DBG84:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i16 [[O]], metadata [[META79:![0-9]+]], metadata !DIExpression()), !dbg [[DBG84]] +; DBGINFO-NEXT: [[R:%.*]] = sext i16 [[O]] to i32, !dbg [[DBG85:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 [[R]], metadata [[META80:![0-9]+]], metadata !DIExpression()), !dbg [[DBG85]] +; DBGINFO-NEXT: ret i32 [[R]], !dbg [[DBG86:![0-9]+]] ; %t = trunc i32 %x to i16 %a = and i16 %t, 14 @@ -132,7 +193,7 @@ ; CHECK-NEXT: ] ; CHECK: for.end: ; CHECK-NEXT: [[H:%.*]] = phi i8 [ [[SPEC_SELECT]], [[FOR_BODY3_US]] ], [ [[SPEC_SELECT]], [[FOR_BODY3_US]] ], [ 0, [[FOR_BODY3]] ], [ 0, [[FOR_BODY3]] ] -; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[H]] to i32 +; CHECK-NEXT: [[CONV:%.*]] = zext was_sext i8 [[H]] to i32 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], [[A:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[EXIT]], label [[EXIT2:%.*]] ; CHECK: exit2: @@ -140,6 +201,39 @@ ; CHECK: exit: ; CHECK-NEXT: unreachable ; +; DBGINFO-LABEL: @PR36225( +; DBGINFO-NEXT: entry: +; DBGINFO-NEXT: br label [[WHILE_BODY:%.*]], !dbg [[DBG94:![0-9]+]] +; DBGINFO: while.body: +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i1 poison, metadata [[META89:![0-9]+]], metadata !DIExpression()), !dbg [[DBG95:![0-9]+]] +; DBGINFO-NEXT: br i1 [[C1:%.*]], label [[FOR_BODY3_US:%.*]], label [[FOR_BODY3:%.*]], !dbg [[DBG96:![0-9]+]] +; DBGINFO: for.body3.us: +; DBGINFO-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[B:%.*]], 0, !dbg [[DBG95]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i1 [[TOBOOL]], metadata [[META89]], metadata !DIExpression()), !dbg [[DBG95]] +; DBGINFO-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[TOBOOL]], i8 0, i8 4, !dbg [[DBG97:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i8 [[SPEC_SELECT]], metadata [[META90:![0-9]+]], metadata !DIExpression()), !dbg [[DBG97]] +; DBGINFO-NEXT: switch i3 [[V1:%.*]], label [[EXIT:%.*]] [ +; DBGINFO-NEXT: i3 0, label [[FOR_END:%.*]] +; DBGINFO-NEXT: i3 -1, label [[FOR_END]] +; DBGINFO-NEXT: ], !dbg [[DBG98:![0-9]+]] +; DBGINFO: for.body3: +; DBGINFO-NEXT: switch i3 [[V2:%.*]], label [[EXIT]] [ +; DBGINFO-NEXT: i3 0, label [[FOR_END]] +; DBGINFO-NEXT: i3 -1, label [[FOR_END]] +; DBGINFO-NEXT: ], !dbg [[DBG99:![0-9]+]] +; DBGINFO: for.end: +; DBGINFO-NEXT: [[H:%.*]] = phi i8 [ [[SPEC_SELECT]], [[FOR_BODY3_US]] ], [ [[SPEC_SELECT]], [[FOR_BODY3_US]] ], [ 0, [[FOR_BODY3]] ], [ 0, [[FOR_BODY3]] ], !dbg [[DBG100:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i8 [[H]], metadata [[META91:![0-9]+]], metadata !DIExpression()), !dbg [[DBG100]] +; DBGINFO-NEXT: [[CONV:%.*]] = zext was_sext i8 [[H]] to i32, !dbg [[DBG101:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 [[CONV]], metadata [[META92:![0-9]+]], metadata !DIExpression()), !dbg [[DBG101]] +; DBGINFO-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], [[A:%.*]], !dbg [[DBG102:![0-9]+]] +; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i1 [[CMP]], metadata [[META93:![0-9]+]], metadata !DIExpression()), !dbg [[DBG102]] +; DBGINFO-NEXT: br i1 [[CMP]], label [[EXIT]], label [[EXIT2:%.*]], !dbg [[DBG103:![0-9]+]] +; DBGINFO: exit2: +; DBGINFO-NEXT: unreachable, !dbg [[DBG104:![0-9]+]] +; DBGINFO: exit: +; DBGINFO-NEXT: unreachable, !dbg [[DBG105:![0-9]+]] +; entry: br label %while.body diff --git a/llvm/test/Transforms/InstCombine/gep-sext.ll b/llvm/test/Transforms/InstCombine/gep-sext.ll --- a/llvm/test/Transforms/InstCombine/gep-sext.ll +++ b/llvm/test/Transforms/InstCombine/gep-sext.ll @@ -1,3 +1,4 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt < %s -passes=instcombine -S | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-pc-win32" @@ -6,9 +7,13 @@ ; We prefer to canonicalize the machine width gep indices early define void @test(ptr %p, i32 %index) { -; CHECK-LABEL: @test -; CHECK-NEXT: %1 = sext i32 %index to i64 -; CHECK-NEXT: %addr = getelementptr i32, ptr %p, i64 %1 +; CHECK-LABEL: @test( +; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[INDEX:%.*]] to i64 +; CHECK-NEXT: [[ADDR:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP1]] +; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[ADDR]], align 4 +; CHECK-NEXT: call void @use(i32 [[VAL]]) +; CHECK-NEXT: ret void +; %addr = getelementptr i32, ptr %p, i32 %index %val = load i32, ptr %addr call void @use(i32 %val) @@ -16,9 +21,13 @@ } ; If they've already been canonicalized via zext, that's fine define void @test2(ptr %p, i32 %index) { -; CHECK-LABEL: @test2 -; CHECK-NEXT: %i = zext i32 %index to i64 -; CHECK-NEXT: %addr = getelementptr i32, ptr %p, i64 %i +; CHECK-LABEL: @test2( +; CHECK-NEXT: [[I:%.*]] = zext i32 [[INDEX:%.*]] to i64 +; CHECK-NEXT: [[ADDR:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[I]] +; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[ADDR]], align 4 +; CHECK-NEXT: call void @use(i32 [[VAL]]) +; CHECK-NEXT: ret void +; %i = zext i32 %index to i64 %addr = getelementptr i32, ptr %p, i64 %i %val = load i32, ptr %addr @@ -28,9 +37,16 @@ ; If we can use a zext, we prefer that. This requires ; knowing that the index is positive. define void @test3(ptr %p, i32 %index) { -; CHECK-LABEL: @test3 -; CHECK: zext -; CHECK-NOT: sext +; CHECK-LABEL: @test3( +; CHECK-NEXT: [[ADDR_BEGIN:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 40 +; CHECK-NEXT: [[ADDR_FIXED:%.*]] = getelementptr i32, ptr [[P]], i64 88 +; CHECK-NEXT: [[VAL_FIXED:%.*]] = load i32, ptr [[ADDR_FIXED]], align 4, !range [[RNG0:![0-9]+]] +; CHECK-NEXT: [[TMP1:%.*]] = zext was_sext i32 [[VAL_FIXED]] to i64 +; CHECK-NEXT: [[ADDR:%.*]] = getelementptr i32, ptr [[ADDR_BEGIN]], i64 [[TMP1]] +; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[ADDR]], align 4 +; CHECK-NEXT: call void @use(i32 [[VAL]]) +; CHECK-NEXT: ret void +; %addr_begin = getelementptr i32, ptr %p, i64 40 %addr_fixed = getelementptr i32, ptr %addr_begin, i64 48 %val_fixed = load i32, ptr %addr_fixed, !range !0 @@ -41,9 +57,16 @@ } ; Replace sext with zext where possible define void @test4(ptr %p, i32 %index) { -; CHECK-LABEL: @test4 -; CHECK: zext -; CHECK-NOT: sext +; CHECK-LABEL: @test4( +; CHECK-NEXT: [[ADDR_BEGIN:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 40 +; CHECK-NEXT: [[ADDR_FIXED:%.*]] = getelementptr i32, ptr [[P]], i64 88 +; CHECK-NEXT: [[VAL_FIXED:%.*]] = load i32, ptr [[ADDR_FIXED]], align 4, !range [[RNG0]] +; CHECK-NEXT: [[I:%.*]] = zext was_sext i32 [[VAL_FIXED]] to i64 +; CHECK-NEXT: [[ADDR:%.*]] = getelementptr i32, ptr [[ADDR_BEGIN]], i64 [[I]] +; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[ADDR]], align 4 +; CHECK-NEXT: call void @use(i32 [[VAL]]) +; CHECK-NEXT: ret void +; %addr_begin = getelementptr i32, ptr %p, i64 40 %addr_fixed = getelementptr i32, ptr %addr_begin, i64 48 %val_fixed = load i32, ptr %addr_fixed, !range !0 diff --git a/llvm/test/Transforms/InstCombine/icmp-ext-ext.ll b/llvm/test/Transforms/InstCombine/icmp-ext-ext.ll --- a/llvm/test/Transforms/InstCombine/icmp-ext-ext.ll +++ b/llvm/test/Transforms/InstCombine/icmp-ext-ext.ll @@ -289,7 +289,7 @@ define i1 @zext_sext_sle_known_nonneg_op0_narrow(i8 %x, i16 %y) { ; CHECK-LABEL: @zext_sext_sle_known_nonneg_op0_narrow( ; CHECK-NEXT: [[N:%.*]] = and i8 [[X:%.*]], 12 -; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[N]] to i16 +; CHECK-NEXT: [[TMP1:%.*]] = zext was_sext i8 [[N]] to i16 ; CHECK-NEXT: [[C:%.*]] = icmp sle i16 [[TMP1]], [[Y:%.*]] ; CHECK-NEXT: ret i1 [[C]] ; @@ -370,7 +370,7 @@ define i1 @sext_zext_uge_known_nonneg_op0_wide(i16 %x, i8 %y) { ; CHECK-LABEL: @sext_zext_uge_known_nonneg_op0_wide( ; CHECK-NEXT: [[N:%.*]] = and i8 [[Y:%.*]], 12 -; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[N]] to i16 +; CHECK-NEXT: [[TMP1:%.*]] = zext was_sext i8 [[N]] to i16 ; CHECK-NEXT: [[C:%.*]] = icmp ule i16 [[TMP1]], [[X:%.*]] ; CHECK-NEXT: ret i1 [[C]] ; diff --git a/llvm/test/Transforms/InstCombine/load-cmp.ll b/llvm/test/Transforms/InstCombine/load-cmp.ll --- a/llvm/test/Transforms/InstCombine/load-cmp.ll +++ b/llvm/test/Transforms/InstCombine/load-cmp.ll @@ -106,7 +106,7 @@ define i1 @test4_i16(i16 %X) { ; CHECK-LABEL: @test4_i16( -; CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[X:%.*]] to i32 +; CHECK-NEXT: [[TMP1:%.*]] = zext was_sext i16 [[X:%.*]] to i32 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 933, [[TMP1]] ; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP2]], 1 ; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[TMP3]], 0 @@ -158,8 +158,8 @@ define i1 @test8(i32 %X) { ; CHECK-LABEL: @test8( ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -2 -; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 8 -; CHECK-NEXT: ret i1 [[TMP2]] +; CHECK-NEXT: [[S:%.*]] = icmp eq i32 [[TMP1]], 8 +; CHECK-NEXT: ret i1 [[S]] ; %P = getelementptr inbounds [10 x i16], ptr @G16, i32 0, i32 %X %Q = load i16, ptr %P @@ -178,8 +178,8 @@ define i1 @test9(i32 %X) { ; CHECK-LABEL: @test9( ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -1 -; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 2 -; CHECK-NEXT: ret i1 [[TMP2]] +; CHECK-NEXT: [[R:%.*]] = icmp ult i32 [[TMP1]], 2 +; CHECK-NEXT: ret i1 [[R]] ; %P = getelementptr inbounds [4 x { i32, i32 } ], ptr @GA, i32 0, i32 %X, i32 1 %Q = load i32, ptr %P diff --git a/llvm/test/Transforms/InstCombine/lshr.ll b/llvm/test/Transforms/InstCombine/lshr.ll --- a/llvm/test/Transforms/InstCombine/lshr.ll +++ b/llvm/test/Transforms/InstCombine/lshr.ll @@ -290,7 +290,7 @@ define i18 @fake_sext(i3 %x) { ; CHECK-LABEL: @fake_sext( ; CHECK-NEXT: [[TMP1:%.*]] = lshr i3 [[X:%.*]], 2 -; CHECK-NEXT: [[SH:%.*]] = zext i3 [[TMP1]] to i18 +; CHECK-NEXT: [[SH:%.*]] = zext was_sext i3 [[TMP1]] to i18 ; CHECK-NEXT: ret i18 [[SH]] ; %sext = sext i3 %x to i18 @@ -314,7 +314,7 @@ define <2 x i8> @fake_sext_splat(<2 x i3> %x) { ; CHECK-LABEL: @fake_sext_splat( ; CHECK-NEXT: [[TMP1:%.*]] = lshr <2 x i3> [[X:%.*]], -; CHECK-NEXT: [[SH:%.*]] = zext <2 x i3> [[TMP1]] to <2 x i8> +; CHECK-NEXT: [[SH:%.*]] = zext was_sext <2 x i3> [[TMP1]] to <2 x i8> ; CHECK-NEXT: ret <2 x i8> [[SH]] ; %sext = sext <2 x i3> %x to <2 x i8> diff --git a/llvm/test/Transforms/InstCombine/memcpy-from-global.ll b/llvm/test/Transforms/InstCombine/memcpy-from-global.ll --- a/llvm/test/Transforms/InstCombine/memcpy-from-global.ll +++ b/llvm/test/Transforms/InstCombine/memcpy-from-global.ll @@ -8,25 +8,25 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: [[TMP3:%.*]] = shl i32 [[HASH:%.*]], 2 ; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP3]], 124 -; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[TMP5]] to i64 +; CHECK-NEXT: [[TMP0:%.*]] = zext was_sext i32 [[TMP5]] to i64 ; CHECK-NEXT: [[TMP753:%.*]] = getelementptr [128 x float], ptr @C.0.1248, i64 0, i64 [[TMP0]] ; CHECK-NEXT: [[TMP9:%.*]] = load float, ptr [[TMP753]], align 16 ; CHECK-NEXT: [[TMP11:%.*]] = fmul float [[TMP9]], [[X:%.*]] ; CHECK-NEXT: [[TMP13:%.*]] = fadd float [[TMP11]], 0.000000e+00 ; CHECK-NEXT: [[TMP17_SUM52:%.*]] = or i32 [[TMP5]], 1 -; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[TMP17_SUM52]] to i64 +; CHECK-NEXT: [[TMP1:%.*]] = zext was_sext i32 [[TMP17_SUM52]] to i64 ; CHECK-NEXT: [[TMP1851:%.*]] = getelementptr [128 x float], ptr @C.0.1248, i64 0, i64 [[TMP1]] ; CHECK-NEXT: [[TMP19:%.*]] = load float, ptr [[TMP1851]], align 4 ; CHECK-NEXT: [[TMP21:%.*]] = fmul float [[TMP19]], [[Y:%.*]] ; CHECK-NEXT: [[TMP23:%.*]] = fadd float [[TMP21]], [[TMP13]] ; CHECK-NEXT: [[TMP27_SUM50:%.*]] = or i32 [[TMP5]], 2 -; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP27_SUM50]] to i64 +; CHECK-NEXT: [[TMP2:%.*]] = zext was_sext i32 [[TMP27_SUM50]] to i64 ; CHECK-NEXT: [[TMP2849:%.*]] = getelementptr [128 x float], ptr @C.0.1248, i64 0, i64 [[TMP2]] ; CHECK-NEXT: [[TMP29:%.*]] = load float, ptr [[TMP2849]], align 8 ; CHECK-NEXT: [[TMP31:%.*]] = fmul float [[TMP29]], [[Z:%.*]] ; CHECK-NEXT: [[TMP33:%.*]] = fadd float [[TMP31]], [[TMP23]] ; CHECK-NEXT: [[TMP37_SUM48:%.*]] = or i32 [[TMP5]], 3 -; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP37_SUM48]] to i64 +; CHECK-NEXT: [[TMP3:%.*]] = zext was_sext i32 [[TMP37_SUM48]] to i64 ; CHECK-NEXT: [[TMP3847:%.*]] = getelementptr [128 x float], ptr @C.0.1248, i64 0, i64 [[TMP3]] ; CHECK-NEXT: [[TMP39:%.*]] = load float, ptr [[TMP3847]], align 4 ; CHECK-NEXT: [[TMP41:%.*]] = fmul float [[TMP39]], [[W:%.*]] diff --git a/llvm/test/Transforms/InstCombine/minmax-intrinsics.ll b/llvm/test/Transforms/InstCombine/minmax-intrinsics.ll --- a/llvm/test/Transforms/InstCombine/minmax-intrinsics.ll +++ b/llvm/test/Transforms/InstCombine/minmax-intrinsics.ll @@ -217,7 +217,7 @@ define i8 @smax_sext_constant(i5 %x) { ; CHECK-LABEL: @smax_sext_constant( ; CHECK-NEXT: [[TMP1:%.*]] = call i5 @llvm.smax.i5(i5 [[X:%.*]], i5 7) -; CHECK-NEXT: [[M:%.*]] = zext i5 [[TMP1]] to i8 +; CHECK-NEXT: [[M:%.*]] = zext was_sext i5 [[TMP1]] to i8 ; CHECK-NEXT: ret i8 [[M]] ; %e = sext i5 %x to i8 @@ -322,7 +322,7 @@ define i8 @umin_sext_constant(i5 %x) { ; CHECK-LABEL: @umin_sext_constant( ; CHECK-NEXT: [[TMP1:%.*]] = call i5 @llvm.umin.i5(i5 [[X:%.*]], i5 7) -; CHECK-NEXT: [[M:%.*]] = zext i5 [[TMP1]] to i8 +; CHECK-NEXT: [[M:%.*]] = zext was_sext i5 [[TMP1]] to i8 ; CHECK-NEXT: ret i8 [[M]] ; %e = sext i5 %x to i8 @@ -584,8 +584,8 @@ ; CHECK-NEXT: call void @use(i8 [[NOTX]]) ; CHECK-NEXT: [[NOTY:%.*]] = xor i8 [[Y:%.*]], -1 ; CHECK-NEXT: call void @use(i8 [[NOTY]]) -; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smin.i8(i8 [[X]], i8 [[Y]]) -; CHECK-NEXT: ret i8 [[TMP1]] +; CHECK-NEXT: [[NOTM:%.*]] = call i8 @llvm.smin.i8(i8 [[X]], i8 [[Y]]) +; CHECK-NEXT: ret i8 [[NOTM]] ; %notx = xor i8 %x, -1 call void @use(i8 %notx) @@ -622,8 +622,8 @@ ; CHECK-NEXT: [[NOTX:%.*]] = xor i8 [[X:%.*]], -1 ; CHECK-NEXT: call void @use(i8 [[NOTX]]) ; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[Y:%.*]], -1 -; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.umin.i8(i8 [[X]], i8 [[TMP1]]) -; CHECK-NEXT: ret i8 [[TMP2]] +; CHECK-NEXT: [[NOTM:%.*]] = call i8 @llvm.umin.i8(i8 [[X]], i8 [[TMP1]]) +; CHECK-NEXT: ret i8 [[NOTM]] ; %notx = xor i8 %x, -1 call void @use(i8 %notx) @@ -655,8 +655,8 @@ ; CHECK-LABEL: @not_umin_of_not_constant_op( ; CHECK-NEXT: [[NOTX:%.*]] = xor i8 [[X:%.*]], -1 ; CHECK-NEXT: call void @use(i8 [[NOTX]]) -; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umax.i8(i8 [[X]], i8 -43) -; CHECK-NEXT: ret i8 [[TMP1]] +; CHECK-NEXT: [[NOTM:%.*]] = call i8 @llvm.umax.i8(i8 [[X]], i8 -43) +; CHECK-NEXT: ret i8 [[NOTM]] ; %notx = xor i8 %x, -1 call void @use(i8 %notx) @@ -668,8 +668,8 @@ define i8 @smax_negation(i8 %x, i8 %y) { ; CHECK-LABEL: @smax_negation( ; CHECK-NEXT: [[S1:%.*]] = sub i8 [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[S1]], i1 false) -; CHECK-NEXT: ret i8 [[TMP1]] +; CHECK-NEXT: [[R:%.*]] = call i8 @llvm.abs.i8(i8 [[S1]], i1 false) +; CHECK-NEXT: ret i8 [[R]] ; %s1 = sub i8 %x, %y %s2 = sub i8 %y, %x @@ -680,8 +680,8 @@ define i8 @smax_negation_nsw(i8 %x, i8 %y) { ; CHECK-LABEL: @smax_negation_nsw( ; CHECK-NEXT: [[S1:%.*]] = sub nsw i8 [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[S1]], i1 true) -; CHECK-NEXT: ret i8 [[TMP1]] +; CHECK-NEXT: [[R:%.*]] = call i8 @llvm.abs.i8(i8 [[S1]], i1 true) +; CHECK-NEXT: ret i8 [[R]] ; %s1 = sub nsw i8 %x, %y %s2 = sub nsw i8 %y, %x @@ -692,8 +692,8 @@ define i8 @smax_negation_not_nsw(i8 %x, i8 %y) { ; CHECK-LABEL: @smax_negation_not_nsw( ; CHECK-NEXT: [[S1:%.*]] = sub nsw i8 [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[S1]], i1 false) -; CHECK-NEXT: ret i8 [[TMP1]] +; CHECK-NEXT: [[R:%.*]] = call i8 @llvm.abs.i8(i8 [[S1]], i1 false) +; CHECK-NEXT: ret i8 [[R]] ; %s1 = sub nsw i8 %x, %y %s2 = sub nuw i8 %y, %x @@ -703,8 +703,8 @@ define <3 x i8> @smax_negation_vec(<3 x i8> %x) { ; CHECK-LABEL: @smax_negation_vec( -; CHECK-NEXT: [[TMP1:%.*]] = call <3 x i8> @llvm.abs.v3i8(<3 x i8> [[X:%.*]], i1 false) -; CHECK-NEXT: ret <3 x i8> [[TMP1]] +; CHECK-NEXT: [[R:%.*]] = call <3 x i8> @llvm.abs.v3i8(<3 x i8> [[X:%.*]], i1 false) +; CHECK-NEXT: ret <3 x i8> [[R]] ; %s = sub <3 x i8> , %x %r = call <3 x i8> @llvm.smax.v3i8(<3 x i8> %x, <3 x i8> %s) @@ -739,8 +739,8 @@ define i8 @umin_negation(i8 %x) { ; CHECK-LABEL: @umin_negation( -; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 true) -; CHECK-NEXT: ret i8 [[TMP1]] +; CHECK-NEXT: [[R:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 true) +; CHECK-NEXT: ret i8 [[R]] ; %s = sub nsw i8 0, %x %r = call i8 @llvm.umin.i8(i8 %s, i8 %x) @@ -751,8 +751,8 @@ ; CHECK-LABEL: @smax_negation_uses( ; CHECK-NEXT: [[S2:%.*]] = sub i8 [[Y:%.*]], [[X:%.*]] ; CHECK-NEXT: call void @use(i8 [[S2]]) -; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[S2]], i1 false) -; CHECK-NEXT: ret i8 [[TMP1]] +; CHECK-NEXT: [[R:%.*]] = call i8 @llvm.abs.i8(i8 [[S2]], i1 false) +; CHECK-NEXT: ret i8 [[R]] ; %s1 = sub i8 %x, %y %s2 = sub i8 %y, %x @@ -1263,8 +1263,8 @@ ; CHECK-NEXT: call void @use(i8 [[NY]]) ; CHECK-NEXT: call void @use(i8 [[NZ]]) ; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[X]], i8 [[Y]]) -; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.smax.i8(i8 [[TMP1]], i8 [[Z]]) -; CHECK-NEXT: ret i8 [[TMP2]] +; CHECK-NEXT: [[NOT:%.*]] = call i8 @llvm.smax.i8(i8 [[TMP1]], i8 [[Z]]) +; CHECK-NEXT: ret i8 [[NOT]] ; %nx = xor i8 %x, -1 %ny = xor i8 %y, -1 @@ -1289,8 +1289,8 @@ ; CHECK-NEXT: [[M1:%.*]] = call i8 @llvm.umax.i8(i8 [[NX]], i8 [[NY]]) ; CHECK-NEXT: call void @use(i8 [[M1]]) ; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[M1]], -1 -; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.smax.i8(i8 [[Z]], i8 [[TMP1]]) -; CHECK-NEXT: ret i8 [[TMP2]] +; CHECK-NEXT: [[NOT:%.*]] = call i8 @llvm.smax.i8(i8 [[Z]], i8 [[TMP1]]) +; CHECK-NEXT: ret i8 [[NOT]] ; %nx = xor i8 %x, -1 %ny = xor i8 %y, -1 @@ -1373,8 +1373,8 @@ ; CHECK-NEXT: call void @use(i8 [[NW]]) ; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[X]], i8 [[Y]]) ; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.smin.i8(i8 [[W]], i8 [[Z]]) -; CHECK-NEXT: [[TMP3:%.*]] = call i8 @llvm.smax.i8(i8 [[TMP1]], i8 [[TMP2]]) -; CHECK-NEXT: ret i8 [[TMP3]] +; CHECK-NEXT: [[NOT:%.*]] = call i8 @llvm.smax.i8(i8 [[TMP1]], i8 [[TMP2]]) +; CHECK-NEXT: ret i8 [[NOT]] ; %nx = xor i8 %x, -1 %ny = xor i8 %y, -1 diff --git a/llvm/test/Transforms/InstCombine/mul-inseltpoison.ll b/llvm/test/Transforms/InstCombine/mul-inseltpoison.ll --- a/llvm/test/Transforms/InstCombine/mul-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/mul-inseltpoison.ll @@ -191,7 +191,7 @@ define <3 x i32> @mul_bools_sext(<3 x i1> %x, <3 x i1> %y) { ; CHECK-LABEL: @mul_bools_sext( ; CHECK-NEXT: [[MULBOOL:%.*]] = and <3 x i1> [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = zext <3 x i1> [[MULBOOL]] to <3 x i32> +; CHECK-NEXT: [[R:%.*]] = zext was_sext <3 x i1> [[MULBOOL]] to <3 x i32> ; CHECK-NEXT: ret <3 x i32> [[R]] ; %sx = sext <3 x i1> %x to <3 x i32> @@ -205,7 +205,7 @@ ; CHECK-NEXT: [[SY:%.*]] = sext i1 [[Y:%.*]] to i32 ; CHECK-NEXT: call void @use32(i32 [[SY]]) ; CHECK-NEXT: [[MULBOOL:%.*]] = and i1 [[X:%.*]], [[Y]] -; CHECK-NEXT: [[R:%.*]] = zext i1 [[MULBOOL]] to i32 +; CHECK-NEXT: [[R:%.*]] = zext was_sext i1 [[MULBOOL]] to i32 ; CHECK-NEXT: ret i32 [[R]] ; %sx = sext i1 %x to i32 @@ -220,7 +220,7 @@ ; CHECK-NEXT: [[SY:%.*]] = sext i1 [[Y:%.*]] to i32 ; CHECK-NEXT: call void @use32(i32 [[SY]]) ; CHECK-NEXT: [[MULBOOL:%.*]] = and i1 [[Y]], [[X:%.*]] -; CHECK-NEXT: [[R:%.*]] = zext i1 [[MULBOOL]] to i32 +; CHECK-NEXT: [[R:%.*]] = zext was_sext i1 [[MULBOOL]] to i32 ; CHECK-NEXT: ret i32 [[R]] ; %sx = sext i1 %x to i32 @@ -699,8 +699,8 @@ define i32 @negate_if_true(i32 %x, i1 %cond) { ; CHECK-LABEL: @negate_if_true( ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[X:%.*]] -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[COND:%.*]], i32 [[TMP1]], i32 [[X]] -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP1]], i32 [[X]] +; CHECK-NEXT: ret i32 [[R]] ; %sel = select i1 %cond, i32 -1, i32 1 %r = mul i32 %sel, %x @@ -710,8 +710,8 @@ define i32 @negate_if_false(i32 %x, i1 %cond) { ; CHECK-LABEL: @negate_if_false( ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[X:%.*]] -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[COND:%.*]], i32 [[X]], i32 [[TMP1]] -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[R:%.*]] = select i1 [[COND:%.*]], i32 [[X]], i32 [[TMP1]] +; CHECK-NEXT: ret i32 [[R]] ; %sel = select i1 %cond, i32 1, i32 -1 %r = mul i32 %sel, %x @@ -721,8 +721,8 @@ define i32 @negate_if_true_nsw(i32 %x, i1 %cond) { ; CHECK-LABEL: @negate_if_true_nsw( ; CHECK-NEXT: [[TMP1:%.*]] = sub nsw i32 0, [[X:%.*]] -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[COND:%.*]], i32 [[TMP1]], i32 [[X]] -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP1]], i32 [[X]] +; CHECK-NEXT: ret i32 [[R]] ; %sel = select i1 %cond, i32 -1, i32 1 %r = mul nsw i32 %sel, %x @@ -732,8 +732,8 @@ define i32 @negate_if_true_nuw(i32 %x, i1 %cond) { ; CHECK-LABEL: @negate_if_true_nuw( ; CHECK-NEXT: [[TMP1:%.*]] = sub nsw i32 0, [[X:%.*]] -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[COND:%.*]], i32 [[TMP1]], i32 [[X]] -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP1]], i32 [[X]] +; CHECK-NEXT: ret i32 [[R]] ; %sel = select i1 %cond, i32 -1, i32 1 %r = mul nuw i32 %sel, %x @@ -743,8 +743,8 @@ define i32 @negate_if_false_nsw(i32 %x, i1 %cond) { ; CHECK-LABEL: @negate_if_false_nsw( ; CHECK-NEXT: [[TMP1:%.*]] = sub nsw i32 0, [[X:%.*]] -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[COND:%.*]], i32 [[X]], i32 [[TMP1]] -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[R:%.*]] = select i1 [[COND:%.*]], i32 [[X]], i32 [[TMP1]] +; CHECK-NEXT: ret i32 [[R]] ; %sel = select i1 %cond, i32 1, i32 -1 %r = mul nsw i32 %sel, %x @@ -754,8 +754,8 @@ define i32 @negate_if_false_nuw(i32 %x, i1 %cond) { ; CHECK-LABEL: @negate_if_false_nuw( ; CHECK-NEXT: [[TMP1:%.*]] = sub nsw i32 0, [[X:%.*]] -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[COND:%.*]], i32 [[X]], i32 [[TMP1]] -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[R:%.*]] = select i1 [[COND:%.*]], i32 [[X]], i32 [[TMP1]] +; CHECK-NEXT: ret i32 [[R]] ; %sel = select i1 %cond, i32 1, i32 -1 %r = mul nuw i32 %sel, %x @@ -766,8 +766,8 @@ ; CHECK-LABEL: @negate_if_true_commute( ; CHECK-NEXT: [[X:%.*]] = sdiv <2 x i8> , [[PX:%.*]] ; CHECK-NEXT: [[TMP1:%.*]] = sub nsw <2 x i8> zeroinitializer, [[X]] -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[COND:%.*]], <2 x i8> [[TMP1]], <2 x i8> [[X]] -; CHECK-NEXT: ret <2 x i8> [[TMP2]] +; CHECK-NEXT: [[R:%.*]] = select i1 [[COND:%.*]], <2 x i8> [[TMP1]], <2 x i8> [[X]] +; CHECK-NEXT: ret <2 x i8> [[R]] ; %x = sdiv <2 x i8> , %px ; thwart complexity-based canonicalization %sel = select i1 %cond, <2 x i8> , <2 x i8> @@ -779,8 +779,8 @@ ; CHECK-LABEL: @negate_if_false_commute( ; CHECK-NEXT: [[X:%.*]] = sdiv <2 x i8> , [[PX:%.*]] ; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i8> zeroinitializer, [[X]] -; CHECK-NEXT: [[TMP2:%.*]] = select <2 x i1> [[COND:%.*]], <2 x i8> [[X]], <2 x i8> [[TMP1]] -; CHECK-NEXT: ret <2 x i8> [[TMP2]] +; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[COND:%.*]], <2 x i8> [[X]], <2 x i8> [[TMP1]] +; CHECK-NEXT: ret <2 x i8> [[R]] ; %x = sdiv <2 x i8> , %px ; thwart complexity-based canonicalization %sel = select <2 x i1> %cond, <2 x i8> , <2 x i8> diff --git a/llvm/test/Transforms/InstCombine/mul.ll b/llvm/test/Transforms/InstCombine/mul.ll --- a/llvm/test/Transforms/InstCombine/mul.ll +++ b/llvm/test/Transforms/InstCombine/mul.ll @@ -444,7 +444,7 @@ define <3 x i32> @mul_bools_sext(<3 x i1> %x, <3 x i1> %y) { ; CHECK-LABEL: @mul_bools_sext( ; CHECK-NEXT: [[MULBOOL:%.*]] = and <3 x i1> [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = zext <3 x i1> [[MULBOOL]] to <3 x i32> +; CHECK-NEXT: [[R:%.*]] = zext was_sext <3 x i1> [[MULBOOL]] to <3 x i32> ; CHECK-NEXT: ret <3 x i32> [[R]] ; %sx = sext <3 x i1> %x to <3 x i32> @@ -458,7 +458,7 @@ ; CHECK-NEXT: [[SY:%.*]] = sext i1 [[Y:%.*]] to i32 ; CHECK-NEXT: call void @use32(i32 [[SY]]) ; CHECK-NEXT: [[MULBOOL:%.*]] = and i1 [[X:%.*]], [[Y]] -; CHECK-NEXT: [[R:%.*]] = zext i1 [[MULBOOL]] to i32 +; CHECK-NEXT: [[R:%.*]] = zext was_sext i1 [[MULBOOL]] to i32 ; CHECK-NEXT: ret i32 [[R]] ; %sx = sext i1 %x to i32 @@ -473,7 +473,7 @@ ; CHECK-NEXT: [[SY:%.*]] = sext i1 [[Y:%.*]] to i32 ; CHECK-NEXT: call void @use32(i32 [[SY]]) ; CHECK-NEXT: [[MULBOOL:%.*]] = and i1 [[Y]], [[X:%.*]] -; CHECK-NEXT: [[R:%.*]] = zext i1 [[MULBOOL]] to i32 +; CHECK-NEXT: [[R:%.*]] = zext was_sext i1 [[MULBOOL]] to i32 ; CHECK-NEXT: ret i32 [[R]] ; %sx = sext i1 %x to i32 @@ -503,7 +503,7 @@ define i32 @mul_bools_sext_one_use_per_op(i1 %x, i1 %y) { ; CHECK-LABEL: @mul_bools_sext_one_use_per_op( ; CHECK-NEXT: [[MULBOOL:%.*]] = and i1 [[X:%.*]], [[Y:%.*]] -; CHECK-NEXT: [[R:%.*]] = zext i1 [[MULBOOL]] to i32 +; CHECK-NEXT: [[R:%.*]] = zext was_sext i1 [[MULBOOL]] to i32 ; CHECK-NEXT: ret i32 [[R]] ; %sx = sext i1 %x to i32 @@ -514,7 +514,7 @@ define i32 @mul_bool_sext_one_user(i1 %x) { ; CHECK-LABEL: @mul_bool_sext_one_user( -; CHECK-NEXT: [[R:%.*]] = zext i1 [[X:%.*]] to i32 +; CHECK-NEXT: [[R:%.*]] = zext was_sext i1 [[X:%.*]] to i32 ; CHECK-NEXT: ret i32 [[R]] ; %sx = sext i1 %x to i32 @@ -548,7 +548,7 @@ ; CHECK-LABEL: @mul_bool_sext_one_extra_user( ; CHECK-NEXT: [[SX:%.*]] = sext i1 [[X:%.*]] to i32 ; CHECK-NEXT: call void @use32(i32 [[SX]]) -; CHECK-NEXT: [[R:%.*]] = zext i1 [[X]] to i32 +; CHECK-NEXT: [[R:%.*]] = zext was_sext i1 [[X]] to i32 ; CHECK-NEXT: ret i32 [[R]] ; %sx = sext i1 %x to i32 @@ -1260,8 +1260,8 @@ define i32 @negate_if_true(i32 %x, i1 %cond) { ; CHECK-LABEL: @negate_if_true( ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[X:%.*]] -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[COND:%.*]], i32 [[TMP1]], i32 [[X]] -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[R:%.*]] = select i1 [[COND:%.*]], i32 [[TMP1]], i32 [[X]] +; CHECK-NEXT: ret i32 [[R]] ; %sel = select i1 %cond, i32 -1, i32 1 %r = mul i32 %sel, %x @@ -1271,8 +1271,8 @@ define i32 @negate_if_false(i32 %x, i1 %cond) { ; CHECK-LABEL: @negate_if_false( ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[X:%.*]] -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[COND:%.*]], i32 [[X]], i32 [[TMP1]] -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[R:%.*]] = select i1 [[COND:%.*]], i32 [[X]], i32 [[TMP1]] +; CHECK-NEXT: ret i32 [[R]] ; %sel = select i1 %cond, i32 1, i32 -1 %r = mul i32 %sel, %x @@ -1283,8 +1283,8 @@ ; CHECK-LABEL: @negate_if_true_commute( ; CHECK-NEXT: [[X:%.*]] = sdiv <2 x i8> , [[PX:%.*]] ; CHECK-NEXT: [[TMP1:%.*]] = sub nsw <2 x i8> zeroinitializer, [[X]] -; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[COND:%.*]], <2 x i8> [[TMP1]], <2 x i8> [[X]] -; CHECK-NEXT: ret <2 x i8> [[TMP2]] +; CHECK-NEXT: [[R:%.*]] = select i1 [[COND:%.*]], <2 x i8> [[TMP1]], <2 x i8> [[X]] +; CHECK-NEXT: ret <2 x i8> [[R]] ; %x = sdiv <2 x i8> , %px ; thwart complexity-based canonicalization %sel = select i1 %cond, <2 x i8> , <2 x i8> @@ -1296,8 +1296,8 @@ ; CHECK-LABEL: @negate_if_false_commute( ; CHECK-NEXT: [[X:%.*]] = sdiv <2 x i8> , [[PX:%.*]] ; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i8> zeroinitializer, [[X]] -; CHECK-NEXT: [[TMP2:%.*]] = select <2 x i1> [[COND:%.*]], <2 x i8> [[X]], <2 x i8> [[TMP1]] -; CHECK-NEXT: ret <2 x i8> [[TMP2]] +; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[COND:%.*]], <2 x i8> [[X]], <2 x i8> [[TMP1]] +; CHECK-NEXT: ret <2 x i8> [[R]] ; %x = sdiv <2 x i8> , %px ; thwart complexity-based canonicalization %sel = select <2 x i1> %cond, <2 x i8> , <2 x i8> diff --git a/llvm/test/Transforms/InstCombine/narrow-math.ll b/llvm/test/Transforms/InstCombine/narrow-math.ll --- a/llvm/test/Transforms/InstCombine/narrow-math.ll +++ b/llvm/test/Transforms/InstCombine/narrow-math.ll @@ -122,8 +122,8 @@ define i64 @test1(i32 %V) { ; CHECK-LABEL: @test1( -; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), [[RNG0:!range !.*]] -; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), [[RNG0]] +; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), !range [[RNG0:![0-9]+]] +; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), !range [[RNG0]] ; CHECK-NEXT: [[NARROW:%.*]] = add nuw nsw i32 [[CALL1]], [[CALL2]] ; CHECK-NEXT: [[ADD:%.*]] = zext i32 [[NARROW]] to i64 ; CHECK-NEXT: ret i64 [[ADD]] @@ -138,10 +138,10 @@ define i64 @test2(i32 %V) { ; CHECK-LABEL: @test2( -; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), [[RNG0]] -; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), [[RNG0]] +; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), !range [[RNG0]] +; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), !range [[RNG0]] ; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[CALL1]], [[CALL2]] -; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[ADD]] to i64 +; CHECK-NEXT: [[ZEXT:%.*]] = zext was_sext i32 [[ADD]] to i64 ; CHECK-NEXT: ret i64 [[ZEXT]] ; %call1 = call i32 @callee(), !range !0 @@ -153,8 +153,8 @@ define i64 @test3(i32 %V) { ; CHECK-LABEL: @test3( -; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), [[RNG0]] -; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), [[RNG0]] +; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), !range [[RNG0]] +; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), !range [[RNG0]] ; CHECK-NEXT: [[NARROW:%.*]] = mul nuw nsw i32 [[CALL1]], [[CALL2]] ; CHECK-NEXT: [[ADD:%.*]] = zext i32 [[NARROW]] to i64 ; CHECK-NEXT: ret i64 [[ADD]] @@ -169,10 +169,10 @@ define i64 @test4(i32 %V) { ; CHECK-LABEL: @test4( -; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), [[RNG0]] -; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), [[RNG0]] +; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), !range [[RNG0]] +; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), !range [[RNG0]] ; CHECK-NEXT: [[ADD:%.*]] = mul nuw nsw i32 [[CALL1]], [[CALL2]] -; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 [[ADD]] to i64 +; CHECK-NEXT: [[ZEXT:%.*]] = zext was_sext i32 [[ADD]] to i64 ; CHECK-NEXT: ret i64 [[ZEXT]] ; %call1 = call i32 @callee(), !range !0 @@ -461,8 +461,8 @@ define i64 @test11(i32 %V) { ; CHECK-LABEL: @test11( -; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), [[RNG1:!range !.*]] -; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), [[RNG1]] +; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), !range [[RNG1:![0-9]+]] +; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), !range [[RNG1]] ; CHECK-NEXT: [[NARROW:%.*]] = add nsw i32 [[CALL1]], [[CALL2]] ; CHECK-NEXT: [[ADD:%.*]] = sext i32 [[NARROW]] to i64 ; CHECK-NEXT: ret i64 [[ADD]] @@ -477,10 +477,10 @@ define i64 @test12(i32 %V) { ; CHECK-LABEL: @test12( -; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), [[RNG1]] -; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), [[RNG1]] +; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), !range [[RNG1]] +; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), !range [[RNG1]] ; CHECK-NEXT: [[NARROW:%.*]] = mul nsw i32 [[CALL1]], [[CALL2]] -; CHECK-NEXT: [[ADD:%.*]] = zext i32 [[NARROW]] to i64 +; CHECK-NEXT: [[ADD:%.*]] = zext was_sext i32 [[NARROW]] to i64 ; CHECK-NEXT: ret i64 [[ADD]] ; %call1 = call i32 @callee(), !range !1 @@ -493,8 +493,8 @@ define i64 @test13(i32 %V) { ; CHECK-LABEL: @test13( -; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), [[RNG2:!range !.*]] -; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), [[RNG3:!range !.*]] +; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), !range [[RNG2:![0-9]+]] +; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), !range [[RNG3:![0-9]+]] ; CHECK-NEXT: [[NARROW:%.*]] = sub nsw i32 [[CALL1]], [[CALL2]] ; CHECK-NEXT: [[SUB:%.*]] = sext i32 [[NARROW]] to i64 ; CHECK-NEXT: ret i64 [[SUB]] @@ -509,8 +509,8 @@ define i64 @test14(i32 %V) { ; CHECK-LABEL: @test14( -; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), [[RNG2]] -; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), [[RNG0]] +; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), !range [[RNG2]] +; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), !range [[RNG0]] ; CHECK-NEXT: [[NARROW:%.*]] = sub nuw nsw i32 [[CALL1]], [[CALL2]] ; CHECK-NEXT: [[SUB:%.*]] = zext i32 [[NARROW]] to i64 ; CHECK-NEXT: ret i64 [[SUB]] @@ -579,8 +579,8 @@ ; won't wrap. define i64 @test17(i32 %V) { ; CHECK-LABEL: @test17( -; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), [[RNG0]] -; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), [[RNG0]] +; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), !range [[RNG0]] +; CHECK-NEXT: [[CALL2:%.*]] = call i32 @callee(), !range [[RNG0]] ; CHECK-NEXT: [[SEXT1:%.*]] = zext i32 [[CALL1]] to i64 ; CHECK-NEXT: [[SEXT2:%.*]] = zext i32 [[CALL2]] to i64 ; CHECK-NEXT: [[SUB:%.*]] = sub nsw i64 [[SEXT1]], [[SEXT2]] @@ -598,7 +598,7 @@ ; cause overflow. define i64 @test18(i32 %V) { ; CHECK-LABEL: @test18( -; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), [[RNG1]] +; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), !range [[RNG1]] ; CHECK-NEXT: [[SEXT1:%.*]] = sext i32 [[CALL1]] to i64 ; CHECK-NEXT: [[SUB:%.*]] = sub nsw i64 2147481648, [[SEXT1]] ; CHECK-NEXT: ret i64 [[SUB]] @@ -613,8 +613,8 @@ ; cause overflow. define i64 @test19(i32 %V) { ; CHECK-LABEL: @test19( -; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), [[RNG0]] -; CHECK-NEXT: [[SEXT1:%.*]] = zext i32 [[CALL1]] to i64 +; CHECK-NEXT: [[CALL1:%.*]] = call i32 @callee(), !range [[RNG0]] +; CHECK-NEXT: [[SEXT1:%.*]] = zext was_sext i32 [[CALL1]] to i64 ; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i64 -2147481648, [[SEXT1]] ; CHECK-NEXT: ret i64 [[SUB]] ; diff --git a/llvm/test/Transforms/InstCombine/select_meta.ll b/llvm/test/Transforms/InstCombine/select_meta.ll --- a/llvm/test/Transforms/InstCombine/select_meta.ll +++ b/llvm/test/Transforms/InstCombine/select_meta.ll @@ -65,8 +65,8 @@ define i64 @test43(i32 %a) nounwind { ; CHECK-LABEL: @test43( ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[A:%.*]], i32 0) -; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 -; CHECK-NEXT: ret i64 [[TMP2]] +; CHECK-NEXT: [[MAX:%.*]] = zext was_sext i32 [[TMP1]] to i64 +; CHECK-NEXT: ret i64 [[MAX]] ; %a_ext = sext i32 %a to i64 %is_a_nonnegative = icmp sgt i32 %a, -1 @@ -131,8 +131,8 @@ ; SMAX(SMAX(x, y), x) -> SMAX(x, y) define i32 @test30(i32 %x, i32 %y) { ; CHECK-LABEL: @test30( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 [[Y:%.*]]) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 [[Y:%.*]]) +; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp sgt i32 %x, %y %cond = select i1 %cmp, i32 %x, i32 %y, !prof !1 @@ -144,8 +144,8 @@ ; SMAX(SMAX(75, X), 36) -> SMAX(X, 75) define i32 @test70(i32 %x) { ; CHECK-LABEL: @test70( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 75) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 75) +; CHECK-NEXT: ret i32 [[COND]] ; %cmp = icmp slt i32 %x, 75 %cond = select i1 %cmp, i32 75, i32 %x, !prof !1 @@ -158,8 +158,8 @@ ; SMIN(SMIN(X, 92), 11) -> SMIN(X, 11) define i32 @test72(i32 %x) { ; CHECK-LABEL: @test72( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 11) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[RETVAL:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 11) +; CHECK-NEXT: ret i32 [[RETVAL]] ; %cmp = icmp sgt i32 %x, 92 %cond = select i1 %cmp, i32 92, i32 %x, !prof !1 @@ -172,9 +172,9 @@ ; SMAX(SMAX(X, 36), 75) -> SMAX(X, 75) define i32 @test74(i32 %x) { ; CHECK-LABEL: @test74( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 36) -; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 75) -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 36) +; CHECK-NEXT: [[RETVAL:%.*]] = call i32 @llvm.umax.i32(i32 [[COND]], i32 75) +; CHECK-NEXT: ret i32 [[RETVAL]] ; %cmp = icmp slt i32 %x, 36 %cond = select i1 %cmp, i32 36, i32 %x, !prof !1 @@ -187,8 +187,8 @@ define i32 @smin1(i32 %x) { ; CHECK-LABEL: @smin1( ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 0) -; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], -1 -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[SEL:%.*]] = xor i32 [[TMP1]], -1 +; CHECK-NEXT: ret i32 [[SEL]] ; %not_x = xor i32 %x, -1 %cmp = icmp sgt i32 %x, 0 @@ -200,8 +200,8 @@ define i32 @smin2(i32 %x) { ; CHECK-LABEL: @smin2( ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 0) -; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], -1 -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[SEL:%.*]] = xor i32 [[TMP1]], -1 +; CHECK-NEXT: ret i32 [[SEL]] ; %not_x = xor i32 %x, -1 %cmp = icmp slt i32 %x, 0 @@ -213,8 +213,8 @@ define i32 @smax1(i32 %x) { ; CHECK-LABEL: @smax1( ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 0) -; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], -1 -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[SEL:%.*]] = xor i32 [[TMP1]], -1 +; CHECK-NEXT: ret i32 [[SEL]] ; %not_x = xor i32 %x, -1 %cmp = icmp slt i32 %x, 0 @@ -226,8 +226,8 @@ define i32 @smax2(i32 %x) { ; CHECK-LABEL: @smax2( ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 0) -; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], -1 -; CHECK-NEXT: ret i32 [[TMP2]] +; CHECK-NEXT: [[SEL:%.*]] = xor i32 [[TMP1]], -1 +; CHECK-NEXT: ret i32 [[SEL]] ; %not_x = xor i32 %x, -1 %cmp = icmp sgt i32 %x, 0 @@ -238,8 +238,8 @@ ; The compare should change, but the metadata remains the same because the select operands are not swapped. define i32 @umin1(i32 %x) { ; CHECK-LABEL: @umin1( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 -2147483648) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[SEL:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 -2147483648) +; CHECK-NEXT: ret i32 [[SEL]] ; %cmp = icmp sgt i32 %x, -1 %sel = select i1 %cmp, i32 %x, i32 -2147483648, !prof !1 @@ -249,8 +249,8 @@ ; The compare should change, and the metadata is swapped because the select operands are swapped. define i32 @umin2(i32 %x) { ; CHECK-LABEL: @umin2( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 2147483647) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[SEL:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 2147483647) +; CHECK-NEXT: ret i32 [[SEL]] ; %cmp = icmp slt i32 %x, 0 %sel = select i1 %cmp, i32 2147483647, i32 %x, !prof !1 @@ -260,8 +260,8 @@ ; The compare should change, but the metadata remains the same because the select operands are not swapped. define i32 @umax1(i32 %x) { ; CHECK-LABEL: @umax1( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 2147483647) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[SEL:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 2147483647) +; CHECK-NEXT: ret i32 [[SEL]] ; %cmp = icmp slt i32 %x, 0 %sel = select i1 %cmp, i32 %x, i32 2147483647, !prof !1 @@ -271,8 +271,8 @@ ; The compare should change, and the metadata is swapped because the select operands are swapped. define i32 @umax2(i32 %x) { ; CHECK-LABEL: @umax2( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 -2147483648) -; CHECK-NEXT: ret i32 [[TMP1]] +; CHECK-NEXT: [[SEL:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 -2147483648) +; CHECK-NEXT: ret i32 [[SEL]] ; %cmp = icmp sgt i32 %x, -1 %sel = select i1 %cmp, i32 -2147483648, i32 %x, !prof !1 diff --git a/llvm/test/Transforms/InstCombine/sext.ll b/llvm/test/Transforms/InstCombine/sext.ll --- a/llvm/test/Transforms/InstCombine/sext.ll +++ b/llvm/test/Transforms/InstCombine/sext.ll @@ -12,7 +12,7 @@ define i64 @test1(i32 %x) { ; CHECK-LABEL: @test1( ; CHECK-NEXT: [[T:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0:![0-9]+]] -; CHECK-NEXT: [[S:%.*]] = zext i32 [[T]] to i64 +; CHECK-NEXT: [[S:%.*]] = zext was_sext i32 [[T]] to i64 ; CHECK-NEXT: ret i64 [[S]] ; %t = call i32 @llvm.ctpop.i32(i32 %x) @@ -23,7 +23,7 @@ define i64 @test2(i32 %x) { ; CHECK-LABEL: @test2( ; CHECK-NEXT: [[T:%.*]] = call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 true), !range [[RNG0]] -; CHECK-NEXT: [[S:%.*]] = zext i32 [[T]] to i64 +; CHECK-NEXT: [[S:%.*]] = zext was_sext i32 [[T]] to i64 ; CHECK-NEXT: ret i64 [[S]] ; %t = call i32 @llvm.ctlz.i32(i32 %x, i1 true) @@ -34,7 +34,7 @@ define i64 @test3(i32 %x) { ; CHECK-LABEL: @test3( ; CHECK-NEXT: [[T:%.*]] = call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true), !range [[RNG0]] -; CHECK-NEXT: [[S:%.*]] = zext i32 [[T]] to i64 +; CHECK-NEXT: [[S:%.*]] = zext was_sext i32 [[T]] to i64 ; CHECK-NEXT: ret i64 [[S]] ; %t = call i32 @llvm.cttz.i32(i32 %x, i1 true) @@ -45,7 +45,7 @@ define i64 @test4(i32 %x) { ; CHECK-LABEL: @test4( ; CHECK-NEXT: [[T:%.*]] = udiv i32 [[X:%.*]], 3 -; CHECK-NEXT: [[S:%.*]] = zext i32 [[T]] to i64 +; CHECK-NEXT: [[S:%.*]] = zext was_sext i32 [[T]] to i64 ; CHECK-NEXT: ret i64 [[S]] ; %t = udiv i32 %x, 3 @@ -56,7 +56,7 @@ define i64 @test5(i32 %x) { ; CHECK-LABEL: @test5( ; CHECK-NEXT: [[T:%.*]] = urem i32 [[X:%.*]], 30000 -; CHECK-NEXT: [[S:%.*]] = zext i32 [[T]] to i64 +; CHECK-NEXT: [[S:%.*]] = zext was_sext i32 [[T]] to i64 ; CHECK-NEXT: ret i64 [[S]] ; %t = urem i32 %x, 30000 @@ -68,7 +68,7 @@ ; CHECK-LABEL: @test6( ; CHECK-NEXT: [[U:%.*]] = lshr i32 [[X:%.*]], 3 ; CHECK-NEXT: [[T:%.*]] = mul nuw nsw i32 [[U]], 3 -; CHECK-NEXT: [[S:%.*]] = zext i32 [[T]] to i64 +; CHECK-NEXT: [[S:%.*]] = zext was_sext i32 [[T]] to i64 ; CHECK-NEXT: ret i64 [[S]] ; %u = lshr i32 %x, 3 @@ -81,7 +81,7 @@ ; CHECK-LABEL: @test7( ; CHECK-NEXT: [[T:%.*]] = and i32 [[X:%.*]], 511 ; CHECK-NEXT: [[U:%.*]] = sub nuw nsw i32 20000, [[T]] -; CHECK-NEXT: [[S:%.*]] = zext i32 [[U]] to i64 +; CHECK-NEXT: [[S:%.*]] = zext was_sext i32 [[U]] to i64 ; CHECK-NEXT: ret i64 [[S]] ; %t = and i32 %x, 511 @@ -295,8 +295,8 @@ define i32 @test18(i16 %x) { ; CHECK-LABEL: @test18( -; CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.smax.i16(i16 [[X:%.*]], i16 0) -; CHECK-NEXT: [[EXT:%.*]] = zext i16 [[TMP1]] to i32 +; CHECK-NEXT: [[SEL:%.*]] = call i16 @llvm.smax.i16(i16 [[X:%.*]], i16 0) +; CHECK-NEXT: [[EXT:%.*]] = zext was_sext i16 [[SEL]] to i32 ; CHECK-NEXT: ret i32 [[EXT]] ; %cmp = icmp slt i16 %x, 0 diff --git a/llvm/test/Transforms/InstCombine/shift-by-signext.ll b/llvm/test/Transforms/InstCombine/shift-by-signext.ll --- a/llvm/test/Transforms/InstCombine/shift-by-signext.ll +++ b/llvm/test/Transforms/InstCombine/shift-by-signext.ll @@ -6,7 +6,7 @@ define i32 @t0_shl(i32 %x, i8 %shamt) { ; CHECK-LABEL: @t0_shl( -; CHECK-NEXT: [[SHAMT_WIDE1:%.*]] = zext i8 [[SHAMT:%.*]] to i32 +; CHECK-NEXT: [[SHAMT_WIDE1:%.*]] = zext was_sext i8 [[SHAMT:%.*]] to i32 ; CHECK-NEXT: [[R:%.*]] = shl i32 [[X:%.*]], [[SHAMT_WIDE1]] ; CHECK-NEXT: ret i32 [[R]] ; @@ -16,7 +16,7 @@ } define i32 @t1_lshr(i32 %x, i8 %shamt) { ; CHECK-LABEL: @t1_lshr( -; CHECK-NEXT: [[SHAMT_WIDE1:%.*]] = zext i8 [[SHAMT:%.*]] to i32 +; CHECK-NEXT: [[SHAMT_WIDE1:%.*]] = zext was_sext i8 [[SHAMT:%.*]] to i32 ; CHECK-NEXT: [[R:%.*]] = lshr i32 [[X:%.*]], [[SHAMT_WIDE1]] ; CHECK-NEXT: ret i32 [[R]] ; @@ -26,7 +26,7 @@ } define i32 @t2_ashr(i32 %x, i8 %shamt) { ; CHECK-LABEL: @t2_ashr( -; CHECK-NEXT: [[SHAMT_WIDE1:%.*]] = zext i8 [[SHAMT:%.*]] to i32 +; CHECK-NEXT: [[SHAMT_WIDE1:%.*]] = zext was_sext i8 [[SHAMT:%.*]] to i32 ; CHECK-NEXT: [[R:%.*]] = ashr i32 [[X:%.*]], [[SHAMT_WIDE1]] ; CHECK-NEXT: ret i32 [[R]] ; @@ -37,7 +37,7 @@ define <2 x i32> @t3_vec_shl(<2 x i32> %x, <2 x i8> %shamt) { ; CHECK-LABEL: @t3_vec_shl( -; CHECK-NEXT: [[SHAMT_WIDE1:%.*]] = zext <2 x i8> [[SHAMT:%.*]] to <2 x i32> +; CHECK-NEXT: [[SHAMT_WIDE1:%.*]] = zext was_sext <2 x i8> [[SHAMT:%.*]] to <2 x i32> ; CHECK-NEXT: [[R:%.*]] = shl <2 x i32> [[X:%.*]], [[SHAMT_WIDE1]] ; CHECK-NEXT: ret <2 x i32> [[R]] ; @@ -47,7 +47,7 @@ } define <2 x i32> @t4_vec_lshr(<2 x i32> %x, <2 x i8> %shamt) { ; CHECK-LABEL: @t4_vec_lshr( -; CHECK-NEXT: [[SHAMT_WIDE1:%.*]] = zext <2 x i8> [[SHAMT:%.*]] to <2 x i32> +; CHECK-NEXT: [[SHAMT_WIDE1:%.*]] = zext was_sext <2 x i8> [[SHAMT:%.*]] to <2 x i32> ; CHECK-NEXT: [[R:%.*]] = lshr <2 x i32> [[X:%.*]], [[SHAMT_WIDE1]] ; CHECK-NEXT: ret <2 x i32> [[R]] ; @@ -57,7 +57,7 @@ } define <2 x i32> @t5_vec_ashr(<2 x i32> %x, <2 x i8> %shamt) { ; CHECK-LABEL: @t5_vec_ashr( -; CHECK-NEXT: [[SHAMT_WIDE1:%.*]] = zext <2 x i8> [[SHAMT:%.*]] to <2 x i32> +; CHECK-NEXT: [[SHAMT_WIDE1:%.*]] = zext was_sext <2 x i8> [[SHAMT:%.*]] to <2 x i32> ; CHECK-NEXT: [[R:%.*]] = ashr <2 x i32> [[X:%.*]], [[SHAMT_WIDE1]] ; CHECK-NEXT: ret <2 x i32> [[R]] ; diff --git a/llvm/test/Transforms/InstCombine/udiv-simplify.ll b/llvm/test/Transforms/InstCombine/udiv-simplify.ll --- a/llvm/test/Transforms/InstCombine/udiv-simplify.ll +++ b/llvm/test/Transforms/InstCombine/udiv-simplify.ll @@ -27,7 +27,7 @@ ; CHECK-LABEL: @test1_PR2274( ; CHECK-NEXT: [[Y:%.*]] = lshr i32 [[X:%.*]], 30 ; CHECK-NEXT: [[R:%.*]] = udiv i32 [[Y]], [[G:%.*]] -; CHECK-NEXT: [[Z:%.*]] = zext i32 [[R]] to i64 +; CHECK-NEXT: [[Z:%.*]] = zext was_sext i32 [[R]] to i64 ; CHECK-NEXT: ret i64 [[Z]] ; %y = lshr i32 %x, 30 @@ -39,7 +39,7 @@ ; CHECK-LABEL: @test2_PR2274( ; CHECK-NEXT: [[Y:%.*]] = lshr i32 [[X:%.*]], 31 ; CHECK-NEXT: [[R:%.*]] = udiv i32 [[Y]], [[V:%.*]] -; CHECK-NEXT: [[Z:%.*]] = zext i32 [[R]] to i64 +; CHECK-NEXT: [[Z:%.*]] = zext was_sext i32 [[R]] to i64 ; CHECK-NEXT: ret i64 [[Z]] ; %y = lshr i32 %x, 31 diff --git a/llvm/test/Transforms/InstCombine/wcslen-1.ll b/llvm/test/Transforms/InstCombine/wcslen-1.ll --- a/llvm/test/Transforms/InstCombine/wcslen-1.ll +++ b/llvm/test/Transforms/InstCombine/wcslen-1.ll @@ -96,8 +96,8 @@ define i64 @test_simplify9(i1 %x) { ; CHECK-LABEL: @test_simplify9( -; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[X:%.*]], i64 5, i64 6 -; CHECK-NEXT: ret i64 [[TMP1]] +; CHECK-NEXT: [[L:%.*]] = select i1 [[X:%.*]], i64 5, i64 6 +; CHECK-NEXT: ret i64 [[L]] ; %s = select i1 %x, ptr @hello, ptr @longer %l = call i64 @wcslen(ptr %s) @@ -110,8 +110,8 @@ define i64 @test_simplify10(i32 %x) { ; CHECK-LABEL: @test_simplify10( ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[X:%.*]] to i64 -; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i64 5, [[TMP1]] -; CHECK-NEXT: ret i64 [[TMP2]] +; CHECK-NEXT: [[HELLO_L:%.*]] = sub nsw i64 5, [[TMP1]] +; CHECK-NEXT: ret i64 [[HELLO_L]] ; %hello_p = getelementptr inbounds [6 x i32], ptr @hello, i32 0, i32 %x %hello_l = call i64 @wcslen(ptr %hello_p) @@ -124,8 +124,8 @@ ; CHECK-LABEL: @test_simplify11( ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 7 ; CHECK-NEXT: [[NARROW:%.*]] = sub nuw nsw i32 9, [[AND]] -; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[NARROW]] to i64 -; CHECK-NEXT: ret i64 [[TMP1]] +; CHECK-NEXT: [[HELLO_L:%.*]] = zext i32 [[NARROW]] to i64 +; CHECK-NEXT: ret i64 [[HELLO_L]] ; %and = and i32 %x, 7 %hello_p = getelementptr inbounds [13 x i32], ptr @null_hello_mid, i32 0, i32 %and @@ -175,7 +175,7 @@ define i64 @test_no_simplify3(i32 %x) { ; CHECK-LABEL: @test_no_simplify3( ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 15 -; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[AND]] to i64 +; CHECK-NEXT: [[TMP1:%.*]] = zext was_sext i32 [[AND]] to i64 ; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [13 x i32], ptr @null_hello_mid, i64 0, i64 [[TMP1]] ; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr nonnull [[HELLO_P]]) ; CHECK-NEXT: ret i64 [[HELLO_L]] @@ -189,7 +189,7 @@ define i64 @test_no_simplify3_no_null_opt(i32 %x) #0 { ; CHECK-LABEL: @test_no_simplify3_no_null_opt( ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 15 -; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[AND]] to i64 +; CHECK-NEXT: [[TMP1:%.*]] = zext was_sext i32 [[AND]] to i64 ; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [13 x i32], ptr @null_hello_mid, i64 0, i64 [[TMP1]] ; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr [[HELLO_P]]) ; CHECK-NEXT: ret i64 [[HELLO_L]] @@ -231,8 +231,8 @@ ; with an offset that isn't a multiple of the element size). define i64 @no_fold_wcslen_1() { ; CHECK-LABEL: @no_fold_wcslen_1( -; CHECK-NEXT: %len = tail call i64 @wcslen(ptr nonnull getelementptr inbounds ([15 x i8], ptr @ws, i64 0, i64 3)) -; CHECK-NEXT: ret i64 %len +; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull getelementptr inbounds ([15 x i8], ptr @ws, i64 0, i64 3)) +; CHECK-NEXT: ret i64 [[LEN]] ; %p = getelementptr [15 x i8], ptr @ws, i64 0, i64 3 %len = tail call i64 @wcslen(ptr %p) @@ -246,8 +246,8 @@ ; with an offset that isn't a multiple of the element size). define i64 @no_fold_wcslen_2() { ; CHECK-LABEL: @no_fold_wcslen_2( -; CHECK-NEXT: %len = tail call i64 @wcslen(ptr nonnull getelementptr inbounds ([10 x i8], ptr @s8, i64 0, i64 3)) -; CHECK-NEXT: ret i64 %len +; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull getelementptr inbounds ([10 x i8], ptr @s8, i64 0, i64 3)) +; CHECK-NEXT: ret i64 [[LEN]] ; %p = getelementptr [10 x i8], ptr @s8, i64 0, i64 3 %len = tail call i64 @wcslen(ptr %p) diff --git a/llvm/test/Transforms/InstCombine/wcslen-3.ll b/llvm/test/Transforms/InstCombine/wcslen-3.ll --- a/llvm/test/Transforms/InstCombine/wcslen-3.ll +++ b/llvm/test/Transforms/InstCombine/wcslen-3.ll @@ -97,8 +97,8 @@ define i64 @test_simplify9(i1 %x) { ; CHECK-LABEL: @test_simplify9( -; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[X:%.*]], i64 5, i64 6 -; CHECK-NEXT: ret i64 [[TMP1]] +; CHECK-NEXT: [[L:%.*]] = select i1 [[X:%.*]], i64 5, i64 6 +; CHECK-NEXT: ret i64 [[L]] ; %s = select i1 %x, ptr @hello, ptr @longer %l = call i64 @wcslen(ptr %s) @@ -111,8 +111,8 @@ define i64 @test_simplify10(i16 %x) { ; CHECK-LABEL: @test_simplify10( ; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[X:%.*]] to i64 -; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i64 5, [[TMP1]] -; CHECK-NEXT: ret i64 [[TMP2]] +; CHECK-NEXT: [[HELLO_L:%.*]] = sub nsw i64 5, [[TMP1]] +; CHECK-NEXT: ret i64 [[HELLO_L]] ; %hello_p = getelementptr inbounds [6 x i16], ptr @hello, i16 0, i16 %x %hello_l = call i64 @wcslen(ptr %hello_p) @@ -125,8 +125,8 @@ ; CHECK-LABEL: @test_simplify11( ; CHECK-NEXT: [[AND:%.*]] = and i16 [[X:%.*]], 7 ; CHECK-NEXT: [[NARROW:%.*]] = sub nuw nsw i16 9, [[AND]] -; CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[NARROW]] to i64 -; CHECK-NEXT: ret i64 [[TMP1]] +; CHECK-NEXT: [[HELLO_L:%.*]] = zext i16 [[NARROW]] to i64 +; CHECK-NEXT: ret i64 [[HELLO_L]] ; %and = and i16 %x, 7 %hello_p = getelementptr inbounds [13 x i16], ptr @null_hello_mid, i16 0, i16 %and @@ -164,7 +164,7 @@ define i64 @test_no_simplify3(i16 %x) { ; CHECK-LABEL: @test_no_simplify3( ; CHECK-NEXT: [[AND:%.*]] = and i16 [[X:%.*]], 15 -; CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[AND]] to i64 +; CHECK-NEXT: [[TMP1:%.*]] = zext was_sext i16 [[AND]] to i64 ; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [13 x i16], ptr @null_hello_mid, i64 0, i64 [[TMP1]] ; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr nonnull [[HELLO_P]]) ; CHECK-NEXT: ret i64 [[HELLO_L]] diff --git a/llvm/test/Transforms/LoopVectorize/induction.ll b/llvm/test/Transforms/LoopVectorize/induction.ll --- a/llvm/test/Transforms/LoopVectorize/induction.ll +++ b/llvm/test/Transforms/LoopVectorize/induction.ll @@ -2095,7 +2095,7 @@ ; IND: for.body: ; IND-NEXT: [[I:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[I_NEXT:%.*]], [[IF_END:%.*]] ] ; IND-NEXT: [[SUM:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[VAR4:%.*]], [[IF_END]] ] -; IND-NEXT: [[TMP16:%.*]] = zext i32 [[I]] to i64 +; IND-NEXT: [[TMP16:%.*]] = zext was_sext i32 [[I]] to i64 ; IND-NEXT: [[VAR0:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP16]] ; IND-NEXT: [[VAR1:%.*]] = load i32, ptr [[VAR0]], align 4 ; IND-NEXT: br i1 [[C]], label [[IF_THEN:%.*]], label [[IF_END]] @@ -2189,7 +2189,7 @@ ; UNROLL: for.body: ; UNROLL-NEXT: [[I:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[I_NEXT:%.*]], [[IF_END:%.*]] ] ; UNROLL-NEXT: [[SUM:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[VAR4:%.*]], [[IF_END]] ] -; UNROLL-NEXT: [[TMP30:%.*]] = zext i32 [[I]] to i64 +; UNROLL-NEXT: [[TMP30:%.*]] = zext was_sext i32 [[I]] to i64 ; UNROLL-NEXT: [[VAR0:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP30]] ; UNROLL-NEXT: [[VAR1:%.*]] = load i32, ptr [[VAR0]], align 4 ; UNROLL-NEXT: br i1 [[C]], label [[IF_THEN:%.*]], label [[IF_END]] @@ -2419,7 +2419,7 @@ ; INTERLEAVE: for.body: ; INTERLEAVE-NEXT: [[I:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[I_NEXT:%.*]], [[IF_END:%.*]] ] ; INTERLEAVE-NEXT: [[SUM:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[VAR4:%.*]], [[IF_END]] ] -; INTERLEAVE-NEXT: [[TMP50:%.*]] = zext i32 [[I]] to i64 +; INTERLEAVE-NEXT: [[TMP50:%.*]] = zext was_sext i32 [[I]] to i64 ; INTERLEAVE-NEXT: [[VAR0:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[TMP50]] ; INTERLEAVE-NEXT: [[VAR1:%.*]] = load i32, ptr [[VAR0]], align 4 ; INTERLEAVE-NEXT: br i1 [[C]], label [[IF_THEN:%.*]], label [[IF_END]] diff --git a/llvm/test/Transforms/PhaseOrdering/lto-licm.ll b/llvm/test/Transforms/PhaseOrdering/lto-licm.ll --- a/llvm/test/Transforms/PhaseOrdering/lto-licm.ll +++ b/llvm/test/Transforms/PhaseOrdering/lto-licm.ll @@ -10,7 +10,7 @@ ; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[I_0]], 1024 ; CHECK-NEXT: br i1 [[CMP_NOT]], label [[FOR_END:%.*]], label [[FOR_INC]] ; CHECK: for.inc: -; CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[I_0]] to i64 +; CHECK-NEXT: [[IDXPROM:%.*]] = zext was_sext i32 [[I_0]] to i64 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[A:%.*]], i64 [[IDXPROM]] ; CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[ARRAYIDX]], align 4 ; CHECK-NEXT: [[TMP1:%.*]] = fdiv fast float [[TMP0]], [[B:%.*]] diff --git a/llvm/test/Transforms/SCCP/ip-ranges-casts.ll b/llvm/test/Transforms/SCCP/ip-ranges-casts.ll --- a/llvm/test/Transforms/SCCP/ip-ranges-casts.ll +++ b/llvm/test/Transforms/SCCP/ip-ranges-casts.ll @@ -112,7 +112,7 @@ ; x = [100, 301) define internal i1 @f.sext(i32 %x, i32 %y) { ; CHECK-LABEL: @f.sext( -; CHECK-NEXT: [[T_1:%.*]] = zext i32 [[X:%.*]] to i64 +; CHECK-NEXT: [[T_1:%.*]] = zext was_sext i32 [[X:%.*]] to i64 ; CHECK-NEXT: [[C_2:%.*]] = icmp sgt i64 [[T_1]], 299 ; CHECK-NEXT: [[C_4:%.*]] = icmp slt i64 [[T_1]], 101 ; CHECK-NEXT: [[RES_1:%.*]] = add i1 false, [[C_2]] @@ -318,7 +318,7 @@ define internal i64 @f.sext_to_zext(i32 %t) { ; CHECK-LABEL: @f.sext_to_zext( -; CHECK-NEXT: [[A:%.*]] = zext i32 [[T:%.*]] to i64 +; CHECK-NEXT: [[A:%.*]] = zext was_sext i32 [[T:%.*]] to i64 ; CHECK-NEXT: ret i64 [[A]] ; %a = sext i32 %t to i64 diff --git a/llvm/test/Transforms/SCCP/ip-ranges-sext.ll b/llvm/test/Transforms/SCCP/ip-ranges-sext.ll --- a/llvm/test/Transforms/SCCP/ip-ranges-sext.ll +++ b/llvm/test/Transforms/SCCP/ip-ranges-sext.ll @@ -6,7 +6,7 @@ ; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X:%.*]], 0 ; CHECK-NEXT: br i1 [[C]], label [[TRUE:%.*]], label [[FALSE:%.*]] ; CHECK: true: -; CHECK-NEXT: [[EXT_1:%.*]] = zext i32 [[X]] to i64 +; CHECK-NEXT: [[EXT_1:%.*]] = zext was_sext i32 [[X]] to i64 ; CHECK-NEXT: ret i64 [[EXT_1]] ; CHECK: false: ; CHECK-NEXT: [[EXT_2:%.*]] = sext i32 [[X]] to i64 @@ -29,7 +29,7 @@ ; CHECK-NEXT: [[C:%.*]] = icmp sge i32 [[X:%.*]], 0 ; CHECK-NEXT: br i1 [[C]], label [[TRUE:%.*]], label [[FALSE:%.*]] ; CHECK: true: -; CHECK-NEXT: [[EXT_1:%.*]] = zext i32 [[X]] to i64 +; CHECK-NEXT: [[EXT_1:%.*]] = zext was_sext i32 [[X]] to i64 ; CHECK-NEXT: ret i64 [[EXT_1]] ; CHECK: false: ; CHECK-NEXT: [[EXT_2:%.*]] = sext i32 [[X]] to i64 @@ -105,7 +105,7 @@ define i64 @test5(i32 %x) { ; CHECK-LABEL: @test5( ; CHECK-NEXT: [[P:%.*]] = and i32 [[X:%.*]], 15 -; CHECK-NEXT: [[EXT:%.*]] = zext i32 [[P]] to i64 +; CHECK-NEXT: [[EXT:%.*]] = zext was_sext i32 [[P]] to i64 ; CHECK-NEXT: ret i64 [[EXT]] ; %p = and i32 %x, 15 @@ -126,7 +126,7 @@ define i64 @test7(i16 %x) { ; CHECK-LABEL: @test7( ; CHECK-NEXT: [[P:%.*]] = and i16 [[X:%.*]], 15 -; CHECK-NEXT: [[EXT_1:%.*]] = zext i16 [[P]] to i32 +; CHECK-NEXT: [[EXT_1:%.*]] = zext was_sext i16 [[P]] to i32 ; CHECK-NEXT: [[EXT_2:%.*]] = sext i32 [[EXT_1]] to i64 ; CHECK-NEXT: ret i64 [[EXT_2]] ; diff --git a/llvm/test/Transforms/SCCP/ranges-sext.ll b/llvm/test/Transforms/SCCP/ranges-sext.ll --- a/llvm/test/Transforms/SCCP/ranges-sext.ll +++ b/llvm/test/Transforms/SCCP/ranges-sext.ll @@ -68,8 +68,8 @@ define i64 @test2(i32 %x) { ; CHECK-LABEL: @test2( ; CHECK-NEXT: [[P:%.*]] = and i32 [[X:%.*]], 15 -; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[P]] to i64 -; CHECK-NEXT: ret i64 [[TMP1]] +; CHECK-NEXT: [[EXT:%.*]] = zext was_sext i32 [[P]] to i64 +; CHECK-NEXT: ret i64 [[EXT]] ; %p = and i32 %x, 15 %ext = sext i32 %p to i64 @@ -87,8 +87,8 @@ ; CHECK-NEXT: br label [[EXIT]] ; CHECK: exit: ; CHECK-NEXT: [[P:%.*]] = phi i32 [ 0, [[TRUE_1]] ], [ 1, [[TRUE_2]] ], [ 3, [[FALSE]] ] -; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[P]] to i64 -; CHECK-NEXT: ret i64 [[TMP1]] +; CHECK-NEXT: [[EXT:%.*]] = zext was_sext i32 [[P]] to i64 +; CHECK-NEXT: ret i64 [[EXT]] ; br i1 %c.1, label %true.1, label %false diff --git a/llvm/test/Transforms/SCCP/widening.ll b/llvm/test/Transforms/SCCP/widening.ll --- a/llvm/test/Transforms/SCCP/widening.ll +++ b/llvm/test/Transforms/SCCP/widening.ll @@ -450,7 +450,7 @@ ; SCCP-NEXT: [[TMP7:%.*]] = sub i64 3, [[TMP6]] ; SCCP-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 1 ; SCCP-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP8]] to i32 -; SCCP-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 +; SCCP-NEXT: [[TMP10:%.*]] = zext was_sext i32 [[TMP9]] to i64 ; SCCP-NEXT: br label [[BB11:%.*]] ; SCCP: bb11: ; SCCP-NEXT: [[TMP12:%.*]] = phi i64 [ [[TMP10]], [[BB4]] ], [ [[TMP17:%.*]], [[BB18:%.*]] ] @@ -487,7 +487,7 @@ ; IPSCCP-NEXT: [[TMP7:%.*]] = sub i64 3, [[TMP6]] ; IPSCCP-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 1 ; IPSCCP-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP8]] to i32 -; IPSCCP-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 +; IPSCCP-NEXT: [[TMP10:%.*]] = zext was_sext i32 [[TMP9]] to i64 ; IPSCCP-NEXT: br label [[BB11:%.*]] ; IPSCCP: bb11: ; IPSCCP-NEXT: [[TMP12:%.*]] = phi i64 [ [[TMP10]], [[BB4]] ], [ [[TMP17:%.*]], [[BB18:%.*]] ]