diff --git a/lld/test/ELF/aarch64-cortex-a53-843419-large.s b/lld/test/ELF/aarch64-cortex-a53-843419-large.s --- a/lld/test/ELF/aarch64-cortex-a53-843419-large.s +++ b/lld/test/ELF/aarch64-cortex-a53-843419-large.s @@ -16,7 +16,6 @@ // CHECK1: <__AArch64AbsLongThunk_need_thunk_after_patch>: // CHECK1-NEXT: 210000: 58000050 ldr x16, 0x210008 // CHECK1-NEXT: 210004: d61f0200 br x16 -// CHECK1: <$d>: // CHECK1-NEXT: 210008: 0c 10 21 08 .word 0x0821100c .section .text.01, "ax", %progbits diff --git a/lld/test/ELF/arm-bl-v4.s b/lld/test/ELF/arm-bl-v4.s --- a/lld/test/ELF/arm-bl-v4.s +++ b/lld/test/ELF/arm-bl-v4.s @@ -43,8 +43,6 @@ // FAR-EMPTY: // FAR-NEXT: <__ARMv5LongLdrPcThunk_target>: // FAR-NEXT: 1000008: ldr pc, [pc, #-4] @ 0x100000c <__ARMv5LongLdrPcThunk_target+0x4> -// FAR-EMPTY: -// FAR-NEXT: <$d>: // FAR-NEXT: 100000c: 00 00 00 06 .word 0x06000000 // FAR-EB-LABEL: <_start>: @@ -53,8 +51,6 @@ // FAR-EB-EMPTY: // FAR-EB-NEXT: <__ARMv5LongLdrPcThunk_target>: // FAR-EB-NEXT: 1000008: ldr pc, [pc, #-4] @ 0x100000c <__ARMv5LongLdrPcThunk_target+0x4> -// FAR-EB-EMPTY: -// FAR-EB-NEXT: <$d>: // FAR-EB-NEXT: 100000c: 06 00 00 00 .word 0x06000000 // FAR-PIE-LABEL: <_start>: @@ -64,8 +60,6 @@ // FAR-PIE-NEXT: <__ARMv4PILongThunk_target>: // FAR-PIE-NEXT: 1000008: ldr r12, [pc] @ 0x1000010 <__ARMv4PILongThunk_target+0x8> // FAR-PIE-NEXT: add pc, pc, r12 -// FAR-PIE-EMPTY: -// FAR-PIE-NEXT: <$d>: // FAR-PIE-NEXT: 1000010: ec ff ff 04 .word 0x04ffffec // FAR-EB-PIE-LABEL: <_start>: @@ -75,8 +69,6 @@ // FAR-EB-PIE-NEXT: <__ARMv4PILongThunk_target>: // FAR-EB-PIE-NEXT: 1000008: ldr r12, [pc] @ 0x1000010 <__ARMv4PILongThunk_target+0x8> // FAR-EB-PIE-NEXT: add pc, pc, r12 -// FAR-EB-PIE-EMPTY: -// FAR-EB-PIE-NEXT: <$d>: // FAR-EB-PIE-NEXT: 1000010: 04 ff ff ec .word 0x04ffffec // NEAR-LABEL: <_start>: diff --git a/lld/test/ELF/arm-gnu-ifunc.s b/lld/test/ELF/arm-gnu-ifunc.s --- a/lld/test/ELF/arm-gnu-ifunc.s +++ b/lld/test/ELF/arm-gnu-ifunc.s @@ -129,15 +129,12 @@ // DISASM-EMPTY: // DISASM-NEXT: Disassembly of section .iplt: // DISASM-EMPTY: -// DISASM-NEXT: <$a>: +// DISASM-NEXT: <.iplt>: // DISASM-NEXT: 20130: add r12, pc, #0, #12 // DISASM-NEXT: 20134: add r12, r12, #16 // DISASM-NEXT: 20138: ldr pc, [r12, #24]! -// DISASM: <$d>: // DISASM-NEXT: 2013c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DISASM: <$a>: // DISASM-NEXT: 20140: add r12, pc, #0, #12 // DISASM-NEXT: 20144: add r12, r12, #16 // DISASM-NEXT: 20148: ldr pc, [r12, #12]! -// DISASM: <$d>: // DISASM-NEXT: 2014c: d4 d4 d4 d4 .word 0xd4d4d4d4 diff --git a/lld/test/ELF/arm-got-relative.s b/lld/test/ELF/arm-got-relative.s --- a/lld/test/ELF/arm-got-relative.s +++ b/lld/test/ELF/arm-got-relative.s @@ -47,7 +47,6 @@ // CODE-NEXT: 101a4: e59f2008 ldr r2, [pc, #8] // CODE-NEXT: 101a8: e08f0003 add r0, pc, r3 // CODE-NEXT: 101ac: e12fff1e bx lr -// CODE: <$d.1>: // (_GLOBAL_OFFSET_TABLE_ = 0x220c) - (0x11a8 + 8) = 0x105c // CODE-NEXT: 101b0: 5c 00 01 00 // (Got(function) - GotBase = 0x0 diff --git a/lld/test/ELF/arm-plt-reloc.s b/lld/test/ELF/arm-plt-reloc.s --- a/lld/test/ELF/arm-plt-reloc.s +++ b/lld/test/ELF/arm-plt-reloc.s @@ -63,37 +63,30 @@ // DSO-EMPTY: // DSO-NEXT: Disassembly of section .plt: // DSO-EMPTY: -// DSO-NEXT: <$a>: +// DSO-NEXT: <.plt>: // DSO-NEXT: 10230: str lr, [sp, #-4]! // (0x10234 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 164 = 0x302e0 = .got.plt[2] // DSO-NEXT: 10234: add lr, pc, #0, #12 // DSO-NEXT: 10238: add lr, lr, #32, #20 // DSO-NEXT: 1023c: ldr pc, [lr, #164]! -// DSO: <$d>: // DSO-NEXT: 10240: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO-NEXT: 10244: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO-NEXT: 10248: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO-NEXT: 1024c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DSO: <$a>: // (0x10250 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 140 = 0x302e4 // DSO-NEXT: 10250: add r12, pc, #0, #12 // DSO-NEXT: 10254: add r12, r12, #32, #20 // DSO-NEXT: 10258: ldr pc, [r12, #140]! -// DSO: <$d>: // DSO-NEXT: 1025c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DSO: <$a>: // (0x10260 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 128 = 0x302e8 // DSO-NEXT: 10260: add r12, pc, #0, #12 // DSO-NEXT: 10264: add r12, r12, #32, #20 // DSO-NEXT: 10268: ldr pc, [r12, #128]! -// DSO: <$d>: // DSO-NEXT: 1026c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DSO: <$a>: // (0x10270 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 116 = 0x302ec // DSO-NEXT: 10270: add r12, pc, #0, #12 // DSO-NEXT: 10274: add r12, r12, #32, #20 // DSO-NEXT: 10278: ldr pc, [r12, #116]! -// DSO: <$d>: // DSO-NEXT: 1027c: d4 d4 d4 d4 .word 0xd4d4d4d4 @@ -150,33 +143,26 @@ // CHECKHIGH-EMPTY: // CHECKHIGH-NEXT: Disassembly of section .plt: // CHECKHIGH-EMPTY: -// CHECKHIGH-NEXT: <$a>: +// CHECKHIGH-NEXT: <.plt>: // CHECKHIGH-NEXT: 2000: str lr, [sp, #-4]! // CHECKHIGH-NEXT: 2004: add lr, pc, #16, #12 // CHECKHIGH-NEXT: 2008: add lr, lr, #1036288 // CHECKHIGH-NEXT: 200c: ldr pc, [lr, #4092]! -// CHECKHIGH: <$d>: // CHECKHIGH-NEXT: 2010: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKHIGH-NEXT: 2014: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKHIGH-NEXT: 2018: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKHIGH-NEXT: 201c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECKHIGH: <$a>: // CHECKHIGH-NEXT: 2020: add r12, pc, #16, #12 // CHECKHIGH-NEXT: 2024: add r12, r12, #1036288 // CHECKHIGH-NEXT: 2028: ldr pc, [r12, #4068]! -// CHECKHIGH: <$d>: // CHECKHIGH-NEXT: 202c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECKHIGH: <$a>: // CHECKHIGH-NEXT: 2030: add r12, pc, #16, #12 // CHECKHIGH-NEXT: 2034: add r12, r12, #1036288 // CHECKHIGH-NEXT: 2038: ldr pc, [r12, #4056]! -// CHECKHIGH: <$d>: // CHECKHIGH-NEXT: 203c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECKHIGH: <$a>: // CHECKHIGH-NEXT: 2040: add r12, pc, #16, #12 // CHECKHIGH-NEXT: 2044: add r12, r12, #1036288 // CHECKHIGH-NEXT: 2048: ldr pc, [r12, #4044]! -// CHECKHIGH: <$d>: // CHECKHIGH-NEXT: 204c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSORELHIGH: Name: .got.plt @@ -225,33 +211,26 @@ // CHECKLONG-EMPTY: // CHECKLONG-NEXT: Disassembly of section .plt: // CHECKLONG-EMPTY: -// CHECKLONG-NEXT: <$a>: +// CHECKLONG-NEXT: <.plt>: // CHECKLONG-NEXT: 2000: str lr, [sp, #-4]! // CHECKLONG-NEXT: 2004: ldr lr, [pc, #4] // CHECKLONG-NEXT: 2008: add lr, pc, lr // CHECKLONG-NEXT: 200c: ldr pc, [lr, #8]! -// CHECKLONG: <$d>: // CHECKLONG-NEXT: 2010: f0 f0 10 11 .word 0x1110f0f0 // CHECKLONG-NEXT: 2014: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKLONG-NEXT: 2018: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKLONG-NEXT: 201c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECKLONG: <$a>: // CHECKLONG-NEXT: 2020: ldr r12, [pc, #4] // CHECKLONG-NEXT: 2024: add r12, r12, pc // CHECKLONG-NEXT: 2028: ldr pc, [r12] -// CHECKLONG: <$d>: // CHECKLONG-NEXT: 202c: e0 f0 10 11 .word 0x1110f0e0 -// CHECKLONG: <$a>: // CHECKLONG-NEXT: 2030: ldr r12, [pc, #4] // CHECKLONG-NEXT: 2034: add r12, r12, pc // CHECKLONG-NEXT: 2038: ldr pc, [r12] -// CHECKLONG: <$d>: // CHECKLONG-NEXT: 203c: d4 f0 10 11 .word 0x1110f0d4 -// CHECKLONG: <$a>: // CHECKLONG-NEXT: 2040: ldr r12, [pc, #4] // CHECKLONG-NEXT: 2044: add r12, r12, pc // CHECKLONG-NEXT: 2048: ldr pc, [r12] -// CHECKLONG: <$d>: // CHECKLONG-NEXT: 204c: c8 f0 10 11 .word 0x1110f0c8 // CHECKLONG-EB: Disassembly of section .text: @@ -269,33 +248,26 @@ // CHECKLONG-EB-EMPTY: // CHECKLONG-EB-NEXT: Disassembly of section .plt: // CHECKLONG-EB-EMPTY: -// CHECKLONG-EB-NEXT: <$a>: +// CHECKLONG-EB-NEXT: <.plt>: // CHECKLONG-EB-NEXT: 2000: str lr, [sp, #-4]! // CHECKLONG-EB-NEXT: ldr lr, [pc, #4] // CHECKLONG-EB-NEXT: add lr, pc, lr // CHECKLONG-EB-NEXT: ldr pc, [lr, #8]! -// CHECKLONG-EB: <$d>: // CHECKLONG-EB-NEXT: 11 10 f0 f0 .word 0x1110f0f0 // CHECKLONG-EB-NEXT: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKLONG-EB-NEXT: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKLONG-EB-NEXT: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECKLONG-EB: <$a>: // CHECKLONG-EB-NEXT: 2020: ldr r12, [pc, #4] // CHECKLONG-EB-NEXT: add r12, r12, pc // CHECKLONG-EB-NEXT: ldr pc, [r12] -// CHECKLONG-EB: <$d>: // CHECKLONG-EB-NEXT: 11 10 f0 e0 .word 0x1110f0e0 -// CHECKLONG-EB: <$a>: // CHECKLONG-EB-NEXT: 2030: ldr r12, [pc, #4] // CHECKLONG-EB-NEXT: add r12, r12, pc // CHECKLONG-EB-NEXT: ldr pc, [r12] -// CHECKLONG-EB: <$d>: // CHECKLONG-EB-NEXT: 11 10 f0 d4 .word 0x1110f0d4 -// CHECKLONG-EB: <$a>: // CHECKLONG-EB-NEXT: 2040: ldr r12, [pc, #4] // CHECKLONG-EB-NEXT: add r12, r12, pc // CHECKLONG-EB-NEXT: ldr pc, [r12] -// CHECKLONG-EB: <$d>: // CHECKLONG-EB-NEXT: 11 10 f0 c8 .word 0x1110f0c8 // DSORELLONG: Name: .got.plt @@ -345,33 +317,26 @@ // CHECKMIX-EMPTY: // CHECKMIX-NEXT: Disassembly of section .plt: // CHECKMIX-EMPTY: -// CHECKMIX-NEXT: <$a>: +// CHECKMIX-NEXT: <.plt>: // CHECKMIX-NEXT: 2000: str lr, [sp, #-4]! // CHECKMIX-NEXT: 2004: ldr lr, [pc, #4] // CHECKMIX-NEXT: 2008: add lr, pc, lr // CHECKMIX-NEXT: 200c: ldr pc, [lr, #8]! -// CHECKMIX: <$d>: // CHECKMIX-NEXT: 2010: 10 00 00 08 .word 0x08000010 // CHECKMIX-NEXT: 2014: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKMIX-NEXT: 2018: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKMIX-NEXT: 201c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECKMIX: <$a>: // CHECKMIX-NEXT: 2020: ldr r12, [pc, #4] // CHECKMIX-NEXT: 2024: add r12, r12, pc // CHECKMIX-NEXT: 2028: ldr pc, [r12] -// CHECKMIX: <$d>: // CHECKMIX-NEXT: 202c: 00 00 00 08 .word 0x08000000 -// CHECKMIX: <$a>: // CHECKMIX-NEXT: 2030: add r12, pc, #133169152 // CHECKMIX-NEXT: 2034: add r12, r12, #1044480 // CHECKMIX-NEXT: 2038: ldr pc, [r12, #4088]! -// CHECKMIX: <$d>: // CHECKMIX-NEXT: 203c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECKMIX: <$a>: // CHECKMIX-NEXT: 2040: add r12, pc, #133169152 // CHECKMIX-NEXT: 2044: add r12, r12, #1044480 // CHECKMIX-NEXT: 2048: ldr pc, [r12, #4076]! -// CHECKMIX: <$d>: // CHECKMIX-NEXT: 204c: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKMIX-EB: Disassembly of section .text: @@ -389,33 +354,26 @@ // CHECKMIX-EB-EMPTY: // CHECKMIX-EB-NEXT: Disassembly of section .plt: // CHECKMIX-EB-EMPTY: -// CHECKMIX-EB-NEXT: <$a>: +// CHECKMIX-EB-NEXT: <.plt>: // CHECKMIX-EB-NEXT: 2000: str lr, [sp, #-4]! // CHECKMIX-EB-NEXT: ldr lr, [pc, #4] // CHECKMIX-EB-NEXT: add lr, pc, lr // CHECKMIX-EB-NEXT: ldr pc, [lr, #8]! -// CHECKMIX-EB: <$d>: // CHECKMIX-EB-NEXT: 08 00 00 10 .word 0x08000010 // CHECKMIX-EB-NEXT: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKMIX-EB-NEXT: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKMIX-EB-NEXT: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECKMIX-EB: <$a>: // CHECKMIX-EB-NEXT: 2020: ldr r12, [pc, #4] // CHECKMIX-EB-NEXT: add r12, r12, pc // CHECKMIX-EB-NEXT: ldr pc, [r12] -// CHECKMIX-EB: <$d>: // CHECKMIX-EB-NEXT: 08 00 00 00 .word 0x08000000 -// CHECKMIX-EB: <$a>: // CHECKMIX-EB-NEXT: 2030: add r12, pc, #133169152 // CHECKMIX-EB-NEXT: add r12, r12, #1044480 // CHECKMIX-EB-NEXT: ldr pc, [r12, #4088]! -// CHECKMIX-EB: <$d>: // CHECKMIX-EB-NEXT: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECKMIX-EB: <$a>: // CHECKMIX-EB-NEXT: 2040: add r12, pc, #133169152 // CHECKMIX-EB-NEXT: add r12, r12, #1044480 // CHECKMIX-EB-NEXT: ldr pc, [r12, #4076]! -// CHECKMIX-EB: <$d>: // CHECKMIX-EB-NEXT: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSORELMIX: Name: .got.plt diff --git a/lld/test/ELF/arm-thumb-plt-range-thunk-os.s b/lld/test/ELF/arm-thumb-plt-range-thunk-os.s --- a/lld/test/ELF/arm-thumb-plt-range-thunk-os.s +++ b/lld/test/ELF/arm-thumb-plt-range-thunk-os.s @@ -87,31 +87,24 @@ // CHECK4: Disassembly of section .plt: // CHECK4-EMPTY: -// CHECK4-NEXT: <$a>: +// CHECK4-NEXT: <.plt>: // CHECK4-NEXT: 4000010: e52de004 str lr, [sp, #-4]! // CHECK4-NEXT: 4000014: e28fe600 add lr, pc, #0, #12 // CHECK4-NEXT: 4000018: e28eea20 add lr, lr, #32 // CHECK4-NEXT: 400001c: e5bef0a4 ldr pc, [lr, #164]! -// CHECK4: <$d>: // CHECK4-NEXT: 4000020: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK4-NEXT: 4000024: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK4-NEXT: 4000028: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK4-NEXT: 400002c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK4: <$a>: // CHECK4-NEXT: 4000030: e28fc600 add r12, pc, #0, #12 // CHECK4-NEXT: 4000034: e28cca20 add r12, r12, #32 // CHECK4-NEXT: 4000038: e5bcf08c ldr pc, [r12, #140]! -// CHECK4: <$d>: // CHECK4-NEXT: 400003c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK4: <$a>: // CHECK4-NEXT: 4000040: e28fc600 add r12, pc, #0, #12 // CHECK4-NEXT: 4000044: e28cca20 add r12, r12, #32 // CHECK4-NEXT: 4000048: e5bcf080 ldr pc, [r12, #128]! -// CHECK4: <$d>: // CHECK4-NEXT: 400004c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK4: <$a>: // CHECK4-NEXT: 4000050: e28fc600 add r12, pc, #0, #12 // CHECK4-NEXT: 4000054: e28cca20 add r12, r12, #32 // CHECK4-NEXT: 4000058: e5bcf074 ldr pc, [r12, #116]! -// CHECK4: <$d>: // CHECK4-NEXT: 400005c: d4 d4 d4 d4 .word 0xd4d4d4d4 diff --git a/llvm/test/tools/llvm-objdump/ELF/AArch64/disassemble-align.s b/llvm/test/tools/llvm-objdump/ELF/AArch64/disassemble-align.s --- a/llvm/test/tools/llvm-objdump/ELF/AArch64/disassemble-align.s +++ b/llvm/test/tools/llvm-objdump/ELF/AArch64/disassemble-align.s @@ -2,11 +2,9 @@ # RUN: llvm-objdump --no-print-imm-hex -d %t | tr '\t' '|' | FileCheck --match-full-lines --strict-whitespace %s ## Use '|' to show where the tabs line up. -# CHECK:0000000000000000 <$x.0>: +# CHECK:0000000000000000 <.text>: # CHECK-NEXT: 0: 91001062 |add|x2, x3, #4{{$}} # CHECK-NEXT: 4: d503201f |nop -# CHECK-EMPTY: -# CHECK-NEXT:0000000000000008 <$d.1>: # CHECK-NEXT: 8: ff ff 00 00 |.word|0x0000ffff add x2, x3, #4 diff --git a/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test b/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test --- a/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test +++ b/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test @@ -1,5 +1,5 @@ # RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %s -o %t -# RUN: llvm-objdump --no-print-imm-hex -d %t | FileCheck %s +# RUN: llvm-objdump --no-print-imm-hex -d %t | FileCheck %s --check-prefixes=CHECK,NOALL # RUN: llvm-objdump --no-print-imm-hex -d --show-all-symbols %t | FileCheck %s --check-prefixes=CHECK,ALL # CHECK: Disassembly of section .mysection: @@ -17,7 +17,8 @@ # CHECK-EMPTY: # CHECK-NEXT: Disassembly of section .myothersection: # CHECK-EMPTY: -# CHECK-NEXT: <$x.2>: +# NOALL-NEXT: <.myothersection>: +# ALL-NEXT: <$x.2>: # CHECK-NEXT: 0: 90000001 adrp x1, 0x0 # CHECK-EMPTY: # ALL-NEXT: <$d.3>: diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp --- a/llvm/tools/llvm-objdump/llvm-objdump.cpp +++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp @@ -1349,6 +1349,7 @@ // Create a mapping from virtual address to symbol name. This is used to // pretty print the symbols while disassembling. std::map AllSymbols; + std::map> AllMappingSymbols; SectionSymbolsTy AbsoluteSymbols; const StringRef FileName = Obj.getFileName(); const MachOObjectFile *MachO = dyn_cast(&Obj); @@ -1361,8 +1362,33 @@ if (NameOrErr->empty() && !(Obj.isXCOFF() && SymbolDescription)) continue; - if (Obj.isELF() && getElfSymbolType(Obj, Symbol) == ELF::STT_SECTION) + if (Obj.isELF() && + (cantFail(Symbol.getFlags()) & SymbolRef::SF_FormatSpecific)) { + // Symbol is either a STT_SECTION or a mapping symbol. Ignore STT_SECTION + // symbols. We will synthesize a section symbol if no symbol is defined at + // offset 0. + // + // For a mapping symbol, store it within AllMappingSymbols. If + // --show-all-symbols is specified, save it in AllSymbols so its label + // will be printed; otherwise its label should not be displayed. + if (getElfSymbolType(Obj, Symbol) != ELF::STT_SECTION && + hasMappingSymbols(Obj)) { + section_iterator SecI = unwrapOrError(Symbol.getSection(), FileName); + if (SecI != Obj.section_end()) { + uint64_t SectionAddr = SecI->getAddress(); + uint64_t Address = cantFail(Symbol.getAddress()); + StringRef Name = *NameOrErr; + if (Name.consume_front("$") && Name.size() && + strchr("adtx", Name[0])) { + AllMappingSymbols[*SecI].emplace_back(Address - SectionAddr, + Name[0]); + if (ShowAllSymbols) + AllSymbols[*SecI].push_back(createSymbolInfo(Obj, Symbol)); + } + } + } continue; + } if (MachO) { // __mh_(execute|dylib|dylinker|bundle|preload|object)_header are special @@ -1498,22 +1524,7 @@ // Get the list of all the symbols in this section. SectionSymbolsTy &Symbols = AllSymbols[Section]; - std::vector MappingSymbols; - if (hasMappingSymbols(Obj)) { - for (const auto &Symb : Symbols) { - uint64_t Address = Symb.Addr; - StringRef Name = Symb.Name; - if (Name.startswith("$d")) - MappingSymbols.emplace_back(Address - SectionAddr, 'd'); - if (Name.startswith("$x")) - MappingSymbols.emplace_back(Address - SectionAddr, 'x'); - if (Name.startswith("$a")) - MappingSymbols.emplace_back(Address - SectionAddr, 'a'); - if (Name.startswith("$t")) - MappingSymbols.emplace_back(Address - SectionAddr, 't'); - } - } - + auto &MappingSymbols = AllMappingSymbols[Section]; llvm::sort(MappingSymbols); ArrayRef Bytes = arrayRefFromStringRef(