diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -677,6 +677,9 @@ return nullptr; return std::make_unique(Triple, Opts); } + case llvm::Triple::spirv: { + return std::make_unique(Triple, Opts); + } case llvm::Triple::spirv32: { if (os != llvm::Triple::UnknownOS || Triple.getEnvironment() != llvm::Triple::UnknownEnvironment) diff --git a/clang/lib/Basic/Targets/SPIR.h b/clang/lib/Basic/Targets/SPIR.h --- a/clang/lib/Basic/Targets/SPIR.h +++ b/clang/lib/Basic/Targets/SPIR.h @@ -93,10 +93,6 @@ : TargetInfo(Triple) { assert((Triple.isSPIR() || Triple.isSPIRV()) && "Invalid architecture for SPIR or SPIR-V."); - assert(getTriple().getOS() == llvm::Triple::UnknownOS && - "SPIR(-V) target must use unknown OS"); - assert(getTriple().getEnvironment() == llvm::Triple::UnknownEnvironment && - "SPIR(-V) target must use unknown environment type"); TLSSupported = false; VLASupported = false; LongWidth = LongAlign = 64; @@ -284,31 +280,53 @@ MacroBuilder &Builder) const override; }; -class LLVM_LIBRARY_VISIBILITY SPIRVTargetInfo : public BaseSPIRTargetInfo { +class LLVM_LIBRARY_VISIBILITY BaseSPIRVTargetInfo : public BaseSPIRTargetInfo { public: - SPIRVTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts) + BaseSPIRVTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts) : BaseSPIRTargetInfo(Triple, Opts) { assert(Triple.isSPIRV() && "Invalid architecture for SPIR-V."); - assert(getTriple().getOS() == llvm::Triple::UnknownOS && - "SPIR-V target must use unknown OS"); - assert(getTriple().getEnvironment() == llvm::Triple::UnknownEnvironment && - "SPIR-V target must use unknown environment type"); + } + + bool hasFeature(StringRef Feature) const override { + return Feature == "spirv"; } void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override; +}; - bool hasFeature(StringRef Feature) const override { - return Feature == "spirv"; +class LLVM_LIBRARY_VISIBILITY SPIRVTargetInfo : public BaseSPIRVTargetInfo { +public: + SPIRVTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts) + : BaseSPIRVTargetInfo(Triple, Opts) { + assert(Triple.getArch() == llvm::Triple::spirv && + "Invalid architecture for Logical SPIR-V."); + assert(Triple.getOS() == llvm::Triple::ShaderModel && + "Logical SPIR-V requires a valid ShaderModel."); + assert(Triple.getEnvironment() >= llvm::Triple::Pixel && + Triple.getEnvironment() <= llvm::Triple::Amplification && + "Logical SPIR-V environment must be a valid shader stage."); + + // SPIR-V IDs are represented with a single 32-bit word. + SizeType = TargetInfo::UnsignedInt; + resetDataLayout("e-i64:64-v16:16-v24:32-v32:32-v48:64-" + "v96:128-v192:256-v256:256-v512:512-v1024:1024"); } + + void getTargetDefines(const LangOptions &Opts, + MacroBuilder &Builder) const override; }; -class LLVM_LIBRARY_VISIBILITY SPIRV32TargetInfo : public SPIRVTargetInfo { +class LLVM_LIBRARY_VISIBILITY SPIRV32TargetInfo : public BaseSPIRVTargetInfo { public: SPIRV32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts) - : SPIRVTargetInfo(Triple, Opts) { + : BaseSPIRVTargetInfo(Triple, Opts) { assert(Triple.getArch() == llvm::Triple::spirv32 && "Invalid architecture for 32-bit SPIR-V."); + assert(getTriple().getOS() == llvm::Triple::UnknownOS && + "32-bit SPIR-V target must use unknown OS"); + assert(getTriple().getEnvironment() == llvm::Triple::UnknownEnvironment && + "32-bit SPIR-V target must use unknown environment type"); PointerWidth = PointerAlign = 32; SizeType = TargetInfo::UnsignedInt; PtrDiffType = IntPtrType = TargetInfo::SignedInt; @@ -320,12 +338,16 @@ MacroBuilder &Builder) const override; }; -class LLVM_LIBRARY_VISIBILITY SPIRV64TargetInfo : public SPIRVTargetInfo { +class LLVM_LIBRARY_VISIBILITY SPIRV64TargetInfo : public BaseSPIRVTargetInfo { public: SPIRV64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts) - : SPIRVTargetInfo(Triple, Opts) { + : BaseSPIRVTargetInfo(Triple, Opts) { assert(Triple.getArch() == llvm::Triple::spirv64 && "Invalid architecture for 64-bit SPIR-V."); + assert(getTriple().getOS() == llvm::Triple::UnknownOS && + "64-bit SPIR-V target must use unknown OS"); + assert(getTriple().getEnvironment() == llvm::Triple::UnknownEnvironment && + "64-bit SPIR-V target must use unknown environment type"); PointerWidth = PointerAlign = 64; SizeType = TargetInfo::UnsignedLong; PtrDiffType = IntPtrType = TargetInfo::SignedLong; diff --git a/clang/lib/Basic/Targets/SPIR.cpp b/clang/lib/Basic/Targets/SPIR.cpp --- a/clang/lib/Basic/Targets/SPIR.cpp +++ b/clang/lib/Basic/Targets/SPIR.cpp @@ -33,19 +33,24 @@ DefineStd(Builder, "SPIR64", Opts); } +void BaseSPIRVTargetInfo::getTargetDefines(const LangOptions &Opts, + MacroBuilder &Builder) const { + DefineStd(Builder, "SPIRV", Opts); +} + void SPIRVTargetInfo::getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const { - DefineStd(Builder, "SPIRV", Opts); + BaseSPIRVTargetInfo::getTargetDefines(Opts, Builder); } void SPIRV32TargetInfo::getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const { - SPIRVTargetInfo::getTargetDefines(Opts, Builder); + BaseSPIRVTargetInfo::getTargetDefines(Opts, Builder); DefineStd(Builder, "SPIRV32", Opts); } void SPIRV64TargetInfo::getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const { - SPIRVTargetInfo::getTargetDefines(Opts, Builder); + BaseSPIRVTargetInfo::getTargetDefines(Opts, Builder); DefineStd(Builder, "SPIRV64", Opts); } diff --git a/clang/lib/Frontend/CompilerInvocation.cpp b/clang/lib/Frontend/CompilerInvocation.cpp --- a/clang/lib/Frontend/CompilerInvocation.cpp +++ b/clang/lib/Frontend/CompilerInvocation.cpp @@ -4050,7 +4050,8 @@ // Validate options for HLSL if (Opts.HLSL) { - bool SupportedTarget = T.getArch() == llvm::Triple::dxil && + bool SupportedTarget = (T.getArch() == llvm::Triple::dxil || + T.getArch() == llvm::Triple::spirv) && T.getOS() == llvm::Triple::ShaderModel; if (!SupportedTarget) Diags.Report(diag::err_drv_hlsl_unsupported_target) << T.str(); diff --git a/llvm/include/llvm/TargetParser/Triple.h b/llvm/include/llvm/TargetParser/Triple.h --- a/llvm/include/llvm/TargetParser/Triple.h +++ b/llvm/include/llvm/TargetParser/Triple.h @@ -46,63 +46,64 @@ enum ArchType { UnknownArch, - arm, // ARM (little endian): arm, armv.*, xscale - armeb, // ARM (big endian): armeb - aarch64, // AArch64 (little endian): aarch64 - aarch64_be, // AArch64 (big endian): aarch64_be - aarch64_32, // AArch64 (little endian) ILP32: aarch64_32 - arc, // ARC: Synopsys ARC - avr, // AVR: Atmel AVR microcontroller - bpfel, // eBPF or extended BPF or 64-bit BPF (little endian) - bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian) - csky, // CSKY: csky - dxil, // DXIL 32-bit DirectX bytecode - hexagon, // Hexagon: hexagon - loongarch32, // LoongArch (32-bit): loongarch32 - loongarch64, // LoongArch (64-bit): loongarch64 - m68k, // M68k: Motorola 680x0 family - mips, // MIPS: mips, mipsallegrex, mipsr6 - mipsel, // MIPSEL: mipsel, mipsallegrexe, mipsr6el - mips64, // MIPS64: mips64, mips64r6, mipsn32, mipsn32r6 - mips64el, // MIPS64EL: mips64el, mips64r6el, mipsn32el, mipsn32r6el - msp430, // MSP430: msp430 - ppc, // PPC: powerpc - ppcle, // PPCLE: powerpc (little endian) - ppc64, // PPC64: powerpc64, ppu - ppc64le, // PPC64LE: powerpc64le - r600, // R600: AMD GPUs HD2XXX - HD6XXX - amdgcn, // AMDGCN: AMD GCN GPUs - riscv32, // RISC-V (32-bit): riscv32 - riscv64, // RISC-V (64-bit): riscv64 - sparc, // Sparc: sparc - sparcv9, // Sparcv9: Sparcv9 - sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a CPU variant - systemz, // SystemZ: s390x - tce, // TCE (http://tce.cs.tut.fi/): tce - tcele, // TCE little endian (http://tce.cs.tut.fi/): tcele - thumb, // Thumb (little endian): thumb, thumbv.* - thumbeb, // Thumb (big endian): thumbeb - x86, // X86: i[3-9]86 - x86_64, // X86-64: amd64, x86_64 - xcore, // XCore: xcore - xtensa, // Tensilica: Xtensa - nvptx, // NVPTX: 32-bit - nvptx64, // NVPTX: 64-bit - le32, // le32: generic little-endian 32-bit CPU (PNaCl) - le64, // le64: generic little-endian 64-bit CPU (PNaCl) - amdil, // AMDIL - amdil64, // AMDIL with 64-bit pointers - hsail, // AMD HSAIL - hsail64, // AMD HSAIL with 64-bit pointers - spir, // SPIR: standard portable IR for OpenCL 32-bit version - spir64, // SPIR: standard portable IR for OpenCL 64-bit version - spirv32, // SPIR-V with 32-bit pointers - spirv64, // SPIR-V with 64-bit pointers - kalimba, // Kalimba: generic kalimba - shave, // SHAVE: Movidius vector VLIW processors - lanai, // Lanai: Lanai 32-bit - wasm32, // WebAssembly with 32-bit pointers - wasm64, // WebAssembly with 64-bit pointers + arm, // ARM (little endian): arm, armv.*, xscale + armeb, // ARM (big endian): armeb + aarch64, // AArch64 (little endian): aarch64 + aarch64_be, // AArch64 (big endian): aarch64_be + aarch64_32, // AArch64 (little endian) ILP32: aarch64_32 + arc, // ARC: Synopsys ARC + avr, // AVR: Atmel AVR microcontroller + bpfel, // eBPF or extended BPF or 64-bit BPF (little endian) + bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian) + csky, // CSKY: csky + dxil, // DXIL 32-bit DirectX bytecode + hexagon, // Hexagon: hexagon + loongarch32, // LoongArch (32-bit): loongarch32 + loongarch64, // LoongArch (64-bit): loongarch64 + m68k, // M68k: Motorola 680x0 family + mips, // MIPS: mips, mipsallegrex, mipsr6 + mipsel, // MIPSEL: mipsel, mipsallegrexe, mipsr6el + mips64, // MIPS64: mips64, mips64r6, mipsn32, mipsn32r6 + mips64el, // MIPS64EL: mips64el, mips64r6el, mipsn32el, mipsn32r6el + msp430, // MSP430: msp430 + ppc, // PPC: powerpc + ppcle, // PPCLE: powerpc (little endian) + ppc64, // PPC64: powerpc64, ppu + ppc64le, // PPC64LE: powerpc64le + r600, // R600: AMD GPUs HD2XXX - HD6XXX + amdgcn, // AMDGCN: AMD GCN GPUs + riscv32, // RISC-V (32-bit): riscv32 + riscv64, // RISC-V (64-bit): riscv64 + sparc, // Sparc: sparc + sparcv9, // Sparcv9: Sparcv9 + sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a CPU variant + systemz, // SystemZ: s390x + tce, // TCE (http://tce.cs.tut.fi/): tce + tcele, // TCE little endian (http://tce.cs.tut.fi/): tcele + thumb, // Thumb (little endian): thumb, thumbv.* + thumbeb, // Thumb (big endian): thumbeb + x86, // X86: i[3-9]86 + x86_64, // X86-64: amd64, x86_64 + xcore, // XCore: xcore + xtensa, // Tensilica: Xtensa + nvptx, // NVPTX: 32-bit + nvptx64, // NVPTX: 64-bit + le32, // le32: generic little-endian 32-bit CPU (PNaCl) + le64, // le64: generic little-endian 64-bit CPU (PNaCl) + amdil, // AMDIL + amdil64, // AMDIL with 64-bit pointers + hsail, // AMD HSAIL + hsail64, // AMD HSAIL with 64-bit pointers + spir, // SPIR: standard portable IR for OpenCL 32-bit version + spir64, // SPIR: standard portable IR for OpenCL 64-bit version + spirv, // SPIR-V with logical memory layout. + spirv32, // SPIR-V with 32-bit pointers + spirv64, // SPIR-V with 64-bit pointers + kalimba, // Kalimba: generic kalimba + shave, // SHAVE: Movidius vector VLIW processors + lanai, // Lanai: Lanai 32-bit + wasm32, // WebAssembly with 32-bit pointers + wasm64, // WebAssembly with 64-bit pointers renderscript32, // 32-bit RenderScript renderscript64, // 64-bit RenderScript ve, // NEC SX-Aurora Vector Engine @@ -769,9 +770,10 @@ return getArch() == Triple::spir || getArch() == Triple::spir64; } - /// Tests whether the target is SPIR-V (32/64-bit). + /// Tests whether the target is SPIR-V (32/64-bit/Logical). bool isSPIRV() const { - return getArch() == Triple::spirv32 || getArch() == Triple::spirv64; + return getArch() == Triple::spirv32 || getArch() == Triple::spirv64 || + getArch() == Triple::spirv; } /// Tests whether the target is NVPTX (32- or 64-bit). diff --git a/llvm/lib/TargetParser/Triple.cpp b/llvm/lib/TargetParser/Triple.cpp --- a/llvm/lib/TargetParser/Triple.cpp +++ b/llvm/lib/TargetParser/Triple.cpp @@ -70,6 +70,8 @@ case sparcv9: return "sparcv9"; case spir64: return "spir64"; case spir: return "spir"; + case spirv: + return "spirv"; case spirv32: return "spirv32"; case spirv64: return "spirv64"; case systemz: return "s390x"; @@ -154,6 +156,7 @@ case spir: case spir64: return "spir"; + case spirv: case spirv32: case spirv64: return "spirv"; @@ -331,72 +334,73 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) { Triple::ArchType BPFArch(parseBPFArch(Name)); return StringSwitch(Name) - .Case("aarch64", aarch64) - .Case("aarch64_be", aarch64_be) - .Case("aarch64_32", aarch64_32) - .Case("arc", arc) - .Case("arm64", aarch64) // "arm64" is an alias for "aarch64" - .Case("arm64_32", aarch64_32) - .Case("arm", arm) - .Case("armeb", armeb) - .Case("avr", avr) - .StartsWith("bpf", BPFArch) - .Case("m68k", m68k) - .Case("mips", mips) - .Case("mipsel", mipsel) - .Case("mips64", mips64) - .Case("mips64el", mips64el) - .Case("msp430", msp430) - .Case("ppc64", ppc64) - .Case("ppc32", ppc) - .Case("ppc", ppc) - .Case("ppc32le", ppcle) - .Case("ppcle", ppcle) - .Case("ppc64le", ppc64le) - .Case("r600", r600) - .Case("amdgcn", amdgcn) - .Case("riscv32", riscv32) - .Case("riscv64", riscv64) - .Case("hexagon", hexagon) - .Case("sparc", sparc) - .Case("sparcel", sparcel) - .Case("sparcv9", sparcv9) - .Case("s390x", systemz) - .Case("systemz", systemz) - .Case("tce", tce) - .Case("tcele", tcele) - .Case("thumb", thumb) - .Case("thumbeb", thumbeb) - .Case("x86", x86) - .Case("i386", x86) - .Case("x86-64", x86_64) - .Case("xcore", xcore) - .Case("nvptx", nvptx) - .Case("nvptx64", nvptx64) - .Case("le32", le32) - .Case("le64", le64) - .Case("amdil", amdil) - .Case("amdil64", amdil64) - .Case("hsail", hsail) - .Case("hsail64", hsail64) - .Case("spir", spir) - .Case("spir64", spir64) - .Case("spirv32", spirv32) - .Case("spirv64", spirv64) - .Case("kalimba", kalimba) - .Case("lanai", lanai) - .Case("shave", shave) - .Case("wasm32", wasm32) - .Case("wasm64", wasm64) - .Case("renderscript32", renderscript32) - .Case("renderscript64", renderscript64) - .Case("ve", ve) - .Case("csky", csky) - .Case("loongarch32", loongarch32) - .Case("loongarch64", loongarch64) - .Case("dxil", dxil) - .Case("xtensa", xtensa) - .Default(UnknownArch); + .Case("aarch64", aarch64) + .Case("aarch64_be", aarch64_be) + .Case("aarch64_32", aarch64_32) + .Case("arc", arc) + .Case("arm64", aarch64) // "arm64" is an alias for "aarch64" + .Case("arm64_32", aarch64_32) + .Case("arm", arm) + .Case("armeb", armeb) + .Case("avr", avr) + .StartsWith("bpf", BPFArch) + .Case("m68k", m68k) + .Case("mips", mips) + .Case("mipsel", mipsel) + .Case("mips64", mips64) + .Case("mips64el", mips64el) + .Case("msp430", msp430) + .Case("ppc64", ppc64) + .Case("ppc32", ppc) + .Case("ppc", ppc) + .Case("ppc32le", ppcle) + .Case("ppcle", ppcle) + .Case("ppc64le", ppc64le) + .Case("r600", r600) + .Case("amdgcn", amdgcn) + .Case("riscv32", riscv32) + .Case("riscv64", riscv64) + .Case("hexagon", hexagon) + .Case("sparc", sparc) + .Case("sparcel", sparcel) + .Case("sparcv9", sparcv9) + .Case("s390x", systemz) + .Case("systemz", systemz) + .Case("tce", tce) + .Case("tcele", tcele) + .Case("thumb", thumb) + .Case("thumbeb", thumbeb) + .Case("x86", x86) + .Case("i386", x86) + .Case("x86-64", x86_64) + .Case("xcore", xcore) + .Case("nvptx", nvptx) + .Case("nvptx64", nvptx64) + .Case("le32", le32) + .Case("le64", le64) + .Case("amdil", amdil) + .Case("amdil64", amdil64) + .Case("hsail", hsail) + .Case("hsail64", hsail64) + .Case("spir", spir) + .Case("spir64", spir64) + .Case("spirv", spirv) + .Case("spirv32", spirv32) + .Case("spirv64", spirv64) + .Case("kalimba", kalimba) + .Case("lanai", lanai) + .Case("shave", shave) + .Case("wasm32", wasm32) + .Case("wasm64", wasm64) + .Case("renderscript32", renderscript32) + .Case("renderscript64", renderscript64) + .Case("ve", ve) + .Case("csky", csky) + .Case("loongarch32", loongarch32) + .Case("loongarch64", loongarch64) + .Case("dxil", dxil) + .Case("xtensa", xtensa) + .Default(UnknownArch); } static Triple::ArchType parseARMArch(StringRef ArchName) { @@ -465,80 +469,83 @@ } static Triple::ArchType parseArch(StringRef ArchName) { - auto AT = StringSwitch(ArchName) - .Cases("i386", "i486", "i586", "i686", Triple::x86) - // FIXME: Do we need to support these? - .Cases("i786", "i886", "i986", Triple::x86) - .Cases("amd64", "x86_64", "x86_64h", Triple::x86_64) - .Cases("powerpc", "powerpcspe", "ppc", "ppc32", Triple::ppc) - .Cases("powerpcle", "ppcle", "ppc32le", Triple::ppcle) - .Cases("powerpc64", "ppu", "ppc64", Triple::ppc64) - .Cases("powerpc64le", "ppc64le", Triple::ppc64le) - .Case("xscale", Triple::arm) - .Case("xscaleeb", Triple::armeb) - .Case("aarch64", Triple::aarch64) - .Case("aarch64_be", Triple::aarch64_be) - .Case("aarch64_32", Triple::aarch64_32) - .Case("arc", Triple::arc) - .Case("arm64", Triple::aarch64) - .Case("arm64_32", Triple::aarch64_32) - .Case("arm64e", Triple::aarch64) - .Case("arm64ec", Triple::aarch64) - .Case("arm", Triple::arm) - .Case("armeb", Triple::armeb) - .Case("thumb", Triple::thumb) - .Case("thumbeb", Triple::thumbeb) - .Case("avr", Triple::avr) - .Case("m68k", Triple::m68k) - .Case("msp430", Triple::msp430) - .Cases("mips", "mipseb", "mipsallegrex", "mipsisa32r6", - "mipsr6", Triple::mips) - .Cases("mipsel", "mipsallegrexel", "mipsisa32r6el", "mipsr6el", - Triple::mipsel) - .Cases("mips64", "mips64eb", "mipsn32", "mipsisa64r6", - "mips64r6", "mipsn32r6", Triple::mips64) - .Cases("mips64el", "mipsn32el", "mipsisa64r6el", "mips64r6el", - "mipsn32r6el", Triple::mips64el) - .Case("r600", Triple::r600) - .Case("amdgcn", Triple::amdgcn) - .Case("riscv32", Triple::riscv32) - .Case("riscv64", Triple::riscv64) - .Case("hexagon", Triple::hexagon) - .Cases("s390x", "systemz", Triple::systemz) - .Case("sparc", Triple::sparc) - .Case("sparcel", Triple::sparcel) - .Cases("sparcv9", "sparc64", Triple::sparcv9) - .Case("tce", Triple::tce) - .Case("tcele", Triple::tcele) - .Case("xcore", Triple::xcore) - .Case("nvptx", Triple::nvptx) - .Case("nvptx64", Triple::nvptx64) - .Case("le32", Triple::le32) - .Case("le64", Triple::le64) - .Case("amdil", Triple::amdil) - .Case("amdil64", Triple::amdil64) - .Case("hsail", Triple::hsail) - .Case("hsail64", Triple::hsail64) - .Case("spir", Triple::spir) - .Case("spir64", Triple::spir64) - .Cases("spirv32", "spirv32v1.0", "spirv32v1.1", "spirv32v1.2", - "spirv32v1.3", "spirv32v1.4", "spirv32v1.5", Triple::spirv32) - .Cases("spirv64", "spirv64v1.0", "spirv64v1.1", "spirv64v1.2", - "spirv64v1.3", "spirv64v1.4", "spirv64v1.5", Triple::spirv64) - .StartsWith("kalimba", Triple::kalimba) - .Case("lanai", Triple::lanai) - .Case("renderscript32", Triple::renderscript32) - .Case("renderscript64", Triple::renderscript64) - .Case("shave", Triple::shave) - .Case("ve", Triple::ve) - .Case("wasm32", Triple::wasm32) - .Case("wasm64", Triple::wasm64) - .Case("csky", Triple::csky) - .Case("loongarch32", Triple::loongarch32) - .Case("loongarch64", Triple::loongarch64) - .Case("dxil", Triple::dxil) - .Case("xtensa", Triple::xtensa) - .Default(Triple::UnknownArch); + auto AT = + StringSwitch(ArchName) + .Cases("i386", "i486", "i586", "i686", Triple::x86) + // FIXME: Do we need to support these? + .Cases("i786", "i886", "i986", Triple::x86) + .Cases("amd64", "x86_64", "x86_64h", Triple::x86_64) + .Cases("powerpc", "powerpcspe", "ppc", "ppc32", Triple::ppc) + .Cases("powerpcle", "ppcle", "ppc32le", Triple::ppcle) + .Cases("powerpc64", "ppu", "ppc64", Triple::ppc64) + .Cases("powerpc64le", "ppc64le", Triple::ppc64le) + .Case("xscale", Triple::arm) + .Case("xscaleeb", Triple::armeb) + .Case("aarch64", Triple::aarch64) + .Case("aarch64_be", Triple::aarch64_be) + .Case("aarch64_32", Triple::aarch64_32) + .Case("arc", Triple::arc) + .Case("arm64", Triple::aarch64) + .Case("arm64_32", Triple::aarch64_32) + .Case("arm64e", Triple::aarch64) + .Case("arm64ec", Triple::aarch64) + .Case("arm", Triple::arm) + .Case("armeb", Triple::armeb) + .Case("thumb", Triple::thumb) + .Case("thumbeb", Triple::thumbeb) + .Case("avr", Triple::avr) + .Case("m68k", Triple::m68k) + .Case("msp430", Triple::msp430) + .Cases("mips", "mipseb", "mipsallegrex", "mipsisa32r6", "mipsr6", + Triple::mips) + .Cases("mipsel", "mipsallegrexel", "mipsisa32r6el", "mipsr6el", + Triple::mipsel) + .Cases("mips64", "mips64eb", "mipsn32", "mipsisa64r6", "mips64r6", + "mipsn32r6", Triple::mips64) + .Cases("mips64el", "mipsn32el", "mipsisa64r6el", "mips64r6el", + "mipsn32r6el", Triple::mips64el) + .Case("r600", Triple::r600) + .Case("amdgcn", Triple::amdgcn) + .Case("riscv32", Triple::riscv32) + .Case("riscv64", Triple::riscv64) + .Case("hexagon", Triple::hexagon) + .Cases("s390x", "systemz", Triple::systemz) + .Case("sparc", Triple::sparc) + .Case("sparcel", Triple::sparcel) + .Cases("sparcv9", "sparc64", Triple::sparcv9) + .Case("tce", Triple::tce) + .Case("tcele", Triple::tcele) + .Case("xcore", Triple::xcore) + .Case("nvptx", Triple::nvptx) + .Case("nvptx64", Triple::nvptx64) + .Case("le32", Triple::le32) + .Case("le64", Triple::le64) + .Case("amdil", Triple::amdil) + .Case("amdil64", Triple::amdil64) + .Case("hsail", Triple::hsail) + .Case("hsail64", Triple::hsail64) + .Case("spir", Triple::spir) + .Case("spir64", Triple::spir64) + .Cases("spirv", "spirv1.0", "spirv1.1", "spirv1.2", "spirv1.3", + "spirv1.4", "spirv1.5", Triple::spirv) + .Cases("spirv32", "spirv32v1.0", "spirv32v1.1", "spirv32v1.2", + "spirv32v1.3", "spirv32v1.4", "spirv32v1.5", Triple::spirv32) + .Cases("spirv64", "spirv64v1.0", "spirv64v1.1", "spirv64v1.2", + "spirv64v1.3", "spirv64v1.4", "spirv64v1.5", Triple::spirv64) + .StartsWith("kalimba", Triple::kalimba) + .Case("lanai", Triple::lanai) + .Case("renderscript32", Triple::renderscript32) + .Case("renderscript64", Triple::renderscript64) + .Case("shave", Triple::shave) + .Case("ve", Triple::ve) + .Case("wasm32", Triple::wasm32) + .Case("wasm64", Triple::wasm64) + .Case("csky", Triple::csky) + .Case("loongarch32", Triple::loongarch32) + .Case("loongarch64", Triple::loongarch64) + .Case("dxil", Triple::dxil) + .Case("xtensa", Triple::xtensa) + .Default(Triple::UnknownArch); // Some architectures require special parsing logic just to compute the // ArchType result. @@ -869,6 +876,7 @@ case Triple::wasm64: return Triple::Wasm; + case Triple::spirv: case Triple::spirv32: case Triple::spirv64: return Triple::SPIRV; @@ -1424,6 +1432,7 @@ case llvm::Triple::sparc: case llvm::Triple::sparcel: case llvm::Triple::spir: + case llvm::Triple::spirv: case llvm::Triple::spirv32: case llvm::Triple::tce: case llvm::Triple::tcele: @@ -1546,6 +1555,7 @@ case Triple::riscv64: T.setArch(Triple::riscv32); break; case Triple::sparcv9: T.setArch(Triple::sparc); break; case Triple::spir64: T.setArch(Triple::spir); break; + case Triple::spirv: case Triple::spirv64: T.setArch(Triple::spirv32, getSubArch()); break; @@ -1624,6 +1634,7 @@ case Triple::riscv32: T.setArch(Triple::riscv64); break; case Triple::sparc: T.setArch(Triple::sparcv9); break; case Triple::spir: T.setArch(Triple::spir64); break; + case Triple::spirv: case Triple::spirv32: T.setArch(Triple::spirv64, getSubArch()); break; @@ -1666,6 +1677,7 @@ case Triple::shave: case Triple::spir64: case Triple::spir: + case Triple::spirv: case Triple::spirv32: case Triple::spirv64: case Triple::wasm32: @@ -1775,6 +1787,7 @@ case Triple::sparcel: case Triple::spir64: case Triple::spir: + case Triple::spirv: case Triple::spirv32: case Triple::spirv64: case Triple::tcele: diff --git a/llvm/unittests/TargetParser/TripleTest.cpp b/llvm/unittests/TargetParser/TripleTest.cpp --- a/llvm/unittests/TargetParser/TripleTest.cpp +++ b/llvm/unittests/TargetParser/TripleTest.cpp @@ -325,6 +325,132 @@ EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); EXPECT_EQ(Triple::UnknownOS, T.getOS()); + T = Triple("spirv-unknown-shadermodel-pixel"); + EXPECT_EQ(Triple::spirv, T.getArch()); + EXPECT_EQ(Triple::NoSubArch, T.getSubArch()); + EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); + EXPECT_EQ(Triple::ShaderModel, T.getOS()); + EXPECT_EQ(Triple::Pixel, T.getEnvironment()); + + T = Triple("spirv-unknown-shadermodel-vertex"); + EXPECT_EQ(Triple::spirv, T.getArch()); + EXPECT_EQ(Triple::NoSubArch, T.getSubArch()); + EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); + EXPECT_EQ(Triple::ShaderModel, T.getOS()); + EXPECT_EQ(Triple::Vertex, T.getEnvironment()); + + T = Triple("spirv-unknown-shadermodel-geometry"); + EXPECT_EQ(Triple::spirv, T.getArch()); + EXPECT_EQ(Triple::NoSubArch, T.getSubArch()); + EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); + EXPECT_EQ(Triple::ShaderModel, T.getOS()); + EXPECT_EQ(Triple::Geometry, T.getEnvironment()); + + T = Triple("spirv-unknown-shadermodel-library"); + EXPECT_EQ(Triple::spirv, T.getArch()); + EXPECT_EQ(Triple::NoSubArch, T.getSubArch()); + EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); + EXPECT_EQ(Triple::ShaderModel, T.getOS()); + EXPECT_EQ(Triple::Library, T.getEnvironment()); + + T = Triple("spirv-unknown-shadermodel-raygeneration"); + EXPECT_EQ(Triple::spirv, T.getArch()); + EXPECT_EQ(Triple::NoSubArch, T.getSubArch()); + EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); + EXPECT_EQ(Triple::ShaderModel, T.getOS()); + EXPECT_EQ(Triple::RayGeneration, T.getEnvironment()); + + T = Triple("spirv-unknown-shadermodel-intersection"); + EXPECT_EQ(Triple::spirv, T.getArch()); + EXPECT_EQ(Triple::NoSubArch, T.getSubArch()); + EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); + EXPECT_EQ(Triple::ShaderModel, T.getOS()); + EXPECT_EQ(Triple::Intersection, T.getEnvironment()); + + T = Triple("spirv-unknown-shadermodel-anyhit"); + EXPECT_EQ(Triple::spirv, T.getArch()); + EXPECT_EQ(Triple::NoSubArch, T.getSubArch()); + EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); + EXPECT_EQ(Triple::ShaderModel, T.getOS()); + EXPECT_EQ(Triple::AnyHit, T.getEnvironment()); + + T = Triple("spirv-unknown-shadermodel-closesthit"); + EXPECT_EQ(Triple::spirv, T.getArch()); + EXPECT_EQ(Triple::NoSubArch, T.getSubArch()); + EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); + EXPECT_EQ(Triple::ShaderModel, T.getOS()); + EXPECT_EQ(Triple::ClosestHit, T.getEnvironment()); + + T = Triple("spirv-unknown-shadermodel-miss"); + EXPECT_EQ(Triple::spirv, T.getArch()); + EXPECT_EQ(Triple::NoSubArch, T.getSubArch()); + EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); + EXPECT_EQ(Triple::ShaderModel, T.getOS()); + EXPECT_EQ(Triple::Miss, T.getEnvironment()); + + T = Triple("spirv-unknown-shadermodel-callable"); + EXPECT_EQ(Triple::spirv, T.getArch()); + EXPECT_EQ(Triple::NoSubArch, T.getSubArch()); + EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); + EXPECT_EQ(Triple::ShaderModel, T.getOS()); + EXPECT_EQ(Triple::Callable, T.getEnvironment()); + + T = Triple("spirv-unknown-shadermodel-mesh"); + EXPECT_EQ(Triple::spirv, T.getArch()); + EXPECT_EQ(Triple::NoSubArch, T.getSubArch()); + EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); + EXPECT_EQ(Triple::ShaderModel, T.getOS()); + EXPECT_EQ(Triple::Mesh, T.getEnvironment()); + + T = Triple("spirv-unknown-shadermodel-amplification"); + EXPECT_EQ(Triple::spirv, T.getArch()); + EXPECT_EQ(Triple::NoSubArch, T.getSubArch()); + EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); + EXPECT_EQ(Triple::ShaderModel, T.getOS()); + EXPECT_EQ(Triple::Amplification, T.getEnvironment()); + + T = Triple("spirv1.0-unknown-shadermodel-compute"); + EXPECT_EQ(Triple::spirv, T.getArch()); + EXPECT_EQ(Triple::SPIRVSubArch_v10, T.getSubArch()); + EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); + EXPECT_EQ(Triple::ShaderModel, T.getOS()); + EXPECT_EQ(Triple::Compute, T.getEnvironment()); + + T = Triple("spirv1.1-unknown-shadermodel-compute"); + EXPECT_EQ(Triple::spirv, T.getArch()); + EXPECT_EQ(Triple::SPIRVSubArch_v11, T.getSubArch()); + EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); + EXPECT_EQ(Triple::ShaderModel, T.getOS()); + EXPECT_EQ(Triple::Compute, T.getEnvironment()); + + T = Triple("spirv1.2-unknown-shadermodel-compute"); + EXPECT_EQ(Triple::spirv, T.getArch()); + EXPECT_EQ(Triple::SPIRVSubArch_v12, T.getSubArch()); + EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); + EXPECT_EQ(Triple::ShaderModel, T.getOS()); + EXPECT_EQ(Triple::Compute, T.getEnvironment()); + + T = Triple("spirv1.3-unknown-shadermodel-compute"); + EXPECT_EQ(Triple::spirv, T.getArch()); + EXPECT_EQ(Triple::SPIRVSubArch_v13, T.getSubArch()); + EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); + EXPECT_EQ(Triple::ShaderModel, T.getOS()); + EXPECT_EQ(Triple::Compute, T.getEnvironment()); + + T = Triple("spirv1.4-unknown-shadermodel-compute"); + EXPECT_EQ(Triple::spirv, T.getArch()); + EXPECT_EQ(Triple::SPIRVSubArch_v14, T.getSubArch()); + EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); + EXPECT_EQ(Triple::ShaderModel, T.getOS()); + EXPECT_EQ(Triple::Compute, T.getEnvironment()); + + T = Triple("spirv1.5-unknown-shadermodel-compute"); + EXPECT_EQ(Triple::spirv, T.getArch()); + EXPECT_EQ(Triple::SPIRVSubArch_v15, T.getSubArch()); + EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); + EXPECT_EQ(Triple::ShaderModel, T.getOS()); + EXPECT_EQ(Triple::Compute, T.getEnvironment()); + T = Triple("x86_64-unknown-ananas"); EXPECT_EQ(Triple::x86_64, T.getArch()); EXPECT_EQ(Triple::UnknownVendor, T.getVendor()); @@ -1173,6 +1299,12 @@ EXPECT_FALSE(T.isArch32Bit()); EXPECT_TRUE(T.isArch64Bit()); + T.setArch(Triple::spirv); + EXPECT_FALSE(T.isArch16Bit()); + EXPECT_TRUE(T.isArch32Bit()); + EXPECT_FALSE(T.isArch64Bit()); + EXPECT_TRUE(T.isSPIRV()); + T.setArch(Triple::spirv32); EXPECT_FALSE(T.isArch16Bit()); EXPECT_TRUE(T.isArch32Bit()); @@ -1377,6 +1509,10 @@ EXPECT_EQ(Triple::spir, T.get32BitArchVariant().getArch()); EXPECT_EQ(Triple::spir64, T.get64BitArchVariant().getArch()); + T.setArch(Triple::spirv); + EXPECT_EQ(Triple::spirv32, T.get32BitArchVariant().getArch()); + EXPECT_EQ(Triple::spirv64, T.get64BitArchVariant().getArch()); + T.setArch(Triple::spirv32); EXPECT_EQ(Triple::spirv32, T.get32BitArchVariant().getArch()); EXPECT_EQ(Triple::spirv64, T.get64BitArchVariant().getArch()); @@ -1862,6 +1998,7 @@ EXPECT_EQ(Triple::ELF, Triple("csky-unknown-unknown").getObjectFormat()); EXPECT_EQ(Triple::ELF, Triple("csky-unknown-linux").getObjectFormat()); + EXPECT_EQ(Triple::SPIRV, Triple("spirv-unknown-unknown").getObjectFormat()); EXPECT_EQ(Triple::SPIRV, Triple("spirv32-unknown-unknown").getObjectFormat()); EXPECT_EQ(Triple::SPIRV, Triple("spirv64-unknown-unknown").getObjectFormat());