Index: llvm/bindings/ocaml/llvm/llvm.ml =================================================================== --- llvm/bindings/ocaml/llvm/llvm.ml +++ llvm/bindings/ocaml/llvm/llvm.ml @@ -648,7 +648,6 @@ external const_mul : llvalue -> llvalue -> llvalue = "llvm_const_mul" external const_nsw_mul : llvalue -> llvalue -> llvalue = "llvm_const_nsw_mul" external const_nuw_mul : llvalue -> llvalue -> llvalue = "llvm_const_nuw_mul" -external const_and : llvalue -> llvalue -> llvalue = "llvm_const_and" external const_or : llvalue -> llvalue -> llvalue = "llvm_const_or" external const_xor : llvalue -> llvalue -> llvalue = "llvm_const_xor" external const_icmp : Icmp.t -> llvalue -> llvalue -> llvalue Index: llvm/bindings/ocaml/llvm/llvm.mli =================================================================== --- llvm/bindings/ocaml/llvm/llvm.mli +++ llvm/bindings/ocaml/llvm/llvm.mli @@ -1125,11 +1125,6 @@ See the method [llvm::ConstantExpr::getNSWMul]. *) val const_nuw_mul : llvalue -> llvalue -> llvalue -(** [const_and c1 c2] returns the constant bitwise [AND] of two integer - constants. - See the method [llvm::ConstantExpr::getAnd]. *) -val const_and : llvalue -> llvalue -> llvalue - (** [const_or c1 c2] returns the constant bitwise [OR] of two integer constants. See the method [llvm::ConstantExpr::getOr]. *) Index: llvm/bindings/ocaml/llvm/llvm_ocaml.c =================================================================== --- llvm/bindings/ocaml/llvm/llvm_ocaml.c +++ llvm/bindings/ocaml/llvm/llvm_ocaml.c @@ -1209,12 +1209,6 @@ return to_val(Value); } -/* llvalue -> llvalue -> llvalue */ -value llvm_const_and(value LHS, value RHS) { - LLVMValueRef Value = LLVMConstAnd(Value_val(LHS), Value_val(RHS)); - return to_val(Value); -} - /* llvalue -> llvalue -> llvalue */ value llvm_const_or(value LHS, value RHS) { LLVMValueRef Value = LLVMConstOr(Value_val(LHS), Value_val(RHS)); Index: llvm/docs/ReleaseNotes.rst =================================================================== --- llvm/docs/ReleaseNotes.rst +++ llvm/docs/ReleaseNotes.rst @@ -70,6 +70,7 @@ removed: * ``select`` + * ``and`` * Introduced a set of experimental `convergence control intrinsics `__ to explicitly define the semantics of convergent @@ -318,6 +319,7 @@ constant fold the operands if possible and create an instruction otherwise: * ``LLVMConstSelect`` + * ``LLVMConstAnd`` Changes to the CodeGen infrastructure ------------------------------------- Index: llvm/include/llvm-c/Core.h =================================================================== --- llvm/include/llvm-c/Core.h +++ llvm/include/llvm-c/Core.h @@ -2216,7 +2216,6 @@ LLVMValueRef LLVMConstMul(LLVMValueRef LHSConstant, LLVMValueRef RHSConstant); LLVMValueRef LLVMConstNSWMul(LLVMValueRef LHSConstant, LLVMValueRef RHSConstant); LLVMValueRef LLVMConstNUWMul(LLVMValueRef LHSConstant, LLVMValueRef RHSConstant); -LLVMValueRef LLVMConstAnd(LLVMValueRef LHSConstant, LLVMValueRef RHSConstant); LLVMValueRef LLVMConstOr(LLVMValueRef LHSConstant, LLVMValueRef RHSConstant); LLVMValueRef LLVMConstXor(LLVMValueRef LHSConstant, LLVMValueRef RHSConstant); LLVMValueRef LLVMConstICmp(LLVMIntPredicate Predicate, Index: llvm/include/llvm/IR/Constants.h =================================================================== --- llvm/include/llvm/IR/Constants.h +++ llvm/include/llvm/IR/Constants.h @@ -1035,7 +1035,6 @@ bool HasNSW = false); static Constant *getMul(Constant *C1, Constant *C2, bool HasNUW = false, bool HasNSW = false); - static Constant *getAnd(Constant *C1, Constant *C2); static Constant *getOr(Constant *C1, Constant *C2); static Constant *getXor(Constant *C1, Constant *C2); static Constant *getShl(Constant *C1, Constant *C2, bool HasNUW = false, Index: llvm/lib/AsmParser/LLParser.cpp =================================================================== --- llvm/lib/AsmParser/LLParser.cpp +++ llvm/lib/AsmParser/LLParser.cpp @@ -3856,6 +3856,8 @@ return error(ID.Loc, "fdiv constexprs are no longer supported"); case lltok::kw_frem: return error(ID.Loc, "frem constexprs are no longer supported"); + case lltok::kw_and: + return error(ID.Loc, "and constexprs are no longer supported"); case lltok::kw_fneg: return error(ID.Loc, "fneg constexprs are no longer supported"); case lltok::kw_select: @@ -3964,7 +3966,6 @@ } // Logical Operations - case lltok::kw_and: case lltok::kw_or: case lltok::kw_xor: { unsigned Opc = Lex.getUIntVal(); Index: llvm/lib/IR/ConstantFold.cpp =================================================================== --- llvm/lib/IR/ConstantFold.cpp +++ llvm/lib/IR/ConstantFold.cpp @@ -228,20 +228,6 @@ return nullptr; return ConstantExpr::getOr(LHS, RHS); } - case Instruction::And: { - Constant *RHS = ExtractConstantBytes(CE->getOperand(1), ByteStart,ByteSize); - if (!RHS) - return nullptr; - - // X & 0 -> 0. - if (RHS->isNullValue()) - return RHS; - - Constant *LHS = ExtractConstantBytes(CE->getOperand(0), ByteStart,ByteSize); - if (!LHS) - return nullptr; - return ConstantExpr::getAnd(LHS, RHS); - } case Instruction::LShr: { ConstantInt *Amt = dyn_cast(CE->getOperand(1)); if (!Amt) Index: llvm/lib/IR/Constants.cpp =================================================================== --- llvm/lib/IR/Constants.cpp +++ llvm/lib/IR/Constants.cpp @@ -2315,6 +2315,7 @@ case Instruction::FMul: case Instruction::FDiv: case Instruction::FRem: + case Instruction::And: return false; case Instruction::Add: case Instruction::Sub: @@ -2322,7 +2323,6 @@ case Instruction::Shl: case Instruction::LShr: case Instruction::AShr: - case Instruction::And: case Instruction::Or: case Instruction::Xor: return true; @@ -2584,10 +2584,6 @@ return get(Instruction::Mul, C1, C2, Flags); } -Constant *ConstantExpr::getAnd(Constant *C1, Constant *C2) { - return get(Instruction::And, C1, C2); -} - Constant *ConstantExpr::getOr(Constant *C1, Constant *C2) { return get(Instruction::Or, C1, C2); } Index: llvm/lib/IR/Core.cpp =================================================================== --- llvm/lib/IR/Core.cpp +++ llvm/lib/IR/Core.cpp @@ -1633,11 +1633,6 @@ unwrap(RHSConstant))); } -LLVMValueRef LLVMConstAnd(LLVMValueRef LHSConstant, LLVMValueRef RHSConstant) { - return wrap(ConstantExpr::getAnd(unwrap(LHSConstant), - unwrap(RHSConstant))); -} - LLVMValueRef LLVMConstOr(LLVMValueRef LHSConstant, LLVMValueRef RHSConstant) { return wrap(ConstantExpr::getOr(unwrap(LHSConstant), unwrap(RHSConstant))); Index: llvm/test/Analysis/ValueTracking/func-ptr-lsb.ll =================================================================== --- llvm/test/Analysis/ValueTracking/func-ptr-lsb.ll +++ llvm/test/Analysis/ValueTracking/func-ptr-lsb.ll @@ -9,7 +9,8 @@ ; Even though the address of @foo is aligned, we cannot assume that the ; pointer has the same alignment. This is not true for e.g. ARM targets ; which store ARM/Thumb state in the LSB - ret i32 and (i32 ptrtoint (ptr @foo to i32), i32 -4) + %and = and i32 ptrtoint (ptr @foo to i32), -4 + ret i32 %and } define internal void @foo() align 16 { Index: llvm/test/Assembler/2004-03-07-FunctionAddressAlignment.ll =================================================================== --- llvm/test/Assembler/2004-03-07-FunctionAddressAlignment.ll +++ /dev/null @@ -1,16 +0,0 @@ -; RUN: llvm-as < %s | llvm-dis | not grep ptrtoint -; RUN: verify-uselistorder %s -; All of these should be eliminable - - -define i32 @foo() { - ret i32 and (i32 ptrtoint (ptr @foo to i32), i32 1) -} - -define i32 @foo2() { - ret i32 and (i32 1, i32 ptrtoint (ptr @foo2 to i32)) -} - -define i1 @foo3() { - ret i1 icmp ne (ptr @foo3, ptr null) -} Index: llvm/test/Assembler/2009-03-24-ZextConstantExpr.ll =================================================================== --- llvm/test/Assembler/2009-03-24-ZextConstantExpr.ll +++ llvm/test/Assembler/2009-03-24-ZextConstantExpr.ll @@ -4,7 +4,7 @@ @gdtr = external global [0 x i8] define void @test() { - call zeroext i1 @paging_map(i64 zext (i32 and (i32 ptrtoint (ptr @gdtr to i32), i32 -4096) to i64)) + call zeroext i1 @paging_map(i64 zext (i32 add (i32 ptrtoint (ptr @gdtr to i32), i32 -4096) to i64)) ret void } Index: llvm/test/Assembler/ConstantExprFold.ll =================================================================== --- llvm/test/Assembler/ConstantExprFold.ll +++ llvm/test/Assembler/ConstantExprFold.ll @@ -11,8 +11,6 @@ @add = global ptr inttoptr (i64 add (i64 ptrtoint (ptr @A to i64), i64 0) to ptr) ; X + 0 == X @sub = global ptr inttoptr (i64 sub (i64 ptrtoint (ptr @A to i64), i64 0) to ptr) ; X - 0 == X @mul = global ptr inttoptr (i64 mul (i64 ptrtoint (ptr @A to i64), i64 0) to ptr) ; X * 0 == 0 -@and1 = global ptr inttoptr (i64 and (i64 ptrtoint (ptr @A to i64), i64 0) to ptr) ; X & 0 == 0 -@and2 = global ptr inttoptr (i64 and (i64 ptrtoint (ptr @A to i64), i64 -1) to ptr) ; X & -1 == X @or = global i64 or (i64 ptrtoint (ptr @A to i64), i64 -1) ; X | -1 == -1 @xor = global ptr inttoptr (i64 xor (i64 ptrtoint (ptr @A to i64), i64 0) to ptr) ; X ^ 0 == X @@ -28,7 +26,6 @@ ; PR2206 @cons = weak global i32 0, align 8 ; [#uses=1] -@and3 = global i64 and (i64 ptrtoint (ptr @cons to i64), i64 7) @gep1 = global <2 x ptr> getelementptr(i8, <2 x ptr> undef, <2 x i64> ) @gep2 = global <2 x ptr> getelementptr({ i8 }, <2 x ptr> undef, <2 x i64> , <2 x i32> ) @@ -42,8 +39,6 @@ ; CHECK: @[[ADD:[a-zA-Z0-9_$"\\.-]+]] = global ptr @A ; CHECK: @[[SUB:[a-zA-Z0-9_$"\\.-]+]] = global ptr @A ; CHECK: @[[MUL:[a-zA-Z0-9_$"\\.-]+]] = global ptr null -; CHECK: @[[AND1:[a-zA-Z0-9_$"\\.-]+]] = global ptr null -; CHECK: @[[AND2:[a-zA-Z0-9_$"\\.-]+]] = global ptr @A ; CHECK: @[[OR:[a-zA-Z0-9_$"\\.-]+]] = global i64 -1 ; CHECK: @[[XOR:[a-zA-Z0-9_$"\\.-]+]] = global ptr @A ; CHECK: @[[B:[a-zA-Z0-9_$"\\.-]+]] = external global [[TY:%.*]] @@ -51,7 +46,6 @@ ; CHECK: @[[ICMP_SLT:[a-zA-Z0-9_$"\\.-]+]] = global i1 false ; CHECK: @[[ICMP_ULT2:[a-zA-Z0-9_$"\\.-]+]] = global i1 icmp ugt (ptr getelementptr inbounds ([[TY:%.*]], ptr @B, i64 0, i32 1), ptr @B) ; CHECK: @[[CONS:[a-zA-Z0-9_$"\\.-]+]] = weak global i32 0, align 8 -; CHECK: @[[AND3:[a-zA-Z0-9_$"\\.-]+]] = global i64 0 ; CHECK: @[[GEP1:[a-zA-Z0-9_$"\\.-]+]] = global <2 x ptr> undef ; CHECK: @[[GEP2:[a-zA-Z0-9_$"\\.-]+]] = global <2 x ptr> undef ; CHECK: @[[GEP3:[a-zA-Z0-9_$"\\.-]+]] = global <2 x ptr> zeroinitializer Index: llvm/test/Bindings/OCaml/core.ml =================================================================== --- llvm/test/Bindings/OCaml/core.ml +++ llvm/test/Bindings/OCaml/core.ml @@ -263,7 +263,6 @@ * CHECK: @const_mul = global i64 mul * CHECK: @const_nsw_mul = global i64 mul nsw * CHECK: @const_nuw_mul = global i64 mul nuw - * CHECK: @const_and = global i64 and * CHECK: @const_or = global i64 or * CHECK: @const_xor = global i64 xor * CHECK: @const_icmp = global i1 icmp sle @@ -288,7 +287,6 @@ ignore (define_global "const_mul" (const_mul foldbomb five) m); ignore (define_global "const_nsw_mul" (const_nsw_mul foldbomb five) m); ignore (define_global "const_nuw_mul" (const_nuw_mul foldbomb five) m); - ignore (define_global "const_and" (const_and foldbomb five) m); ignore (define_global "const_or" (const_or foldbomb five) m); ignore (define_global "const_xor" (const_xor foldbomb five) m); ignore (define_global "const_icmp" (const_icmp Icmp.Sle foldbomb five) m); Index: llvm/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll =================================================================== --- llvm/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll +++ llvm/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll @@ -27,7 +27,9 @@ %b.i1 = alloca %struct.B, align 4 %b.i = alloca %struct.B, align 4 store i32 4, ptr %b.i - br i1 icmp eq (i64 and (i64 zext (i32 ptrtoint (ptr @_ZN1B1iEv to i32) to i64), i64 4294967296), i64 0), label %_Z3fooiM1BFvvE.exit, label %cond_true.i + %and1 = and i64 zext (i32 ptrtoint (ptr @_ZN1B1iEv to i32) to i64), 4294967296 + %cmp1 = icmp eq i64 %and1, 0 + br i1 %cmp1, label %_Z3fooiM1BFvvE.exit, label %cond_true.i cond_true.i: %ctg23.i = getelementptr i8, ptr %b.i, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (ptr @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1) @@ -41,7 +43,9 @@ %ctg25.i = getelementptr i8, ptr %b.i, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (ptr @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1) call void %iftmp.2.0.i(ptr %ctg25.i) store i32 6, ptr %b.i29 - br i1 icmp eq (i64 and (i64 zext (i32 ptrtoint (ptr @_ZN1B1jEv to i32) to i64), i64 4294967296), i64 0), label %_Z3fooiM1BFvvE.exit56, label %cond_true.i46 + %and2 = and i64 zext (i32 ptrtoint (ptr @_ZN1B1iEv to i32) to i64), 4294967296 + %cmp2 = icmp eq i64 %and2, 0 + br i1 %cmp2, label %_Z3fooiM1BFvvE.exit56, label %cond_true.i46 cond_true.i46: %ctg23.i36 = getelementptr i8, ptr %b.i29, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (ptr @_ZN1B1jEv to i32) to i64), i64 32) to i32), i32 1) @@ -55,7 +59,9 @@ %ctg25.i54 = getelementptr i8, ptr %b.i29, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (ptr @_ZN1B1jEv to i32) to i64), i64 32) to i32), i32 1) call void %iftmp.2.0.i49(ptr %ctg25.i54) store i32 -1, ptr %b.i1 - br i1 icmp eq (i64 and (i64 zext (i32 ptrtoint (ptr @_ZN1B1iEv to i32) to i64), i64 4294967296), i64 0), label %_Z3fooiM1BFvvE.exit28, label %cond_true.i18 + %and3 = and i64 zext (i32 ptrtoint (ptr @_ZN1B1iEv to i32) to i64), 4294967296 + %cmp3 = icmp eq i64 %and3, 0 + br i1 %cmp3, label %_Z3fooiM1BFvvE.exit28, label %cond_true.i18 cond_true.i18: %ctg23.i8 = getelementptr i8, ptr %b.i1, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (ptr @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1) Index: llvm/test/CodeGen/ARM/load-address-masked.ll =================================================================== --- llvm/test/CodeGen/ARM/load-address-masked.ll +++ llvm/test/CodeGen/ARM/load-address-masked.ll @@ -7,7 +7,8 @@ define i32 @foo() { entry: - ret i32 and (i32 ptrtoint (ptr @a to i32), i32 255) + %and = and i32 ptrtoint (ptr @a to i32), 255 + ret i32 %and } ; CHECK-LABEL: foo: Index: llvm/test/CodeGen/Hexagon/packetize-l2fetch.ll =================================================================== --- llvm/test/CodeGen/Hexagon/packetize-l2fetch.ll +++ llvm/test/CodeGen/Hexagon/packetize-l2fetch.ll @@ -16,8 +16,10 @@ ; Function Attrs: nounwind define void @f0() local_unnamed_addr #0 { b0: - store ptr inttoptr (i32 and (i32 sext (i8 ptrtoint (ptr getelementptr inbounds ([32768 x i8], ptr @g0, i32 0, i32 10000) to i8) to i32), i32 -65536) to ptr), ptr getelementptr inbounds ([15 x ptr], ptr @g1, i32 0, i32 1), align 4 - store ptr inttoptr (i32 and (i32 sext (i8 ptrtoint (ptr getelementptr inbounds ([32768 x i8], ptr @g0, i32 0, i32 10000) to i8) to i32), i32 -65536) to ptr), ptr getelementptr inbounds ([15 x ptr], ptr @g1, i32 0, i32 6), align 8 + %and = and i32 sext (i8 ptrtoint (ptr getelementptr inbounds ([32768 x i8], ptr @g0, i32 0, i32 10000) to i8) to i32), -65536 + %ptr = inttoptr i32 %and to ptr + store ptr %ptr, ptr getelementptr inbounds ([15 x ptr], ptr @g1, i32 0, i32 1), align 4 + store ptr %ptr, ptr getelementptr inbounds ([15 x ptr], ptr @g1, i32 0, i32 6), align 8 tail call void @f1() %v0 = load ptr, ptr @g1, align 8 tail call void @llvm.hexagon.Y5.l2fetch(ptr %v0, i64 -9223372036854775808) Index: llvm/test/CodeGen/Mips/pr42736.ll =================================================================== --- llvm/test/CodeGen/Mips/pr42736.ll +++ llvm/test/CodeGen/Mips/pr42736.ll @@ -20,7 +20,8 @@ ; STATIC-NEXT: sd $[[R0]] %val = alloca i64, align 8 - store i64 and (i64 ptrtoint (ptr @foo to i64), i64 268435455), ptr %val, align 8 + %and = and i64 ptrtoint (ptr @foo to i64), 268435455 + store i64 %and, ptr %val, align 8 %0 = load i64, ptr %val, align 8 ret void } Index: llvm/test/CodeGen/X86/2007-04-24-VectorCrash.ll =================================================================== --- llvm/test/CodeGen/X86/2007-04-24-VectorCrash.ll +++ llvm/test/CodeGen/X86/2007-04-24-VectorCrash.ll @@ -6,7 +6,8 @@ define void @test(ptr %P) { entry: - or <4 x i32> zeroinitializer, and (<4 x i32> bitcast (<4 x float> shufflevector (<4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer) to <4 x i32>), <4 x i32> < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 >) ; <<4 x i32>>:0 [#uses=1] + %and = and <4 x i32> bitcast (<4 x float> shufflevector (<4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer) to <4 x i32>), < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > + or <4 x i32> zeroinitializer, %and bitcast <4 x i32> %0 to <4 x float> ; <<4 x float>>:1 [#uses=1] fsub <4 x float> %1, zeroinitializer ; <<4 x float>>:2 [#uses=1] fsub <4 x float> shufflevector (<4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer), %2 ; <<4 x float>>:3 [#uses=1] Index: llvm/test/CodeGen/X86/pre-coalesce-2.ll =================================================================== --- llvm/test/CodeGen/X86/pre-coalesce-2.ll +++ llvm/test/CodeGen/X86/pre-coalesce-2.ll @@ -182,7 +182,10 @@ br i1 %62, label %63, label %66 ;