Index: llvm/include/llvm/Transforms/IPO/Attributor.h =================================================================== --- llvm/include/llvm/Transforms/IPO/Attributor.h +++ llvm/include/llvm/Transforms/IPO/Attributor.h @@ -1315,6 +1315,10 @@ return TargetTriple.isAMDGPU() || TargetTriple.isNVPTX(); } + const SmallVectorImpl &getIndirectlyCallableFunctions() const { + return IndirectlyCallableFunctions; + } + private: struct FunctionInfo { ~FunctionInfo(); @@ -1347,6 +1351,10 @@ return *FI; } + /// Vector of functions that might be callable indirectly, i.a., via a + /// function pointer. + SmallVector IndirectlyCallableFunctions; + /// Initialize the function information cache \p FI for the function \p F. /// /// This method needs to be called for all function that might be looked at @@ -1412,6 +1420,10 @@ /// Flag to determine if we should skip all liveness checks early on. bool UseLiveness = true; + /// Flag to indicate if the entire world is contained in this module, that + /// is, no outside functions exist. + bool IsClosedWorldModule = false; + /// Callback function to be invoked on internal functions marked live. std::function InitializationCallback = nullptr; @@ -1687,6 +1699,10 @@ /// Return true if this is a module pass, false otherwise. bool isModulePass() const { return Configuration.IsModulePass; } + /// Return true if the module contains the whole world, thus, no outside + /// functions exist. + bool isClosedWorldModule() const { return Configuration.IsClosedWorldModule; } + /// Return true if we derive attributes for \p Fn bool isRunOn(Function &Fn) const { return isRunOn(&Fn); } bool isRunOn(Function *Fn) const { Index: llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp =================================================================== --- llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp +++ llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp @@ -950,6 +950,7 @@ AC.Allowed = &Allowed; AC.IsModulePass = true; AC.DefaultInitializeLiveInternals = false; + AC.IsClosedWorldModule = true; AC.IPOAmendableCB = [](const Function &F) { return F.getCallingConv() == CallingConv::AMDGPU_KERNEL; }; Index: llvm/lib/Transforms/IPO/Attributor.cpp =================================================================== --- llvm/lib/Transforms/IPO/Attributor.cpp +++ llvm/lib/Transforms/IPO/Attributor.cpp @@ -3251,11 +3251,20 @@ // determine if it is part of a must-tail call edge. This will influence what // attributes we can derive. InformationCache::FunctionInfo &FI = InfoCache.getFunctionInfo(F); - if (!isModulePass() && !FI.CalledViaMustTail) { - for (const Use &U : F.uses()) + if (isClosedWorldModule() || (!isModulePass() && !FI.CalledViaMustTail)) { + bool IsIndirectlyCallable = !isClosedWorldModule() || !F.hasLocalLinkage(); + for (const Use &U : F.uses()) { if (const auto *CB = dyn_cast(U.getUser())) - if (CB->isCallee(&U) && CB->isMustTailCall()) - FI.CalledViaMustTail = true; + if (CB->isCallee(&U)) + if (CB->isMustTailCall()) { + FI.CalledViaMustTail = true; + if (IsIndirectlyCallable) + break; + continue; + } + if (isClosedWorldModule() && IsIndirectlyCallable) + InfoCache.IndirectlyCallableFunctions.push_back(&F); + } } IRPosition FPos = IRPosition::function(F); Index: llvm/lib/Transforms/IPO/AttributorAttributes.cpp =================================================================== --- llvm/lib/Transforms/IPO/AttributorAttributes.cpp +++ llvm/lib/Transforms/IPO/AttributorAttributes.cpp @@ -10370,12 +10370,21 @@ void trackStatistics() const override {} protected: - void addCalledFunction(Function *Fn, ChangeStatus &Change) { - if (CalledFunctions.insert(Fn)) { - Change = ChangeStatus::CHANGED; + void addCalledFunction(Attributor &A, CallBase &CB, Function *Fn, + ChangeStatus &Change, + const TargetTransformInfo *TTI = nullptr) { + if (InvalidCallees.count(Fn) || CalledFunctions.count(Fn)) + return; + if (TTI && !TTI->isValidCallBaseForCallee(&CB, Fn)) { + LLVM_DEBUG(dbgs() << "[AACallEdges] call edge to " << Fn->getName() + << " ws deemed UB and excluded\n"); + InvalidCallees.insert(Fn); + return; + } LLVM_DEBUG(dbgs() << "[AACallEdges] New call edge: " << Fn->getName() << "\n"); - } + CalledFunctions.insert(Fn); + Change = ChangeStatus::CHANGED; } void setHasUnknownCallee(bool NonAsm, ChangeStatus &Change) { @@ -10391,6 +10400,8 @@ /// Optimistic set of functions that might be called by this position. SetVector CalledFunctions; + SetVector InvalidCallees; + /// Is there any call with a unknown callee. bool HasUnknownCallee = false; @@ -10401,27 +10412,47 @@ struct AACallEdgesCallSite : public AACallEdgesImpl { AACallEdgesCallSite(const IRPosition &IRP, Attributor &A) : AACallEdgesImpl(IRP, A) {} + /// See AbstractAttribute::updateImpl(...). ChangeStatus updateImpl(Attributor &A) override { ChangeStatus Change = ChangeStatus::UNCHANGED; - auto VisitValue = [&](Value &V, const Instruction *CtxI) -> bool { + CallBase *CB = cast(getCtxI()); + const auto *TTI = + A.getInfoCache().getAnalysisResultForFunction( + *CB->getCaller()); + + auto VisitValue = [&](Value &V, const Instruction *CtxI, + bool CallBack) -> bool { if (Function *Fn = dyn_cast(&V)) { - addCalledFunction(Fn, Change); - } else { - LLVM_DEBUG(dbgs() << "[AACallEdges] Unrecognized value: " << V << "\n"); + addCalledFunction(A, *CB, Fn, Change, CallBack ? nullptr : TTI); + // Explore all values. + return true; + } + if (!A.isClosedWorldModule()) { + LLVM_DEBUG(if (!hasUnknownCallee()) dbgs() + << "[AACallEdges] Assume unknown callee due to: " << V + << "\n"); setHasUnknownCallee(true, Change); + // Explore all values. + return true; } + unsigned NumArgs = CB->arg_size(); + LLVM_DEBUG(dbgs() << "[AACallEdges] Unrecognized value: " << V + << ", checking indirect callable functions:\n"); + for (auto *Fn : A.getInfoCache().getIndirectlyCallableFunctions()) + addCalledFunction(A, *CB, Fn, Change, CallBack ? nullptr : TTI); // Explore all values. return true; }; SmallVector Values; // Process any value that we might call. - auto ProcessCalledOperand = [&](Value *V, Instruction *CtxI) { + auto ProcessCalledOperand = [&](Value *V, Instruction *CtxI, + bool CallBack) { if (isa(V)) { - VisitValue(*V, CtxI); + VisitValue(*V, CtxI, CallBack); return; } @@ -10432,11 +10463,9 @@ Values.push_back({*V, CtxI}); } for (auto &VAC : Values) - VisitValue(*VAC.getValue(), VAC.getCtxI()); + VisitValue(*VAC.getValue(), VAC.getCtxI(), CallBack); }; - CallBase *CB = cast(getCtxI()); - if (auto *IA = dyn_cast(CB->getCalledOperand())) { if (IA->hasSideEffects() && !hasAssumption(*CB->getCaller(), "ompx_no_call_asm") && @@ -10451,19 +10480,19 @@ for (const auto &Op : MD->operands()) { Function *Callee = mdconst::dyn_extract_or_null(Op); if (Callee) - addCalledFunction(Callee, Change); + addCalledFunction(A, *CB, Callee, Change, TTI); } return Change; } // The most simple case. - ProcessCalledOperand(CB->getCalledOperand(), CB); + ProcessCalledOperand(CB->getCalledOperand(), CB, /* CallBack */ false); // Process callback functions. SmallVector CallbackUses; AbstractCallSite::getCallbackUses(*CB, CallbackUses); for (const Use *U : CallbackUses) - ProcessCalledOperand(U->get(), CB); + ProcessCalledOperand(U->get(), CB, /* CallBack */ true); return Change; } @@ -10490,7 +10519,7 @@ setHasUnknownCallee(false, Change); for (Function *F : CBEdges->getOptimisticEdges()) - addCalledFunction(F, Change); + addCalledFunction(A, CB, F, Change); return true; }; Index: llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll =================================================================== --- llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll +++ llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll @@ -4,51 +4,36 @@ define amdgpu_kernel void @test_indirect_call_sgpr_ptr(ptr %fptr) { ; CHECK-LABEL: name: test_indirect_call_sgpr_ptr ; CHECK: bb.1 (%ir-block.0): - ; CHECK-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11 + ; CHECK-NEXT: liveins: $sgpr8, $vgpr0, $sgpr4_sgpr5 ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr2 - ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr1 - ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 - ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sgpr_32 = COPY $sgpr16 - ; CHECK-NEXT: [[COPY4:%[0-9]+]]:sgpr_32 = COPY $sgpr15 - ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sgpr_32 = COPY $sgpr14 - ; CHECK-NEXT: [[COPY6:%[0-9]+]]:sgpr_64 = COPY $sgpr10_sgpr11 - ; CHECK-NEXT: [[COPY7:%[0-9]+]]:sgpr_64 = COPY $sgpr6_sgpr7 - ; CHECK-NEXT: [[COPY8:%[0-9]+]]:sgpr_64 = COPY $sgpr4_sgpr5 - ; CHECK-NEXT: [[COPY9:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9 + ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0 + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr8 + ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5 ; CHECK-NEXT: [[INT:%[0-9]+]]:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.kernarg.segment.ptr) ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[INT]](p4) :: (dereferenceable invariant load (p0) from %ir.fptr.kernarg.offset1, align 16, addrspace 4) ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $scc - ; CHECK-NEXT: [[COPY10:%[0-9]+]]:_(p4) = COPY [[COPY8]] - ; CHECK-NEXT: [[COPY11:%[0-9]+]]:_(p4) = COPY [[COPY7]] - ; CHECK-NEXT: [[COPY12:%[0-9]+]]:_(p4) = COPY [[COPY9]](p4) + ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(p4) = G_IMPLICIT_DEF + ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(p4) = COPY [[DEF]](p4) + ; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(p4) = COPY [[COPY2]](p4) ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8 - ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY12]], [[C]](s64) - ; CHECK-NEXT: [[COPY13:%[0-9]+]]:_(s64) = COPY [[COPY6]] - ; CHECK-NEXT: [[COPY14:%[0-9]+]]:_(s32) = COPY [[COPY5]] - ; CHECK-NEXT: [[COPY15:%[0-9]+]]:_(s32) = COPY [[COPY4]] - ; CHECK-NEXT: [[COPY16:%[0-9]+]]:_(s32) = COPY [[COPY3]] - ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF - ; CHECK-NEXT: [[COPY17:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) - ; CHECK-NEXT: [[COPY18:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) - ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 10 - ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY18]], [[C1]](s32) - ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY17]], [[SHL]] - ; CHECK-NEXT: [[COPY19:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) - ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 - ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY19]], [[C2]](s32) - ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] - ; CHECK-NEXT: [[COPY20:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg - ; CHECK-NEXT: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY20]](<4 x s32>) - ; CHECK-NEXT: $sgpr4_sgpr5 = COPY [[COPY10]](p4) - ; CHECK-NEXT: $sgpr6_sgpr7 = COPY [[COPY11]](p4) + ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[COPY4]], [[C]](s64) + ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF + ; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY [[COPY1]] + ; CHECK-NEXT: [[DEF2:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF + ; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY [[DEF2]](s32) + ; CHECK-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY [[DEF2]](s32) + ; CHECK-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) + ; CHECK-NEXT: [[COPY9:%[0-9]+]]:_(<4 x s32>) = COPY $private_rsrc_reg + ; CHECK-NEXT: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY9]](<4 x s32>) + ; CHECK-NEXT: $sgpr4_sgpr5 = COPY [[DEF]](p4) + ; CHECK-NEXT: $sgpr6_sgpr7 = COPY [[COPY3]](p4) ; CHECK-NEXT: $sgpr8_sgpr9 = COPY [[PTR_ADD]](p4) - ; CHECK-NEXT: $sgpr10_sgpr11 = COPY [[COPY13]](s64) - ; CHECK-NEXT: $sgpr12 = COPY [[COPY14]](s32) - ; CHECK-NEXT: $sgpr13 = COPY [[COPY15]](s32) - ; CHECK-NEXT: $sgpr14 = COPY [[COPY16]](s32) - ; CHECK-NEXT: $sgpr15 = COPY [[DEF]](s32) - ; CHECK-NEXT: $vgpr31 = COPY [[OR1]](s32) + ; CHECK-NEXT: $sgpr10_sgpr11 = COPY [[DEF1]](s64) + ; CHECK-NEXT: $sgpr12 = COPY [[COPY5]](s32) + ; CHECK-NEXT: $sgpr13 = COPY [[DEF2]](s32) + ; CHECK-NEXT: $sgpr14 = COPY [[COPY6]](s32) + ; CHECK-NEXT: $sgpr15 = COPY [[COPY7]](s32) + ; CHECK-NEXT: $vgpr31 = COPY [[COPY8]](s32) ; CHECK-NEXT: $sgpr30_sgpr31 = G_SI_CALL [[LOAD]](p0), 0, csr_amdgpu, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4_sgpr5, implicit $sgpr6_sgpr7, implicit $sgpr8_sgpr9, implicit $sgpr10_sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $vgpr31 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $scc ; CHECK-NEXT: S_ENDPGM 0 Index: llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll =================================================================== --- llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll +++ llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll @@ -769,7 +769,7 @@ ; AKF_HSA-NEXT: ret float [[FADD]] ; ; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@func_indirect_call -; ATTRIBUTOR_HSA-SAME: (ptr [[FPTR:%.*]]) #[[ATTR16]] { +; ATTRIBUTOR_HSA-SAME: (ptr [[FPTR:%.*]]) #[[ATTR17]] { ; ATTRIBUTOR_HSA-NEXT: [[F:%.*]] = call float [[FPTR]]() ; ATTRIBUTOR_HSA-NEXT: [[FADD:%.*]] = fadd float [[F]], 1.000000e+00 ; ATTRIBUTOR_HSA-NEXT: ret float [[FADD]] @@ -806,7 +806,7 @@ ; AKF_HSA-NEXT: ret float [[FADD]] ; ; ATTRIBUTOR_HSA-LABEL: define {{[^@]+}}@func_null_call -; ATTRIBUTOR_HSA-SAME: (ptr [[FPTR:%.*]]) #[[ATTR16]] { +; ATTRIBUTOR_HSA-SAME: (ptr [[FPTR:%.*]]) #[[ATTR17]] { ; ATTRIBUTOR_HSA-NEXT: [[F:%.*]] = call float null() ; ATTRIBUTOR_HSA-NEXT: [[FADD:%.*]] = fadd float [[F]], 1.000000e+00 ; ATTRIBUTOR_HSA-NEXT: ret float [[FADD]] Index: llvm/test/CodeGen/AMDGPU/attributor-loop-issue-58639.ll =================================================================== --- llvm/test/CodeGen/AMDGPU/attributor-loop-issue-58639.ll +++ llvm/test/CodeGen/AMDGPU/attributor-loop-issue-58639.ll @@ -51,7 +51,7 @@ define amdgpu_kernel void @entry() { ; CHECK-LABEL: define {{[^@]+}}@entry -; CHECK-SAME: () #[[ATTR0]] { +; CHECK-SAME: () #[[ATTR1:[0-9]+]] { ; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [[TMP0:%.*]], align 8, addrspace(5) ; CHECK-NEXT: [[CAST:%.*]] = addrspacecast ptr addrspace(5) [[ALLOCA]] to ptr ; CHECK-NEXT: [[ARST:%.*]] = call double @baz(ptr [[CAST]]) @@ -63,5 +63,6 @@ ret void } ;. -; CHECK: attributes #[[ATTR0]] = { "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" } +; CHECK: attributes #[[ATTR0]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" } +; CHECK: attributes #[[ATTR1]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" } ;. Index: llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll =================================================================== --- llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll +++ llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll @@ -11,7 +11,7 @@ define internal void @direct() { ; CHECK-LABEL: define {{[^@]+}}@direct -; CHECK-SAME: () #[[ATTR1:[0-9]+]] { +; CHECK-SAME: () #[[ATTR0]] { ; CHECK-NEXT: [[FPTR:%.*]] = alloca ptr, align 8, addrspace(5) ; CHECK-NEXT: store ptr @indirect, ptr addrspace(5) [[FPTR]], align 8 ; CHECK-NEXT: [[FP:%.*]] = load ptr, ptr addrspace(5) [[FPTR]], align 8 @@ -27,7 +27,7 @@ define amdgpu_kernel void @test_direct_indirect_call() { ; CHECK-LABEL: define {{[^@]+}}@test_direct_indirect_call -; CHECK-SAME: () #[[ATTR1]] { +; CHECK-SAME: () #[[ATTR0]] { ; CHECK-NEXT: call void @direct() ; CHECK-NEXT: ret void ; @@ -36,5 +36,4 @@ } ;. ; CHECK: attributes #[[ATTR0]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" } -; CHECK: attributes #[[ATTR1]] = { "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" } ;. Index: llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll =================================================================== --- llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll +++ llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll @@ -43,5 +43,5 @@ ; AKF_GCN: attributes #[[ATTR0]] = { "amdgpu-calls" "amdgpu-no-dispatch-id" "amdgpu-stack-objects" } ;. ; ATTRIBUTOR_GCN: attributes #[[ATTR0]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" } -; ATTRIBUTOR_GCN: attributes #[[ATTR1]] = { "amdgpu-no-dispatch-id" "uniform-work-group-size"="false" } +; ATTRIBUTOR_GCN: attributes #[[ATTR1]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" } ;. Index: llvm/test/CodeGen/AMDGPU/indirect-call.ll =================================================================== --- llvm/test/CodeGen/AMDGPU/indirect-call.ll +++ llvm/test/CodeGen/AMDGPU/indirect-call.ll @@ -28,21 +28,21 @@ ; GCN-NEXT: enable_mem_ordered = 0 ; GCN-NEXT: enable_fwd_progress = 0 ; GCN-NEXT: enable_sgpr_private_segment_wave_byte_offset = 1 -; GCN-NEXT: user_sgpr_count = 14 +; GCN-NEXT: user_sgpr_count = 8 ; GCN-NEXT: enable_trap_handler = 0 ; GCN-NEXT: enable_sgpr_workgroup_id_x = 1 -; GCN-NEXT: enable_sgpr_workgroup_id_y = 1 -; GCN-NEXT: enable_sgpr_workgroup_id_z = 1 +; GCN-NEXT: enable_sgpr_workgroup_id_y = 0 +; GCN-NEXT: enable_sgpr_workgroup_id_z = 0 ; GCN-NEXT: enable_sgpr_workgroup_info = 0 -; GCN-NEXT: enable_vgpr_workitem_id = 2 +; GCN-NEXT: enable_vgpr_workitem_id = 0 ; GCN-NEXT: enable_exception_msb = 0 ; GCN-NEXT: granulated_lds_size = 0 ; GCN-NEXT: enable_exception = 0 ; GCN-NEXT: enable_sgpr_private_segment_buffer = 1 -; GCN-NEXT: enable_sgpr_dispatch_ptr = 1 -; GCN-NEXT: enable_sgpr_queue_ptr = 1 +; GCN-NEXT: enable_sgpr_dispatch_ptr = 0 +; GCN-NEXT: enable_sgpr_queue_ptr = 0 ; GCN-NEXT: enable_sgpr_kernarg_segment_ptr = 1 -; GCN-NEXT: enable_sgpr_dispatch_id = 1 +; GCN-NEXT: enable_sgpr_dispatch_id = 0 ; GCN-NEXT: enable_sgpr_flat_scratch_init = 1 ; GCN-NEXT: enable_sgpr_private_segment_size = 0 ; GCN-NEXT: enable_sgpr_grid_workgroup_count_x = 0 @@ -58,7 +58,7 @@ ; GCN-NEXT: workitem_private_segment_byte_size = 16384 ; GCN-NEXT: workgroup_group_segment_byte_size = 0 ; GCN-NEXT: gds_segment_byte_size = 0 -; GCN-NEXT: kernarg_segment_byte_size = 64 +; GCN-NEXT: kernarg_segment_byte_size = 4 ; GCN-NEXT: workgroup_fbarrier_count = 0 ; GCN-NEXT: wavefront_sgpr_count = 68 ; GCN-NEXT: workitem_vgpr_count = 42 @@ -77,26 +77,21 @@ ; GCN-NEXT: .end_amd_kernel_code_t ; GCN-NEXT: ; %bb.0: ; GCN-NEXT: s_mov_b32 s32, 0 -; GCN-NEXT: s_mov_b32 flat_scratch_lo, s13 -; GCN-NEXT: s_add_i32 s12, s12, s17 -; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 -; GCN-NEXT: s_add_u32 s0, s0, s17 +; GCN-NEXT: s_mov_b32 flat_scratch_lo, s7 +; GCN-NEXT: s_add_i32 s6, s6, s9 +; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s6, 8 +; GCN-NEXT: s_add_u32 s0, s0, s9 ; GCN-NEXT: s_addc_u32 s1, s1, 0 -; GCN-NEXT: s_mov_b32 s13, s15 -; GCN-NEXT: s_mov_b32 s12, s14 -; GCN-NEXT: s_getpc_b64 s[14:15] -; GCN-NEXT: s_add_u32 s14, s14, gv.fptr0@rel32@lo+4 -; GCN-NEXT: s_addc_u32 s15, s15, gv.fptr0@rel32@hi+12 -; GCN-NEXT: v_lshlrev_b32_e32 v2, 20, v2 -; GCN-NEXT: s_load_dwordx2 s[18:19], s[14:15], 0x0 -; GCN-NEXT: s_add_u32 s8, s8, 8 -; GCN-NEXT: s_addc_u32 s9, s9, 0 -; GCN-NEXT: v_lshlrev_b32_e32 v1, 10, v1 -; GCN-NEXT: v_or_b32_e32 v0, v0, v1 -; GCN-NEXT: v_or_b32_e32 v31, v0, v2 -; GCN-NEXT: s_mov_b32 s14, s16 +; GCN-NEXT: s_mov_b32 s12, s8 +; GCN-NEXT: s_getpc_b64 s[6:7] +; GCN-NEXT: s_add_u32 s6, s6, gv.fptr0@rel32@lo+4 +; GCN-NEXT: s_addc_u32 s7, s7, gv.fptr0@rel32@hi+12 +; GCN-NEXT: s_load_dwordx2 s[6:7], s[6:7], 0x0 +; GCN-NEXT: s_add_u32 s8, s4, 8 +; GCN-NEXT: s_addc_u32 s9, s5, 0 +; GCN-NEXT: v_mov_b32_e32 v31, v0 ; GCN-NEXT: s_waitcnt lgkmcnt(0) -; GCN-NEXT: s_swappc_b64 s[30:31], s[18:19] +; GCN-NEXT: s_swappc_b64 s[30:31], s[6:7] ; GCN-NEXT: s_endpgm ; ; GISEL-LABEL: test_indirect_call_sgpr_ptr: @@ -121,21 +116,21 @@ ; GISEL-NEXT: enable_mem_ordered = 0 ; GISEL-NEXT: enable_fwd_progress = 0 ; GISEL-NEXT: enable_sgpr_private_segment_wave_byte_offset = 1 -; GISEL-NEXT: user_sgpr_count = 14 +; GISEL-NEXT: user_sgpr_count = 8 ; GISEL-NEXT: enable_trap_handler = 0 ; GISEL-NEXT: enable_sgpr_workgroup_id_x = 1 -; GISEL-NEXT: enable_sgpr_workgroup_id_y = 1 -; GISEL-NEXT: enable_sgpr_workgroup_id_z = 1 +; GISEL-NEXT: enable_sgpr_workgroup_id_y = 0 +; GISEL-NEXT: enable_sgpr_workgroup_id_z = 0 ; GISEL-NEXT: enable_sgpr_workgroup_info = 0 -; GISEL-NEXT: enable_vgpr_workitem_id = 2 +; GISEL-NEXT: enable_vgpr_workitem_id = 0 ; GISEL-NEXT: enable_exception_msb = 0 ; GISEL-NEXT: granulated_lds_size = 0 ; GISEL-NEXT: enable_exception = 0 ; GISEL-NEXT: enable_sgpr_private_segment_buffer = 1 -; GISEL-NEXT: enable_sgpr_dispatch_ptr = 1 -; GISEL-NEXT: enable_sgpr_queue_ptr = 1 +; GISEL-NEXT: enable_sgpr_dispatch_ptr = 0 +; GISEL-NEXT: enable_sgpr_queue_ptr = 0 ; GISEL-NEXT: enable_sgpr_kernarg_segment_ptr = 1 -; GISEL-NEXT: enable_sgpr_dispatch_id = 1 +; GISEL-NEXT: enable_sgpr_dispatch_id = 0 ; GISEL-NEXT: enable_sgpr_flat_scratch_init = 1 ; GISEL-NEXT: enable_sgpr_private_segment_size = 0 ; GISEL-NEXT: enable_sgpr_grid_workgroup_count_x = 0 @@ -151,7 +146,7 @@ ; GISEL-NEXT: workitem_private_segment_byte_size = 16384 ; GISEL-NEXT: workgroup_group_segment_byte_size = 0 ; GISEL-NEXT: gds_segment_byte_size = 0 -; GISEL-NEXT: kernarg_segment_byte_size = 64 +; GISEL-NEXT: kernarg_segment_byte_size = 4 ; GISEL-NEXT: workgroup_fbarrier_count = 0 ; GISEL-NEXT: wavefront_sgpr_count = 68 ; GISEL-NEXT: workitem_vgpr_count = 42 @@ -170,26 +165,22 @@ ; GISEL-NEXT: .end_amd_kernel_code_t ; GISEL-NEXT: ; %bb.0: ; GISEL-NEXT: s_mov_b32 s32, 0 -; GISEL-NEXT: s_mov_b32 flat_scratch_lo, s13 -; GISEL-NEXT: s_add_i32 s12, s12, s17 -; GISEL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 -; GISEL-NEXT: s_add_u32 s0, s0, s17 +; GISEL-NEXT: s_mov_b32 flat_scratch_lo, s7 +; GISEL-NEXT: s_add_i32 s6, s6, s9 +; GISEL-NEXT: s_lshr_b32 flat_scratch_hi, s6, 8 +; GISEL-NEXT: s_add_u32 s0, s0, s9 ; GISEL-NEXT: s_addc_u32 s1, s1, 0 -; GISEL-NEXT: s_mov_b32 s13, s15 -; GISEL-NEXT: s_mov_b32 s12, s14 -; GISEL-NEXT: s_getpc_b64 s[14:15] -; GISEL-NEXT: s_add_u32 s14, s14, gv.fptr0@rel32@lo+4 -; GISEL-NEXT: s_addc_u32 s15, s15, gv.fptr0@rel32@hi+12 -; GISEL-NEXT: v_lshlrev_b32_e32 v1, 10, v1 -; GISEL-NEXT: s_load_dwordx2 s[18:19], s[14:15], 0x0 -; GISEL-NEXT: v_or_b32_e32 v0, v0, v1 -; GISEL-NEXT: s_add_u32 s8, s8, 8 -; GISEL-NEXT: s_addc_u32 s9, s9, 0 -; GISEL-NEXT: v_lshlrev_b32_e32 v1, 20, v2 -; GISEL-NEXT: v_or_b32_e32 v31, v0, v1 -; GISEL-NEXT: s_mov_b32 s14, s16 +; GISEL-NEXT: s_getpc_b64 s[6:7] +; GISEL-NEXT: s_add_u32 s6, s6, gv.fptr0@rel32@lo+4 +; GISEL-NEXT: s_addc_u32 s7, s7, gv.fptr0@rel32@hi+12 +; GISEL-NEXT: s_load_dwordx2 s[6:7], s[6:7], 0x0 +; GISEL-NEXT: s_add_u32 s4, s4, 8 +; GISEL-NEXT: s_addc_u32 s5, s5, 0 +; GISEL-NEXT: s_mov_b32 s12, s8 +; GISEL-NEXT: s_mov_b64 s[8:9], s[4:5] +; GISEL-NEXT: v_mov_b32_e32 v31, v0 ; GISEL-NEXT: s_waitcnt lgkmcnt(0) -; GISEL-NEXT: s_swappc_b64 s[30:31], s[18:19] +; GISEL-NEXT: s_swappc_b64 s[30:31], s[6:7] ; GISEL-NEXT: s_endpgm %fptr = load ptr, ptr addrspace(4) @gv.fptr0 call void %fptr() @@ -219,21 +210,21 @@ ; GCN-NEXT: enable_mem_ordered = 0 ; GCN-NEXT: enable_fwd_progress = 0 ; GCN-NEXT: enable_sgpr_private_segment_wave_byte_offset = 1 -; GCN-NEXT: user_sgpr_count = 14 +; GCN-NEXT: user_sgpr_count = 8 ; GCN-NEXT: enable_trap_handler = 0 ; GCN-NEXT: enable_sgpr_workgroup_id_x = 1 -; GCN-NEXT: enable_sgpr_workgroup_id_y = 1 -; GCN-NEXT: enable_sgpr_workgroup_id_z = 1 +; GCN-NEXT: enable_sgpr_workgroup_id_y = 0 +; GCN-NEXT: enable_sgpr_workgroup_id_z = 0 ; GCN-NEXT: enable_sgpr_workgroup_info = 0 -; GCN-NEXT: enable_vgpr_workitem_id = 2 +; GCN-NEXT: enable_vgpr_workitem_id = 0 ; GCN-NEXT: enable_exception_msb = 0 ; GCN-NEXT: granulated_lds_size = 0 ; GCN-NEXT: enable_exception = 0 ; GCN-NEXT: enable_sgpr_private_segment_buffer = 1 -; GCN-NEXT: enable_sgpr_dispatch_ptr = 1 -; GCN-NEXT: enable_sgpr_queue_ptr = 1 +; GCN-NEXT: enable_sgpr_dispatch_ptr = 0 +; GCN-NEXT: enable_sgpr_queue_ptr = 0 ; GCN-NEXT: enable_sgpr_kernarg_segment_ptr = 1 -; GCN-NEXT: enable_sgpr_dispatch_id = 1 +; GCN-NEXT: enable_sgpr_dispatch_id = 0 ; GCN-NEXT: enable_sgpr_flat_scratch_init = 1 ; GCN-NEXT: enable_sgpr_private_segment_size = 0 ; GCN-NEXT: enable_sgpr_grid_workgroup_count_x = 0 @@ -249,7 +240,7 @@ ; GCN-NEXT: workitem_private_segment_byte_size = 16384 ; GCN-NEXT: workgroup_group_segment_byte_size = 0 ; GCN-NEXT: gds_segment_byte_size = 0 -; GCN-NEXT: kernarg_segment_byte_size = 64 +; GCN-NEXT: kernarg_segment_byte_size = 4 ; GCN-NEXT: workgroup_fbarrier_count = 0 ; GCN-NEXT: wavefront_sgpr_count = 68 ; GCN-NEXT: workitem_vgpr_count = 42 @@ -268,27 +259,22 @@ ; GCN-NEXT: .end_amd_kernel_code_t ; GCN-NEXT: ; %bb.0: ; GCN-NEXT: s_mov_b32 s32, 0 -; GCN-NEXT: s_mov_b32 flat_scratch_lo, s13 -; GCN-NEXT: s_add_i32 s12, s12, s17 -; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 -; GCN-NEXT: s_add_u32 s0, s0, s17 +; GCN-NEXT: s_mov_b32 flat_scratch_lo, s7 +; GCN-NEXT: s_add_i32 s6, s6, s9 +; GCN-NEXT: s_lshr_b32 flat_scratch_hi, s6, 8 +; GCN-NEXT: s_add_u32 s0, s0, s9 ; GCN-NEXT: s_addc_u32 s1, s1, 0 -; GCN-NEXT: s_mov_b32 s13, s15 -; GCN-NEXT: s_mov_b32 s12, s14 -; GCN-NEXT: s_getpc_b64 s[14:15] -; GCN-NEXT: s_add_u32 s14, s14, gv.fptr1@rel32@lo+4 -; GCN-NEXT: s_addc_u32 s15, s15, gv.fptr1@rel32@hi+12 -; GCN-NEXT: v_lshlrev_b32_e32 v2, 20, v2 -; GCN-NEXT: v_lshlrev_b32_e32 v1, 10, v1 -; GCN-NEXT: s_load_dwordx2 s[18:19], s[14:15], 0x0 -; GCN-NEXT: s_add_u32 s8, s8, 8 -; GCN-NEXT: s_addc_u32 s9, s9, 0 -; GCN-NEXT: v_or_b32_e32 v0, v0, v1 -; GCN-NEXT: v_or_b32_e32 v31, v0, v2 +; GCN-NEXT: s_mov_b32 s12, s8 +; GCN-NEXT: v_mov_b32_e32 v31, v0 +; GCN-NEXT: s_getpc_b64 s[6:7] +; GCN-NEXT: s_add_u32 s6, s6, gv.fptr1@rel32@lo+4 +; GCN-NEXT: s_addc_u32 s7, s7, gv.fptr1@rel32@hi+12 +; GCN-NEXT: s_load_dwordx2 s[6:7], s[6:7], 0x0 +; GCN-NEXT: s_add_u32 s8, s4, 8 +; GCN-NEXT: s_addc_u32 s9, s5, 0 ; GCN-NEXT: v_mov_b32_e32 v0, 0x7b -; GCN-NEXT: s_mov_b32 s14, s16 ; GCN-NEXT: s_waitcnt lgkmcnt(0) -; GCN-NEXT: s_swappc_b64 s[30:31], s[18:19] +; GCN-NEXT: s_swappc_b64 s[30:31], s[6:7] ; GCN-NEXT: s_endpgm ; ; GISEL-LABEL: test_indirect_call_sgpr_ptr_arg: @@ -313,21 +299,21 @@ ; GISEL-NEXT: enable_mem_ordered = 0 ; GISEL-NEXT: enable_fwd_progress = 0 ; GISEL-NEXT: enable_sgpr_private_segment_wave_byte_offset = 1 -; GISEL-NEXT: user_sgpr_count = 14 +; GISEL-NEXT: user_sgpr_count = 8 ; GISEL-NEXT: enable_trap_handler = 0 ; GISEL-NEXT: enable_sgpr_workgroup_id_x = 1 -; GISEL-NEXT: enable_sgpr_workgroup_id_y = 1 -; GISEL-NEXT: enable_sgpr_workgroup_id_z = 1 +; GISEL-NEXT: enable_sgpr_workgroup_id_y = 0 +; GISEL-NEXT: enable_sgpr_workgroup_id_z = 0 ; GISEL-NEXT: enable_sgpr_workgroup_info = 0 -; GISEL-NEXT: enable_vgpr_workitem_id = 2 +; GISEL-NEXT: enable_vgpr_workitem_id = 0 ; GISEL-NEXT: enable_exception_msb = 0 ; GISEL-NEXT: granulated_lds_size = 0 ; GISEL-NEXT: enable_exception = 0 ; GISEL-NEXT: enable_sgpr_private_segment_buffer = 1 -; GISEL-NEXT: enable_sgpr_dispatch_ptr = 1 -; GISEL-NEXT: enable_sgpr_queue_ptr = 1 +; GISEL-NEXT: enable_sgpr_dispatch_ptr = 0 +; GISEL-NEXT: enable_sgpr_queue_ptr = 0 ; GISEL-NEXT: enable_sgpr_kernarg_segment_ptr = 1 -; GISEL-NEXT: enable_sgpr_dispatch_id = 1 +; GISEL-NEXT: enable_sgpr_dispatch_id = 0 ; GISEL-NEXT: enable_sgpr_flat_scratch_init = 1 ; GISEL-NEXT: enable_sgpr_private_segment_size = 0 ; GISEL-NEXT: enable_sgpr_grid_workgroup_count_x = 0 @@ -343,7 +329,7 @@ ; GISEL-NEXT: workitem_private_segment_byte_size = 16384 ; GISEL-NEXT: workgroup_group_segment_byte_size = 0 ; GISEL-NEXT: gds_segment_byte_size = 0 -; GISEL-NEXT: kernarg_segment_byte_size = 64 +; GISEL-NEXT: kernarg_segment_byte_size = 4 ; GISEL-NEXT: workgroup_fbarrier_count = 0 ; GISEL-NEXT: wavefront_sgpr_count = 68 ; GISEL-NEXT: workitem_vgpr_count = 42 @@ -362,27 +348,23 @@ ; GISEL-NEXT: .end_amd_kernel_code_t ; GISEL-NEXT: ; %bb.0: ; GISEL-NEXT: s_mov_b32 s32, 0 -; GISEL-NEXT: s_mov_b32 flat_scratch_lo, s13 -; GISEL-NEXT: s_add_i32 s12, s12, s17 -; GISEL-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8 -; GISEL-NEXT: s_add_u32 s0, s0, s17 +; GISEL-NEXT: s_mov_b32 flat_scratch_lo, s7 +; GISEL-NEXT: s_add_i32 s6, s6, s9 +; GISEL-NEXT: s_lshr_b32 flat_scratch_hi, s6, 8 +; GISEL-NEXT: s_add_u32 s0, s0, s9 ; GISEL-NEXT: s_addc_u32 s1, s1, 0 -; GISEL-NEXT: s_mov_b32 s13, s15 -; GISEL-NEXT: s_mov_b32 s12, s14 -; GISEL-NEXT: s_getpc_b64 s[14:15] -; GISEL-NEXT: s_add_u32 s14, s14, gv.fptr1@rel32@lo+4 -; GISEL-NEXT: s_addc_u32 s15, s15, gv.fptr1@rel32@hi+12 -; GISEL-NEXT: v_lshlrev_b32_e32 v1, 10, v1 -; GISEL-NEXT: v_lshlrev_b32_e32 v2, 20, v2 -; GISEL-NEXT: s_load_dwordx2 s[18:19], s[14:15], 0x0 -; GISEL-NEXT: v_or_b32_e32 v0, v0, v1 -; GISEL-NEXT: s_add_u32 s8, s8, 8 -; GISEL-NEXT: s_addc_u32 s9, s9, 0 -; GISEL-NEXT: v_or_b32_e32 v31, v0, v2 +; GISEL-NEXT: v_mov_b32_e32 v31, v0 +; GISEL-NEXT: s_getpc_b64 s[6:7] +; GISEL-NEXT: s_add_u32 s6, s6, gv.fptr1@rel32@lo+4 +; GISEL-NEXT: s_addc_u32 s7, s7, gv.fptr1@rel32@hi+12 +; GISEL-NEXT: s_load_dwordx2 s[6:7], s[6:7], 0x0 +; GISEL-NEXT: s_add_u32 s4, s4, 8 +; GISEL-NEXT: s_addc_u32 s5, s5, 0 ; GISEL-NEXT: v_mov_b32_e32 v0, 0x7b -; GISEL-NEXT: s_mov_b32 s14, s16 +; GISEL-NEXT: s_mov_b32 s12, s8 +; GISEL-NEXT: s_mov_b64 s[8:9], s[4:5] ; GISEL-NEXT: s_waitcnt lgkmcnt(0) -; GISEL-NEXT: s_swappc_b64 s[30:31], s[18:19] +; GISEL-NEXT: s_swappc_b64 s[30:31], s[6:7] ; GISEL-NEXT: s_endpgm %fptr = load ptr, ptr addrspace(4) @gv.fptr1 call void %fptr(i32 123) Index: llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll =================================================================== --- llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll +++ llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll @@ -43,9 +43,9 @@ ; GFX9-LABEL: test_simple_indirect_call: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x4 -; GFX9-NEXT: s_add_u32 flat_scratch_lo, s12, s17 -; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s13, 0 -; GFX9-NEXT: s_add_u32 s0, s0, s17 +; GFX9-NEXT: s_add_u32 flat_scratch_lo, s6, s9 +; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s7, 0 +; GFX9-NEXT: s_add_u32 s0, s0, s9 ; GFX9-NEXT: s_addc_u32 s1, s1, 0 ; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_lshr_b32 s4, s4, 16 @@ -74,5 +74,5 @@ ; AKF_GCN: attributes #[[ATTR0]] = { "amdgpu-calls" "amdgpu-stack-objects" } ;. ; ATTRIBUTOR_GCN: attributes #[[ATTR0]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" } -; ATTRIBUTOR_GCN: attributes #[[ATTR1]] = { "uniform-work-group-size"="false" } +; ATTRIBUTOR_GCN: attributes #[[ATTR1]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" } ;. Index: llvm/test/Transforms/Attributor/ArgumentPromotion/attrs.ll =================================================================== --- llvm/test/Transforms/Attributor/ArgumentPromotion/attrs.ll +++ llvm/test/Transforms/Attributor/ArgumentPromotion/attrs.ll @@ -17,12 +17,12 @@ ; CHECK-NEXT: store i32 [[TMP0]], ptr [[B_PRIV]], align 4 ; CHECK-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], ptr [[B_PRIV]], i64 0, i32 1 ; CHECK-NEXT: store i64 [[TMP1]], ptr [[B_PRIV_0_1]], align 4 -; CHECK-NEXT: [[TRUETMP1:%.*]] = load i32, ptr [[B_PRIV]], align 8 -; CHECK-NEXT: [[TRUETMP2:%.*]] = add i32 [[TRUETMP1]], 1 -; CHECK-NEXT: store i32 [[TRUETMP2]], ptr [[B_PRIV]], align 8 +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_PRIV]], align 8 +; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1 +; CHECK-NEXT: store i32 [[TMP2]], ptr [[B_PRIV]], align 8 ; CHECK-NEXT: store i32 0, ptr [[X_PRIV]], align 4 ; CHECK-NEXT: [[L:%.*]] = load i32, ptr [[X_PRIV]], align 4 -; CHECK-NEXT: [[A:%.*]] = add i32 [[L]], [[TRUETMP2]] +; CHECK-NEXT: [[A:%.*]] = add i32 [[L]], [[TMP2]] ; CHECK-NEXT: ret i32 [[A]] ; entry: @@ -45,8 +45,7 @@ ; TUNIT-SAME: (ptr nocapture nofree nonnull readonly [[X:%.*]]) #[[ATTR0]] { ; TUNIT-NEXT: entry: ; TUNIT-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 -; TUNIT-NEXT: store i32 1, ptr [[S]], align 8 -; TUNIT-NEXT: [[TRUETMP4:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i32 0, i32 1 +; TUNIT-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i32 0, i32 1 ; TUNIT-NEXT: [[TMP0:%.*]] = load i32, ptr [[S]], align 8 ; TUNIT-NEXT: [[S_0_1:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i64 0, i32 1 ; TUNIT-NEXT: [[TMP1:%.*]] = load i64, ptr [[S_0_1]], align 8 @@ -59,7 +58,7 @@ ; CGSCC-SAME: (ptr nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1:[0-9]+]] { ; CGSCC-NEXT: entry: ; CGSCC-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 -; CGSCC-NEXT: [[TRUETMP4:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i32 0, i32 1 +; CGSCC-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i32 0, i32 1 ; CGSCC-NEXT: [[TMP0:%.*]] = load i32, ptr [[X]], align 4 ; CGSCC-NEXT: [[C:%.*]] = call i32 @f(i32 noundef 1, i64 noundef 2, i32 [[TMP0]]) #[[ATTR2:[0-9]+]] ; CGSCC-NEXT: ret i32 [[C]] Index: llvm/test/Transforms/Attributor/IPConstantProp/2009-09-24-byval-ptr.ll =================================================================== --- llvm/test/Transforms/Attributor/IPConstantProp/2009-09-24-byval-ptr.ll +++ llvm/test/Transforms/Attributor/IPConstantProp/2009-09-24-byval-ptr.ll @@ -74,12 +74,12 @@ ; TUNIT-SAME: () #[[ATTR0]] { ; TUNIT-NEXT: entry: ; TUNIT-NEXT: [[TMP0:%.*]] = load i8, ptr @mystr, align 8 -; TUNIT-NEXT: [[MYSTR_0_1:%.*]] = getelementptr [[STRUCT_MYSTR:%.*]], ptr @mystr, i64 0, i32 1 -; TUNIT-NEXT: [[TMP1:%.*]] = load i32, ptr [[MYSTR_0_1]], align 8 +; TUNIT-NEXT: [[MYSTR_0_11:%.*]] = getelementptr [[STRUCT_MYSTR:%.*]], ptr @mystr, i64 0, i32 1 +; TUNIT-NEXT: [[TMP1:%.*]] = load i32, ptr [[MYSTR_0_11]], align 8 ; TUNIT-NEXT: call void @vfu1(i8 [[TMP0]], i32 [[TMP1]]) #[[ATTR0]] ; TUNIT-NEXT: [[TMP2:%.*]] = load i8, ptr @mystr, align 8 -; TUNIT-NEXT: [[MYSTR_0_11:%.*]] = getelementptr [[STRUCT_MYSTR]], ptr @mystr, i64 0, i32 1 -; TUNIT-NEXT: [[TMP3:%.*]] = load i32, ptr [[MYSTR_0_11]], align 8 +; TUNIT-NEXT: [[MYSTR_0_1:%.*]] = getelementptr [[STRUCT_MYSTR]], ptr @mystr, i64 0, i32 1 +; TUNIT-NEXT: [[TMP3:%.*]] = load i32, ptr [[MYSTR_0_1]], align 8 ; TUNIT-NEXT: [[RESULT:%.*]] = call i32 @vfu2(i8 [[TMP2]], i32 [[TMP3]]) #[[ATTR2:[0-9]+]] ; TUNIT-NEXT: ret i32 [[RESULT]] ; Index: llvm/test/Transforms/Attributor/IPConstantProp/PR16052.ll =================================================================== --- llvm/test/Transforms/Attributor/IPConstantProp/PR16052.ll +++ llvm/test/Transforms/Attributor/IPConstantProp/PR16052.ll @@ -68,7 +68,7 @@ ; CGSCC-NEXT: entry: ; CGSCC-NEXT: [[CONV:%.*]] = sext i32 undef to i64 ; CGSCC-NEXT: [[ADD:%.*]] = add i64 42, [[CONV]] -; CGSCC-NEXT: [[CALL2:%.*]] = call i64 @fn1(i64 [[ADD]]) #[[ATTR2]] +; CGSCC-NEXT: [[CALL2:%.*]] = call i64 @fn1(i64 [[ADD]]) #[[ATTR2]], !range [[RNG0:![0-9]+]] ; CGSCC-NEXT: ret i64 [[CALL2]] ; entry: @@ -97,5 +97,7 @@ ; CGSCC: attributes #[[ATTR1]] = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) } ; CGSCC: attributes #[[ATTR2]] = { nofree willreturn } ;. +; CGSCC: [[RNG0]] = !{i64 -2147483606, i64 2147483690} +;. ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: ; CHECK: {{.*}} Index: llvm/test/Transforms/Attributor/IPConstantProp/arg-type-mismatch.ll =================================================================== --- llvm/test/Transforms/Attributor/IPConstantProp/arg-type-mismatch.ll +++ llvm/test/Transforms/Attributor/IPConstantProp/arg-type-mismatch.ll @@ -11,10 +11,10 @@ ; TUNIT-SAME: (i16 [[A:%.*]]) #[[ATTR0:[0-9]+]] { ; TUNIT-NEXT: ret i16 7 ; -; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none) +; CGSCC: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CGSCC-LABEL: define {{[^@]+}}@foo ; CGSCC-SAME: (i16 [[A:%.*]]) #[[ATTR0:[0-9]+]] { -; CGSCC-NEXT: [[CALL:%.*]] = call noundef i16 @bar(i16 [[A]], i32 noundef 7) #[[ATTR2:[0-9]+]] +; CGSCC-NEXT: [[CALL:%.*]] = call noundef i16 @bar(i16 [[A]], i32 noundef 7) #[[ATTR1:[0-9]+]] ; CGSCC-NEXT: ret i16 [[CALL]] ; %call = call i16 @bar(i16 %a, i32 7) @@ -24,7 +24,7 @@ define internal i16 @bar(i16 %p1, i16 %p2) { ; CGSCC: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CGSCC-LABEL: define {{[^@]+}}@bar -; CGSCC-SAME: (i16 [[P1:%.*]], i16 returned [[P2:%.*]]) #[[ATTR1:[0-9]+]] { +; CGSCC-SAME: (i16 [[P1:%.*]], i16 returned [[P2:%.*]]) #[[ATTR0]] { ; CGSCC-NEXT: ret i16 [[P2]] ; ret i16 %p2 @@ -34,9 +34,8 @@ ;. ; TUNIT: attributes #[[ATTR0]] = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) } ;. -; CGSCC: attributes #[[ATTR0]] = { mustprogress nofree nosync nounwind willreturn memory(none) } -; CGSCC: attributes #[[ATTR1]] = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) } -; CGSCC: attributes #[[ATTR2]] = { nofree willreturn } +; CGSCC: attributes #[[ATTR0]] = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) } +; CGSCC: attributes #[[ATTR1]] = { nofree willreturn } ;. ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: ; CHECK: {{.*}} Index: llvm/test/Transforms/Attributor/align.ll =================================================================== --- llvm/test/Transforms/Attributor/align.ll +++ llvm/test/Transforms/Attributor/align.ll @@ -222,7 +222,7 @@ ; CGSCC: Function Attrs: mustprogress nofree noinline nosync nounwind willreturn memory(none) uwtable ; CGSCC-LABEL: define {{[^@]+}}@test7 ; CGSCC-SAME: () #[[ATTR1:[0-9]+]] { -; CGSCC-NEXT: [[C:%.*]] = tail call noundef nonnull align 8 dereferenceable(1) ptr @f1() #[[ATTR14:[0-9]+]] +; CGSCC-NEXT: [[C:%.*]] = tail call noundef nonnull align 8 dereferenceable(1) ptr @f1() #[[ATTR15:[0-9]+]] ; CGSCC-NEXT: ret ptr [[C]] ; %c = tail call ptr @f1(ptr align 8 dereferenceable(1) @a1) @@ -933,7 +933,7 @@ ; TUNIT-NEXT: [[C:%.*]] = load i1, ptr @cnd, align 1 ; TUNIT-NEXT: br i1 [[C]], label [[MT:%.*]], label [[EXIT:%.*]] ; TUNIT: mt: -; TUNIT-NEXT: [[V:%.*]] = musttail call i32 @musttail_callee_1(ptr nocapture nofree noundef readonly [[P]]) #[[ATTR12:[0-9]+]] +; TUNIT-NEXT: [[V:%.*]] = musttail call i32 @musttail_callee_1(ptr nocapture nofree noundef readonly [[P]]) #[[ATTR13:[0-9]+]] ; TUNIT-NEXT: ret i32 [[V]] ; TUNIT: exit: ; TUNIT-NEXT: ret i32 0 @@ -944,7 +944,7 @@ ; CGSCC-NEXT: [[C:%.*]] = load i1, ptr @cnd, align 1 ; CGSCC-NEXT: br i1 [[C]], label [[MT:%.*]], label [[EXIT:%.*]] ; CGSCC: mt: -; CGSCC-NEXT: [[V:%.*]] = musttail call i32 @musttail_callee_1(ptr nocapture nofree noundef nonnull readonly dereferenceable(4) [[P]]) #[[ATTR15:[0-9]+]] +; CGSCC-NEXT: [[V:%.*]] = musttail call i32 @musttail_callee_1(ptr nocapture nofree noundef nonnull readonly dereferenceable(4) [[P]]) #[[ATTR16:[0-9]+]] ; CGSCC-NEXT: ret i32 [[V]] ; CGSCC: exit: ; CGSCC-NEXT: ret i32 0 @@ -1076,13 +1076,13 @@ ; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; TUNIT-LABEL: define {{[^@]+}}@aligned_8_return_caller ; TUNIT-SAME: (ptr nofree readnone align 16 "no-capture-maybe-returned" [[A:%.*]], i1 [[C1:%.*]], i1 [[C2:%.*]]) #[[ATTR10]] { -; TUNIT-NEXT: [[R:%.*]] = call align 8 ptr @aligned_8_return(ptr noalias nofree readnone align 16 "no-capture-maybe-returned" [[A]], i1 noundef [[C1]], i1 [[C2]]) #[[ATTR13:[0-9]+]] +; TUNIT-NEXT: [[R:%.*]] = call align 8 ptr @aligned_8_return(ptr noalias nofree readnone align 16 "no-capture-maybe-returned" [[A]], i1 noundef [[C1]], i1 [[C2]]) #[[ATTR14:[0-9]+]] ; TUNIT-NEXT: ret ptr [[R]] ; ; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none) ; CGSCC-LABEL: define {{[^@]+}}@aligned_8_return_caller ; CGSCC-SAME: (ptr nofree readnone align 16 [[A:%.*]], i1 noundef [[C1:%.*]], i1 [[C2:%.*]]) #[[ATTR13:[0-9]+]] { -; CGSCC-NEXT: [[R:%.*]] = call align 8 ptr @aligned_8_return(ptr noalias nofree readnone align 16 [[A]], i1 noundef [[C1]], i1 [[C2]]) #[[ATTR14]] +; CGSCC-NEXT: [[R:%.*]] = call align 8 ptr @aligned_8_return(ptr noalias nofree readnone align 16 [[A]], i1 noundef [[C1]], i1 [[C2]]) #[[ATTR15]] ; CGSCC-NEXT: ret ptr [[R]] ; %r = call ptr @aligned_8_return(ptr %a, i1 %c1, i1 %c2) @@ -1090,11 +1090,19 @@ } define i32 @implicit_cast_caller(ptr %ptr) { -; CHECK-LABEL: define {{[^@]+}}@implicit_cast_caller -; CHECK-SAME: (ptr [[PTR:%.*]]) { -; CHECK-NEXT: entry: -; CHECK-NEXT: [[CALL:%.*]] = tail call i32 @implicit_cast_callee(ptr [[PTR]]) -; CHECK-NEXT: ret i32 0 +; TUNIT: Function Attrs: norecurse +; TUNIT-LABEL: define {{[^@]+}}@implicit_cast_caller +; TUNIT-SAME: (ptr [[PTR:%.*]]) #[[ATTR12:[0-9]+]] { +; TUNIT-NEXT: entry: +; TUNIT-NEXT: [[CALL:%.*]] = tail call i32 @implicit_cast_callee(ptr [[PTR]]) +; TUNIT-NEXT: ret i32 0 +; +; CGSCC: Function Attrs: norecurse +; CGSCC-LABEL: define {{[^@]+}}@implicit_cast_caller +; CGSCC-SAME: (ptr [[PTR:%.*]]) #[[ATTR14:[0-9]+]] { +; CGSCC-NEXT: entry: +; CGSCC-NEXT: [[CALL:%.*]] = tail call i32 @implicit_cast_callee(ptr [[PTR]]) +; CGSCC-NEXT: ret i32 0 ; entry: %call = tail call i32 @implicit_cast_callee(ptr %ptr) @@ -1119,8 +1127,9 @@ ; TUNIT: attributes #[[ATTR9]] = { mustprogress nofree norecurse nosync nounwind willreturn memory(write) } ; TUNIT: attributes #[[ATTR10]] = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) } ; TUNIT: attributes #[[ATTR11]] = { mustprogress nofree norecurse nosync nounwind willreturn memory(read) } -; TUNIT: attributes #[[ATTR12]] = { nofree nosync nounwind willreturn memory(read) } -; TUNIT: attributes #[[ATTR13]] = { nofree nosync nounwind willreturn } +; TUNIT: attributes #[[ATTR12]] = { norecurse } +; TUNIT: attributes #[[ATTR13]] = { nofree nosync nounwind willreturn memory(read) } +; TUNIT: attributes #[[ATTR14]] = { nofree nosync nounwind willreturn } ;. ; CGSCC: attributes #[[ATTR0]] = { mustprogress nofree noinline norecurse nosync nounwind willreturn memory(none) uwtable } ; CGSCC: attributes #[[ATTR1]] = { mustprogress nofree noinline nosync nounwind willreturn memory(none) uwtable } @@ -1136,6 +1145,7 @@ ; CGSCC: attributes #[[ATTR11]] = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) } ; CGSCC: attributes #[[ATTR12]] = { mustprogress nofree nosync nounwind willreturn memory(read) } ; CGSCC: attributes #[[ATTR13]] = { mustprogress nofree nosync nounwind willreturn memory(none) } -; CGSCC: attributes #[[ATTR14]] = { nofree willreturn } -; CGSCC: attributes #[[ATTR15]] = { nofree willreturn memory(read) } +; CGSCC: attributes #[[ATTR14]] = { norecurse } +; CGSCC: attributes #[[ATTR15]] = { nofree willreturn } +; CGSCC: attributes #[[ATTR16]] = { nofree willreturn memory(read) } ;. Index: llvm/test/Transforms/Attributor/depgraph.ll =================================================================== --- llvm/test/Transforms/Attributor/depgraph.ll +++ llvm/test/Transforms/Attributor/depgraph.ll @@ -106,22 +106,22 @@ ; GRAPH-NEXT: updates [AAAlign] for CtxI ' %2 = load i32, ptr %0, align 4' at position {fn_ret:checkAndAdvance [checkAndAdvance@-1]} with state align<1-16> ; GRAPH-NEXT: updates [AANonNull] for CtxI ' %2 = load i32, ptr %0, align 4' at position {fn_ret:checkAndAdvance [checkAndAdvance@-1]} with state nonnull ; GRAPH-NEXT: updates [AADereferenceable] for CtxI ' %2 = load i32, ptr %0, align 4' at position {fn_ret:checkAndAdvance [checkAndAdvance@-1]} with state unknown-dereferenceable -; GRAPH-EMPTY: +; GRAPH-EMPTY: ; GRAPH-NEXT: [AAPotentialValues] for CtxI ' %.0 = phi ptr [ %6, %4 ], [ %0, %7 ]' at position {flt:.0 [.0@-1]} with state set-state(< {ptr %0[3], %5 = getelementptr inbounds i32, ptr %0, i64 4[3], %5 = getelementptr inbounds i32, ptr %0, i64 4[3], } >) ; GRAPH-NEXT: updates [AAPotentialValues] for CtxI ' %2 = load i32, ptr %0, align 4' at position {fn_ret:checkAndAdvance [checkAndAdvance@-1]} with state set-state(< { %.0 = phi ptr [ %6, %4 ], [ %0, %7 ][3], } >) ; GRAPH-NEXT: updates [AAPotentialValues] for CtxI ' %6 = call ptr @checkAndAdvance(ptr %5)' at position {cs_ret: [@-1]} with state set-state(< { %5 = getelementptr inbounds i32, ptr %0, i64 4[3], %5 = getelementptr inbounds i32, ptr %0, i64 4[3], } >) ; GRAPH-NEXT: updates [AANoCapture] for CtxI ' %2 = load i32, ptr %0, align 4' at position {arg: [@0]} with state assumed not-captured-maybe-returned ; GRAPH-NEXT: updates [AAAlign] for CtxI ' %2 = load i32, ptr %0, align 4' at position {fn_ret:checkAndAdvance [checkAndAdvance@-1]} with state align<1-16> ; GRAPH-NEXT: updates [AANonNull] for CtxI ' %2 = load i32, ptr %0, align 4' at position {fn_ret:checkAndAdvance [checkAndAdvance@-1]} with state nonnull -; GRAPH-EMPTY: +; GRAPH-EMPTY: ; GRAPH-NEXT: [AAPotentialValues] for CtxI ' %5 = getelementptr inbounds i32, ptr %0, i64 4' at position {flt: [@-1]} with state set-state(< { %5 = getelementptr inbounds i32, ptr %0, i64 4[3], } >) -; GRAPH-EMPTY: +; GRAPH-EMPTY: ; GRAPH-NEXT: [AAPotentialValues] for CtxI <> at position {flt: [@-1]} with state set-state(< {i64 4[3], } >) -; GRAPH-EMPTY: +; GRAPH-EMPTY: ; GRAPH-NEXT: [AAPotentialValues] for CtxI ' %2 = load i32, ptr %0, align 4' at position {flt:checkAndAdvance [checkAndAdvance@-1]} with state set-state(< {@checkAndAdvance[3], } >) -; GRAPH-EMPTY: +; GRAPH-EMPTY: ; GRAPH-NEXT: [AAPotentialValues] for CtxI ' %6 = call ptr @checkAndAdvance(ptr %5)' at position {cs_arg: [@0]} with state set-state(< { %5 = getelementptr inbounds i32, ptr %0, i64 4[3], } >) -; GRAPH-EMPTY: +; GRAPH-EMPTY: ; GRAPH-NEXT: [AAInstanceInfo] for CtxI ' %5 = getelementptr inbounds i32, ptr %0, i64 4' at position {flt: [@-1]} with state ; GRAPH-EMPTY: ; GRAPH-NEXT: [AANoRecurse] for CtxI ' %2 = load i32, ptr %0, align 4' at position {fn:checkAndAdvance [checkAndAdvance@-1]} with state may-recurse Index: llvm/test/Transforms/Attributor/nofpclass.ll =================================================================== --- llvm/test/Transforms/Attributor/nofpclass.ll +++ llvm/test/Transforms/Attributor/nofpclass.ll @@ -208,9 +208,10 @@ } define void @nofpclass_call_use_after_unannotated_use(float %arg) { +; CHECK: Function Attrs: norecurse ; CHECK-LABEL: define void @nofpclass_call_use_after_unannotated_use -; CHECK-SAME: (float [[ARG:%.*]]) { -; CHECK-NEXT: call void @extern(float [[ARG]]) #[[ATTR13:[0-9]+]] +; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR4:[0-9]+]] { +; CHECK-NEXT: call void @extern(float [[ARG]]) #[[ATTR14:[0-9]+]] ; CHECK-NEXT: call void @extern(float nofpclass(nan inf) [[ARG]]) ; CHECK-NEXT: ret void ; @@ -222,7 +223,7 @@ define float @mutually_recursive0(float %arg) { ; TUNIT: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none) ; TUNIT-LABEL: define nofpclass(all) float @mutually_recursive0 -; TUNIT-SAME: (float [[ARG:%.*]]) #[[ATTR4:[0-9]+]] { +; TUNIT-SAME: (float [[ARG:%.*]]) #[[ATTR5:[0-9]+]] { ; TUNIT-NEXT: ret float undef ; ; CGSCC: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) @@ -237,7 +238,7 @@ define float @mutually_recursive1(float %arg) { ; TUNIT: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none) ; TUNIT-LABEL: define nofpclass(all) float @mutually_recursive1 -; TUNIT-SAME: (float [[ARG:%.*]]) #[[ATTR4]] { +; TUNIT-SAME: (float [[ARG:%.*]]) #[[ATTR5]] { ; TUNIT-NEXT: ret float undef ; ; CGSCC: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) @@ -333,7 +334,7 @@ ; CHECK-SAME: (float returned nofpclass(nan) [[ARG:%.*]]) { ; CHECK-NEXT: entry: ; CHECK-NEXT: [[IS_NOT_NAN:%.*]] = fcmp ord float [[ARG]], 0.000000e+00 -; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NOT_NAN]]) #[[ATTR14:[0-9]+]] +; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NOT_NAN]]) #[[ATTR15:[0-9]+]] ; CHECK-NEXT: call void @extern.use(float nofpclass(nan) [[ARG]]) ; CHECK-NEXT: ret float [[ARG]] ; @@ -377,13 +378,13 @@ ; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; TUNIT-LABEL: define float @call_noinf_0 ; TUNIT-SAME: (float nofpclass(inf) [[ARG:%.*]]) #[[ATTR3]] { -; TUNIT-NEXT: [[RESULT:%.*]] = call float @only_nofpclass_inf_callers(float nofpclass(inf) [[ARG]]) #[[ATTR15:[0-9]+]] +; TUNIT-NEXT: [[RESULT:%.*]] = call float @only_nofpclass_inf_callers(float nofpclass(inf) [[ARG]]) #[[ATTR16:[0-9]+]] ; TUNIT-NEXT: ret float [[RESULT]] ; ; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none) ; CGSCC-LABEL: define float @call_noinf_0 -; CGSCC-SAME: (float nofpclass(inf) [[ARG:%.*]]) #[[ATTR4:[0-9]+]] { -; CGSCC-NEXT: [[RESULT:%.*]] = call float @only_nofpclass_inf_callers(float nofpclass(inf) [[ARG]]) #[[ATTR14]] +; CGSCC-SAME: (float nofpclass(inf) [[ARG:%.*]]) #[[ATTR5:[0-9]+]] { +; CGSCC-NEXT: [[RESULT:%.*]] = call float @only_nofpclass_inf_callers(float nofpclass(inf) [[ARG]]) #[[ATTR15]] ; CGSCC-NEXT: ret float [[RESULT]] ; %result = call float @only_nofpclass_inf_callers(float %arg) @@ -394,13 +395,13 @@ ; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; TUNIT-LABEL: define float @call_noinf_1 ; TUNIT-SAME: (float [[ARG:%.*]]) #[[ATTR3]] { -; TUNIT-NEXT: [[RESULT:%.*]] = call float @only_nofpclass_inf_callers(float nofpclass(inf) [[ARG]]) #[[ATTR15]] +; TUNIT-NEXT: [[RESULT:%.*]] = call float @only_nofpclass_inf_callers(float nofpclass(inf) [[ARG]]) #[[ATTR16]] ; TUNIT-NEXT: ret float [[RESULT]] ; ; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none) ; CGSCC-LABEL: define float @call_noinf_1 -; CGSCC-SAME: (float [[ARG:%.*]]) #[[ATTR4]] { -; CGSCC-NEXT: [[RESULT:%.*]] = call float @only_nofpclass_inf_callers(float nofpclass(inf) [[ARG]]) #[[ATTR14]] +; CGSCC-SAME: (float [[ARG:%.*]]) #[[ATTR5]] { +; CGSCC-NEXT: [[RESULT:%.*]] = call float @only_nofpclass_inf_callers(float nofpclass(inf) [[ARG]]) #[[ATTR15]] ; CGSCC-NEXT: ret float [[RESULT]] ; %result = call float @only_nofpclass_inf_callers(float nofpclass(inf) %arg) @@ -423,13 +424,13 @@ ; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; TUNIT-LABEL: define nofpclass(inf) float @call_noinf_return_0 ; TUNIT-SAME: (float [[ARG:%.*]]) #[[ATTR3]] { -; TUNIT-NEXT: [[RESULT:%.*]] = call nofpclass(inf) float @only_nofpclass_inf_return_users(float [[ARG]]) #[[ATTR15]] +; TUNIT-NEXT: [[RESULT:%.*]] = call nofpclass(inf) float @only_nofpclass_inf_return_users(float [[ARG]]) #[[ATTR16]] ; TUNIT-NEXT: ret float [[RESULT]] ; ; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none) ; CGSCC-LABEL: define nofpclass(inf) float @call_noinf_return_0 -; CGSCC-SAME: (float [[ARG:%.*]]) #[[ATTR4]] { -; CGSCC-NEXT: [[RESULT:%.*]] = call nofpclass(inf) float @only_nofpclass_inf_return_users(float [[ARG]]) #[[ATTR14]] +; CGSCC-SAME: (float [[ARG:%.*]]) #[[ATTR5]] { +; CGSCC-NEXT: [[RESULT:%.*]] = call nofpclass(inf) float @only_nofpclass_inf_return_users(float [[ARG]]) #[[ATTR15]] ; CGSCC-NEXT: ret float [[RESULT]] ; %result = call nofpclass(inf) float @only_nofpclass_inf_return_users(float %arg) @@ -440,13 +441,13 @@ ; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; TUNIT-LABEL: define nofpclass(inf) float @call_noinf_return_1 ; TUNIT-SAME: (float [[ARG:%.*]]) #[[ATTR3]] { -; TUNIT-NEXT: [[RESULT:%.*]] = call nofpclass(inf) float @only_nofpclass_inf_return_users(float [[ARG]]) #[[ATTR15]] +; TUNIT-NEXT: [[RESULT:%.*]] = call nofpclass(inf) float @only_nofpclass_inf_return_users(float [[ARG]]) #[[ATTR16]] ; TUNIT-NEXT: ret float [[RESULT]] ; ; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none) ; CGSCC-LABEL: define nofpclass(inf) float @call_noinf_return_1 -; CGSCC-SAME: (float [[ARG:%.*]]) #[[ATTR4]] { -; CGSCC-NEXT: [[RESULT:%.*]] = call nofpclass(inf) float @only_nofpclass_inf_return_users(float [[ARG]]) #[[ATTR14]] +; CGSCC-SAME: (float [[ARG:%.*]]) #[[ATTR5]] { +; CGSCC-NEXT: [[RESULT:%.*]] = call nofpclass(inf) float @only_nofpclass_inf_return_users(float [[ARG]]) #[[ATTR15]] ; CGSCC-NEXT: ret float [[RESULT]] ; %result = call nofpclass(inf) float @only_nofpclass_inf_return_users(float %arg) @@ -458,7 +459,7 @@ ; CHECK-SAME: (float returned nofpclass(nan zero) [[ARG:%.*]]) { ; CHECK-NEXT: entry: ; CHECK-NEXT: [[IS_NOT_ZERO_OR_NAN:%.*]] = fcmp one float [[ARG]], 0.000000e+00 -; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NOT_ZERO_OR_NAN]]) #[[ATTR14]] +; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NOT_ZERO_OR_NAN]]) #[[ATTR15]] ; CHECK-NEXT: call void @extern.use(float nofpclass(nan zero) [[ARG]]) ; CHECK-NEXT: ret float [[ARG]] ; @@ -474,7 +475,7 @@ ; CHECK-SAME: (float returned nofpclass(zero) [[ARG:%.*]]) { ; CHECK-NEXT: entry: ; CHECK-NEXT: [[IS_NOT_ZERO_OR_NAN:%.*]] = fcmp une float [[ARG]], 0.000000e+00 -; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NOT_ZERO_OR_NAN]]) #[[ATTR14]] +; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NOT_ZERO_OR_NAN]]) #[[ATTR15]] ; CHECK-NEXT: call void @extern.use(float nofpclass(zero) [[ARG]]) ; CHECK-NEXT: ret float [[ARG]] ; @@ -489,9 +490,9 @@ ; CHECK-LABEL: define nofpclass(nan inf norm) half @fcmp_assume_issubnormal_callsite_arg_return ; CHECK-SAME: (half returned nofpclass(nan inf norm) [[ARG:%.*]]) { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) half @llvm.fabs.f16(half nofpclass(nan inf norm) [[ARG]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) half @llvm.fabs.f16(half nofpclass(nan inf norm) [[ARG]]) #[[ATTR15]] ; CHECK-NEXT: [[IS_SUBNORMAL:%.*]] = fcmp olt half [[FABS]], 0xH0400 -; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_SUBNORMAL]]) #[[ATTR14]] +; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_SUBNORMAL]]) #[[ATTR15]] ; CHECK-NEXT: call void @extern.use.f16(half nofpclass(nan inf norm) [[ARG]]) ; CHECK-NEXT: ret half [[ARG]] ; @@ -525,11 +526,11 @@ ; CHECK-LABEL: define nofpclass(nan ninf zero sub norm) half @fcmp_assume2_callsite_arg_return ; CHECK-SAME: (half returned nofpclass(nan ninf zero sub norm) [[ARG:%.*]]) { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf zero sub norm) half @llvm.fabs.f16(half nofpclass(nan ninf zero sub norm) [[ARG]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf zero sub norm) half @llvm.fabs.f16(half nofpclass(nan ninf zero sub norm) [[ARG]]) #[[ATTR15]] ; CHECK-NEXT: [[NOT_SUBNORMAL_OR_ZERO:%.*]] = fcmp oge half [[FABS]], 0xH0400 -; CHECK-NEXT: call void @llvm.assume(i1 noundef [[NOT_SUBNORMAL_OR_ZERO]]) #[[ATTR14]] +; CHECK-NEXT: call void @llvm.assume(i1 noundef [[NOT_SUBNORMAL_OR_ZERO]]) #[[ATTR15]] ; CHECK-NEXT: [[NOT_INF:%.*]] = fcmp oeq half [[ARG]], 0xH7C00 -; CHECK-NEXT: call void @llvm.assume(i1 noundef [[NOT_INF]]) #[[ATTR14]] +; CHECK-NEXT: call void @llvm.assume(i1 noundef [[NOT_INF]]) #[[ATTR15]] ; CHECK-NEXT: call void @extern.use.f16(half nofpclass(nan ninf zero sub norm) [[ARG]]) ; CHECK-NEXT: ret half [[ARG]] ; @@ -549,8 +550,8 @@ ; CHECK-LABEL: define nofpclass(nan pinf pzero sub nnorm) float @is_fpclass_assume_arg_return ; CHECK-SAME: (float returned nofpclass(nan pinf pzero sub nnorm) [[ARG:%.*]]) { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[CLASS_TEST:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(nan pinf pzero sub nnorm) [[ARG]], i32 noundef 292) #[[ATTR14]] -; CHECK-NEXT: call void @llvm.assume(i1 noundef [[CLASS_TEST]]) #[[ATTR14]] +; CHECK-NEXT: [[CLASS_TEST:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(nan pinf pzero sub nnorm) [[ARG]], i32 noundef 292) #[[ATTR15]] +; CHECK-NEXT: call void @llvm.assume(i1 noundef [[CLASS_TEST]]) #[[ATTR15]] ; CHECK-NEXT: call void @extern.use(float nofpclass(nan pinf pzero sub nnorm) [[ARG]]) ; CHECK-NEXT: ret float [[ARG]] ; @@ -567,11 +568,11 @@ ; CHECK-LABEL: define nofpclass(nan inf norm) half @assume_fcmp_fabs_with_other_fabs_assume ; CHECK-SAME: (half returned nofpclass(nan inf norm) [[ARG:%.*]]) { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan inf zero nsub norm) half @llvm.fabs.f16(half nofpclass(nan inf norm) [[ARG]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan inf zero nsub norm) half @llvm.fabs.f16(half nofpclass(nan inf norm) [[ARG]]) #[[ATTR15]] ; CHECK-NEXT: [[UNRELATED_FABS:%.*]] = fcmp one half [[FABS]], 0xH0000 -; CHECK-NEXT: call void @llvm.assume(i1 noundef [[UNRELATED_FABS]]) #[[ATTR14]] +; CHECK-NEXT: call void @llvm.assume(i1 noundef [[UNRELATED_FABS]]) #[[ATTR15]] ; CHECK-NEXT: [[IS_SUBNORMAL:%.*]] = fcmp olt half [[FABS]], 0xH0400 -; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_SUBNORMAL]]) #[[ATTR14]] +; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_SUBNORMAL]]) #[[ATTR15]] ; CHECK-NEXT: call void @extern.use.f16(half nofpclass(nan inf norm) [[ARG]]) ; CHECK-NEXT: call void @extern.use.f16(half nofpclass(nan inf zero nsub norm) [[FABS]]) ; CHECK-NEXT: ret half [[ARG]] @@ -594,13 +595,13 @@ ; CHECK-LABEL: define nofpclass(all) half @assume_fcmp_fabs_with_other_fabs_assume_fallback ; CHECK-SAME: (half returned nofpclass(all) [[ARG:%.*]]) { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[FABS:%.*]] = call half @llvm.fabs.f16(half nofpclass(all) [[ARG]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call half @llvm.fabs.f16(half nofpclass(all) [[ARG]]) #[[ATTR15]] ; CHECK-NEXT: [[ONE_INF:%.*]] = fcmp oeq half [[ARG]], 0xH7C00 -; CHECK-NEXT: call void @llvm.assume(i1 noundef [[ONE_INF]]) #[[ATTR14]] +; CHECK-NEXT: call void @llvm.assume(i1 noundef [[ONE_INF]]) #[[ATTR15]] ; CHECK-NEXT: [[UNRELATED_FABS:%.*]] = fcmp oeq half [[FABS]], 0xH0000 -; CHECK-NEXT: call void @llvm.assume(i1 noundef [[UNRELATED_FABS]]) #[[ATTR14]] +; CHECK-NEXT: call void @llvm.assume(i1 noundef [[UNRELATED_FABS]]) #[[ATTR15]] ; CHECK-NEXT: [[IS_SUBNORMAL:%.*]] = fcmp olt half [[FABS]], 0xH0400 -; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_SUBNORMAL]]) #[[ATTR14]] +; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_SUBNORMAL]]) #[[ATTR15]] ; CHECK-NEXT: call void @extern.use.f16(half nofpclass(all) [[ARG]]) ; CHECK-NEXT: call void @extern.use.f16(half nofpclass(all) [[FABS]]) ; CHECK-NEXT: ret half [[ARG]] @@ -628,7 +629,7 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]] ; CHECK: A: -; CHECK-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR14]] [ "nofpclass"(float [[RET]], i32 3) ] +; CHECK-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR15]] [ "nofpclass"(float [[RET]], i32 3) ] ; CHECK-NEXT: call void @extern.use(float nofpclass(nan) [[RET]]) ; CHECK-NEXT: ret float [[RET]] ; CHECK: B: @@ -653,7 +654,7 @@ define float @returned_load(ptr %ptr) { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) ; CHECK-LABEL: define float @returned_load -; CHECK-SAME: (ptr nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[PTR:%.*]]) #[[ATTR5:[0-9]+]] { +; CHECK-SAME: (ptr nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[PTR:%.*]]) #[[ATTR6:[0-9]+]] { ; CHECK-NEXT: [[LOAD:%.*]] = load float, ptr [[PTR]], align 4 ; CHECK-NEXT: ret float [[LOAD]] ; @@ -667,15 +668,15 @@ ; TUNIT-SAME: (float nofpclass(inf) [[ARG:%.*]]) #[[ATTR3]] { ; TUNIT-NEXT: [[ALLOCA:%.*]] = alloca float, align 4 ; TUNIT-NEXT: store float [[ARG]], ptr [[ALLOCA]], align 4 -; TUNIT-NEXT: [[RET:%.*]] = call float @returned_load(ptr noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[ALLOCA]]) #[[ATTR16:[0-9]+]] +; TUNIT-NEXT: [[RET:%.*]] = call float @returned_load(ptr noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[ALLOCA]]) #[[ATTR17:[0-9]+]] ; TUNIT-NEXT: ret float [[RET]] ; ; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none) ; CGSCC-LABEL: define float @pass_nofpclass_inf_through_memory -; CGSCC-SAME: (float nofpclass(inf) [[ARG:%.*]]) #[[ATTR4]] { +; CGSCC-SAME: (float nofpclass(inf) [[ARG:%.*]]) #[[ATTR5]] { ; CGSCC-NEXT: [[ALLOCA:%.*]] = alloca float, align 4 ; CGSCC-NEXT: store float [[ARG]], ptr [[ALLOCA]], align 4 -; CGSCC-NEXT: [[RET:%.*]] = call float @returned_load(ptr noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[ALLOCA]]) #[[ATTR15:[0-9]+]] +; CGSCC-NEXT: [[RET:%.*]] = call float @returned_load(ptr noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[ALLOCA]]) #[[ATTR16:[0-9]+]] ; CGSCC-NEXT: ret float [[RET]] ; %alloca = alloca float @@ -688,7 +689,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @returned_fabs ; CHECK-SAME: (float [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float [[X]]) #[[ATTR15]] ; CHECK-NEXT: ret float [[FABS]] ; %fabs = call float @llvm.fabs.f32(float %x) @@ -699,7 +700,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(snan ninf nzero nsub nnorm) float @returned_fabs_nosnan ; CHECK-SAME: (float nofpclass(snan) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(snan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(snan) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(snan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(snan) [[X]]) #[[ATTR15]] ; CHECK-NEXT: ret float [[FABS]] ; %fabs = call float @llvm.fabs.f32(float %x) @@ -710,7 +711,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(qnan ninf nzero nsub nnorm) float @returned_fabs_noqnan ; CHECK-SAME: (float nofpclass(qnan) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(qnan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(qnan) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(qnan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(qnan) [[X]]) #[[ATTR15]] ; CHECK-NEXT: ret float [[FABS]] ; %fabs = call float @llvm.fabs.f32(float %x) @@ -721,7 +722,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(nan ninf nzero nsub nnorm) float @returned_fabs_nonan ; CHECK-SAME: (float nofpclass(nan) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nan) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nan) [[X]]) #[[ATTR15]] ; CHECK-NEXT: ret float [[FABS]] ; %fabs = call float @llvm.fabs.f32(float %x) @@ -732,7 +733,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(inf nzero nsub nnorm) float @returned_fabs_noinf ; CHECK-SAME: (float nofpclass(inf) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(inf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(inf) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(inf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(inf) [[X]]) #[[ATTR15]] ; CHECK-NEXT: ret float [[FABS]] ; %fabs = call float @llvm.fabs.f32(float %x) @@ -743,7 +744,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @returned_fabs_nopos ; CHECK-SAME: (float nofpclass(pinf psub pnorm) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pinf psub pnorm) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pinf psub pnorm) [[X]]) #[[ATTR15]] ; CHECK-NEXT: ret float [[FABS]] ; %fabs = call float @llvm.fabs.f32(float %x) @@ -754,7 +755,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @returned_fabs_nopos_nopzero ; CHECK-SAME: (float nofpclass(pinf pzero psub pnorm) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pinf pzero psub pnorm) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pinf pzero psub pnorm) [[X]]) #[[ATTR15]] ; CHECK-NEXT: ret float [[FABS]] ; %fabs = call float @llvm.fabs.f32(float %x) @@ -765,7 +766,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(ninf zero nsub nnorm) float @returned_fabs_nopos_nozero ; CHECK-SAME: (float nofpclass(pinf zero psub pnorm) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf zero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pinf zero psub pnorm) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf zero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pinf zero psub pnorm) [[X]]) #[[ATTR15]] ; CHECK-NEXT: ret float [[FABS]] ; %fabs = call float @llvm.fabs.f32(float %x) @@ -776,7 +777,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(nan ninf nzero nsub nnorm) float @returned_fabs_nopos_nonan ; CHECK-SAME: (float nofpclass(nan pinf psub pnorm) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nan pinf psub pnorm) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nan pinf psub pnorm) [[X]]) #[[ATTR15]] ; CHECK-NEXT: ret float [[FABS]] ; %fabs = call float @llvm.fabs.f32(float %x) @@ -787,7 +788,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @returned_fabs_noneg ; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(ninf nsub nnorm) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(ninf nsub nnorm) [[X]]) #[[ATTR15]] ; CHECK-NEXT: ret float [[FABS]] ; %fabs = call float @llvm.fabs.f32(float %x) @@ -798,7 +799,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @returned_fabs_noneg_nonzero ; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(ninf nzero nsub nnorm) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(ninf nzero nsub nnorm) [[X]]) #[[ATTR15]] ; CHECK-NEXT: ret float [[FABS]] ; %fabs = call float @llvm.fabs.f32(float %x) @@ -809,7 +810,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(ninf zero nsub nnorm) float @returned_fabs_noneg_nozero ; CHECK-SAME: (float nofpclass(ninf zero nsub nnorm) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf zero nsub nnorm) float @llvm.fabs.f32(float nofpclass(ninf zero nsub nnorm) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf zero nsub nnorm) float @llvm.fabs.f32(float nofpclass(ninf zero nsub nnorm) [[X]]) #[[ATTR15]] ; CHECK-NEXT: ret float [[FABS]] ; %fabs = call float @llvm.fabs.f32(float %x) @@ -820,7 +821,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(nan ninf nzero nsub nnorm) float @returned_fabs_noneg_nonan ; CHECK-SAME: (float nofpclass(nan ninf nsub nnorm) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nan ninf nsub nnorm) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nan ninf nsub nnorm) [[X]]) #[[ATTR15]] ; CHECK-NEXT: ret float [[FABS]] ; %fabs = call float @llvm.fabs.f32(float %x) @@ -831,7 +832,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @returned_fabs_nonsub_nopnorm_nonzero ; CHECK-SAME: (float nofpclass(nzero nsub pnorm) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nzero nsub pnorm) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nzero nsub pnorm) [[X]]) #[[ATTR15]] ; CHECK-NEXT: ret float [[FABS]] ; %fabs = call float @llvm.fabs.f32(float %x) @@ -842,7 +843,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @returned_fabs_nopsub_nonnorm_nopzero ; CHECK-SAME: (float nofpclass(pzero psub nnorm) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pzero psub nnorm) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pzero psub nnorm) [[X]]) #[[ATTR15]] ; CHECK-NEXT: ret float [[FABS]] ; %fabs = call float @llvm.fabs.f32(float %x) @@ -853,7 +854,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @returned_fabs_nonnorm_nozero ; CHECK-SAME: (float nofpclass(nzero nnorm) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nzero nnorm) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nzero nnorm) [[X]]) #[[ATTR15]] ; CHECK-NEXT: ret float [[FABS]] ; %fabs = call float @llvm.fabs.f32(float %x) @@ -996,7 +997,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(pinf pzero psub pnorm) float @returned_fneg_fabs ; CHECK-SAME: (float [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float [[X]]) #[[ATTR15]] ; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg float [[FABS]] ; CHECK-NEXT: ret float [[FNEG_FABS]] ; @@ -1009,7 +1010,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(snan pinf pzero psub pnorm) float @returned_fneg_fabs_nosnan ; CHECK-SAME: (float nofpclass(snan) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(snan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(snan) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(snan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(snan) [[X]]) #[[ATTR15]] ; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg float [[FABS]] ; CHECK-NEXT: ret float [[FNEG_FABS]] ; @@ -1022,7 +1023,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(qnan pinf pzero psub pnorm) float @returned_fneg_fabs_noqnan ; CHECK-SAME: (float nofpclass(qnan) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(qnan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(qnan) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(qnan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(qnan) [[X]]) #[[ATTR15]] ; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg float [[FABS]] ; CHECK-NEXT: ret float [[FNEG_FABS]] ; @@ -1035,7 +1036,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(nan pinf pzero psub pnorm) float @returned_fneg_fabs_nonan ; CHECK-SAME: (float nofpclass(nan) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nan) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nan) [[X]]) #[[ATTR15]] ; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg float [[FABS]] ; CHECK-NEXT: ret float [[FNEG_FABS]] ; @@ -1048,7 +1049,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(pinf pzero psub pnorm) float @returned_fneg_fabs_noneg ; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(ninf nzero nsub nnorm) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(ninf nzero nsub nnorm) [[X]]) #[[ATTR15]] ; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg float [[FABS]] ; CHECK-NEXT: ret float [[FNEG_FABS]] ; @@ -1061,7 +1062,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(pinf pzero psub pnorm) float @returned_fneg_fabs_nopos ; CHECK-SAME: (float nofpclass(pinf pzero psub pnorm) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pinf pzero psub pnorm) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pinf pzero psub pnorm) [[X]]) #[[ATTR15]] ; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg float [[FABS]] ; CHECK-NEXT: ret float [[FNEG_FABS]] ; @@ -1074,7 +1075,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(qnan pinf pzero psub pnorm) float @returned_fneg_fabs_mixed ; CHECK-SAME: (float nofpclass(qnan ninf nzero psub nnorm) [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(qnan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(qnan ninf nzero psub nnorm) [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(qnan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(qnan ninf nzero psub nnorm) [[X]]) #[[ATTR15]] ; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg float [[FABS]] ; CHECK-NEXT: ret float [[FNEG_FABS]] ; @@ -1087,7 +1088,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(inf pzero psub pnorm) float @returned_fneg_fabs_ninf_flag_fabs ; CHECK-SAME: (float [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call ninf nofpclass(inf nzero nsub nnorm) float @llvm.fabs.f32(float [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call ninf nofpclass(inf nzero nsub nnorm) float @llvm.fabs.f32(float [[X]]) #[[ATTR15]] ; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg float [[FABS]] ; CHECK-NEXT: ret float [[FNEG_FABS]] ; @@ -1100,7 +1101,7 @@ ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(inf pzero psub pnorm) float @returned_fneg_fabs_ninf_flag_fneg ; CHECK-SAME: (float [[X:%.*]]) #[[ATTR3]] { -; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float [[X]]) #[[ATTR14]] +; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float [[X]]) #[[ATTR15]] ; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg ninf float [[FABS]] ; CHECK-NEXT: ret float [[FNEG_FABS]] ; @@ -1202,9 +1203,9 @@ ; CHECK-SAME: (float returned nofpclass(nan zero) [[ARG:%.*]]) { ; CHECK-NEXT: entry: ; CHECK-NEXT: [[IS_NOT_ZERO_OR_NAN:%.*]] = fcmp une float [[ARG]], 0.000000e+00 -; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NOT_ZERO_OR_NAN]]) #[[ATTR14]] +; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NOT_ZERO_OR_NAN]]) #[[ATTR15]] ; CHECK-NEXT: [[IS_ORD:%.*]] = fcmp ord float [[ARG]], 0.000000e+00 -; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_ORD]]) #[[ATTR14]] +; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_ORD]]) #[[ATTR15]] ; CHECK-NEXT: call void @extern.use(float nofpclass(nan zero) [[ARG]]) ; CHECK-NEXT: ret float [[ARG]] ; @@ -1221,10 +1222,10 @@ ; CHECK-LABEL: define nofpclass(nan inf zero sub nnorm) float @assume_intersection_class ; CHECK-SAME: (float returned nofpclass(nan inf zero sub nnorm) [[ARG:%.*]]) { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[POS_NORMAL_OR_POS_SUBNORMAL:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(nan inf zero sub nnorm) [[ARG]], i32 noundef 384) #[[ATTR14]] -; CHECK-NEXT: call void @llvm.assume(i1 noundef [[POS_NORMAL_OR_POS_SUBNORMAL]]) #[[ATTR14]] -; CHECK-NEXT: [[IS_NORMAL:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(nan inf zero sub nnorm) [[ARG]], i32 noundef 264) #[[ATTR14]] -; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NORMAL]]) #[[ATTR14]] +; CHECK-NEXT: [[POS_NORMAL_OR_POS_SUBNORMAL:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(nan inf zero sub nnorm) [[ARG]], i32 noundef 384) #[[ATTR15]] +; CHECK-NEXT: call void @llvm.assume(i1 noundef [[POS_NORMAL_OR_POS_SUBNORMAL]]) #[[ATTR15]] +; CHECK-NEXT: [[IS_NORMAL:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(nan inf zero sub nnorm) [[ARG]], i32 noundef 264) #[[ATTR15]] +; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NORMAL]]) #[[ATTR15]] ; CHECK-NEXT: call void @extern.use(float nofpclass(nan inf zero sub nnorm) [[ARG]]) ; CHECK-NEXT: ret float [[ARG]] ; @@ -1242,10 +1243,10 @@ ; CHECK-LABEL: define nofpclass(all) float @assume_intersection_none ; CHECK-SAME: (float returned nofpclass(all) [[ARG:%.*]]) { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(all) [[ARG]], i32 noundef 682) #[[ATTR14]] -; CHECK-NEXT: call void @llvm.assume(i1 noundef [[CLASS1]]) #[[ATTR14]] -; CHECK-NEXT: [[CLASS2:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(all) [[ARG]], i32 noundef 341) #[[ATTR14]] -; CHECK-NEXT: call void @llvm.assume(i1 noundef [[CLASS2]]) #[[ATTR14]] +; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(all) [[ARG]], i32 noundef 682) #[[ATTR15]] +; CHECK-NEXT: call void @llvm.assume(i1 noundef [[CLASS1]]) #[[ATTR15]] +; CHECK-NEXT: [[CLASS2:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(all) [[ARG]], i32 noundef 341) #[[ATTR15]] +; CHECK-NEXT: call void @llvm.assume(i1 noundef [[CLASS2]]) #[[ATTR15]] ; CHECK-NEXT: call void @extern.use(float nofpclass(all) [[ARG]]) ; CHECK-NEXT: ret float [[ARG]] ; @@ -1615,8 +1616,8 @@ define float @constrained_sitofp(i32 %arg) strictfp { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite) ; CHECK-LABEL: define nofpclass(nan nzero sub) float @constrained_sitofp -; CHECK-SAME: (i32 [[ARG:%.*]]) #[[ATTR6:[0-9]+]] { -; CHECK-NEXT: [[VAL:%.*]] = call nofpclass(nan nzero sub) float @llvm.experimental.constrained.sitofp.f32.i32(i32 [[ARG]], metadata !"round.dynamic", metadata !"fpexcept.strict") #[[ATTR14]] +; CHECK-SAME: (i32 [[ARG:%.*]]) #[[ATTR7:[0-9]+]] { +; CHECK-NEXT: [[VAL:%.*]] = call nofpclass(nan nzero sub) float @llvm.experimental.constrained.sitofp.f32.i32(i32 [[ARG]], metadata !"round.dynamic", metadata !"fpexcept.strict") #[[ATTR15]] ; CHECK-NEXT: ret float [[VAL]] ; %val = call float @llvm.experimental.constrained.sitofp.f32.i32(i32 %arg, metadata !"round.dynamic", metadata !"fpexcept.strict") @@ -1626,8 +1627,8 @@ define float @constrained_uitofp(i32 %arg) strictfp { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite) ; CHECK-LABEL: define nofpclass(nan ninf nzero sub nnorm) float @constrained_uitofp -; CHECK-SAME: (i32 [[ARG:%.*]]) #[[ATTR6]] { -; CHECK-NEXT: [[VAL:%.*]] = call nofpclass(nan ninf nzero sub nnorm) float @llvm.experimental.constrained.uitofp.f32.i32(i32 [[ARG]], metadata !"round.dynamic", metadata !"fpexcept.strict") #[[ATTR14]] +; CHECK-SAME: (i32 [[ARG:%.*]]) #[[ATTR7]] { +; CHECK-NEXT: [[VAL:%.*]] = call nofpclass(nan ninf nzero sub nnorm) float @llvm.experimental.constrained.uitofp.f32.i32(i32 [[ARG]], metadata !"round.dynamic", metadata !"fpexcept.strict") #[[ATTR15]] ; CHECK-NEXT: ret float [[VAL]] ; %val = call float @llvm.experimental.constrained.uitofp.f32.i32(i32 %arg, metadata !"round.dynamic", metadata !"fpexcept.strict") @@ -1703,7 +1704,7 @@ define float @fadd_p0_ftz_daz(float %arg0) #3 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(nzero) float @fadd_p0_ftz_daz -; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR7:[0-9]+]] { +; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR8:[0-9]+]] { ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], 0.000000e+00 ; CHECK-NEXT: ret float [[ADD]] ; @@ -1714,7 +1715,7 @@ define float @fadd_n0_ftz_daz(float %arg0) #0 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define float @fadd_n0_ftz_daz -; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR8:[0-9]+]] { +; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR9:[0-9]+]] { ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], -0.000000e+00 ; CHECK-NEXT: ret float [[ADD]] ; @@ -1725,7 +1726,7 @@ define float @fsub_p0_ftz_daz(float %arg0) #0 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define float @fsub_p0_ftz_daz -; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR8]] { +; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR9]] { ; CHECK-NEXT: [[SUB:%.*]] = fsub float [[ARG0]], 0.000000e+00 ; CHECK-NEXT: ret float [[SUB]] ; @@ -1736,7 +1737,7 @@ define float @fsub_n0_ftz_daz(float %arg0) #0 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define float @fsub_n0_ftz_daz -; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR8]] { +; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR9]] { ; CHECK-NEXT: [[SUB:%.*]] = fsub float [[ARG0]], -0.000000e+00 ; CHECK-NEXT: ret float [[SUB]] ; @@ -1747,7 +1748,7 @@ define float @fsub_p0_commute_ftz_daz(float %arg0) #0 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define float @fsub_p0_commute_ftz_daz -; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR8]] { +; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR9]] { ; CHECK-NEXT: [[SUB:%.*]] = fsub float 0.000000e+00, [[ARG0]] ; CHECK-NEXT: ret float [[SUB]] ; @@ -1758,7 +1759,7 @@ define float @fsub_n0_commute_ftz_daz(float %arg0) #0 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define float @fsub_n0_commute_ftz_daz -; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR8]] { +; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR9]] { ; CHECK-NEXT: [[SUB:%.*]] = fsub float -0.000000e+00, [[ARG0]] ; CHECK-NEXT: ret float [[SUB]] ; @@ -1769,7 +1770,7 @@ define float @fadd_p0_ieee_daz(float %arg0) #2 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(nzero) float @fadd_p0_ieee_daz -; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR9:[0-9]+]] { +; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR10:[0-9]+]] { ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], 0.000000e+00 ; CHECK-NEXT: ret float [[ADD]] ; @@ -1780,7 +1781,7 @@ define float @fadd_p0_dapz_ieee(float %arg0) #4 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(nzero) float @fadd_p0_dapz_ieee -; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR10:[0-9]+]] { +; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR11:[0-9]+]] { ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], 0.000000e+00 ; CHECK-NEXT: ret float [[ADD]] ; @@ -1791,7 +1792,7 @@ define float @fadd_n0_ieee_daz(float %arg0) #2 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define float @fadd_n0_ieee_daz -; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR9]] { +; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR10]] { ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], -0.000000e+00 ; CHECK-NEXT: ret float [[ADD]] ; @@ -1802,7 +1803,7 @@ define float @fsub_p0_ieee_daz(float %arg0) #2 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define float @fsub_p0_ieee_daz -; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR9]] { +; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR10]] { ; CHECK-NEXT: [[SUB:%.*]] = fsub float [[ARG0]], 0.000000e+00 ; CHECK-NEXT: ret float [[SUB]] ; @@ -1813,7 +1814,7 @@ define float @fsub_n0_ieee_daz(float %arg0) #2 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(nzero) float @fsub_n0_ieee_daz -; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR9]] { +; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR10]] { ; CHECK-NEXT: [[SUB:%.*]] = fsub float [[ARG0]], -0.000000e+00 ; CHECK-NEXT: ret float [[SUB]] ; @@ -1824,7 +1825,7 @@ define float @fsub_p0_commute_ieee_daz(float %arg0) #2 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(nzero) float @fsub_p0_commute_ieee_daz -; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR9]] { +; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR10]] { ; CHECK-NEXT: [[SUB:%.*]] = fsub float 0.000000e+00, [[ARG0]] ; CHECK-NEXT: ret float [[SUB]] ; @@ -1835,7 +1836,7 @@ define float @fsub_n0_commute_ieee_daz(float %arg0) #1 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define float @fsub_n0_commute_ieee_daz -; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR11:[0-9]+]] { +; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR12:[0-9]+]] { ; CHECK-NEXT: [[SUB:%.*]] = fsub float -0.000000e+00, [[ARG0]] ; CHECK-NEXT: ret float [[SUB]] ; @@ -1857,7 +1858,7 @@ define float @fadd_never_negzero_or_negsub_daz(float nofpclass(nzero nsub) %a, float nofpclass(nzero nsub) %b) #2 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(nzero) float @fadd_never_negzero_or_negsub_daz -; CHECK-SAME: (float nofpclass(nzero nsub) [[A:%.*]], float nofpclass(nzero nsub) [[B:%.*]]) #[[ATTR9]] { +; CHECK-SAME: (float nofpclass(nzero nsub) [[A:%.*]], float nofpclass(nzero nsub) [[B:%.*]]) #[[ATTR10]] { ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[A]], [[B]] ; CHECK-NEXT: ret float [[ADD]] ; @@ -1868,7 +1869,7 @@ define float @fadd_never_negzero_or_negsub_dapz(float nofpclass(nzero nsub) %a, float nofpclass(nzero nsub) %b) #5 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(nzero) float @fadd_never_negzero_or_negsub_dapz -; CHECK-SAME: (float nofpclass(nzero nsub) [[A:%.*]], float nofpclass(nzero nsub) [[B:%.*]]) #[[ATTR12:[0-9]+]] { +; CHECK-SAME: (float nofpclass(nzero nsub) [[A:%.*]], float nofpclass(nzero nsub) [[B:%.*]]) #[[ATTR13:[0-9]+]] { ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[A]], [[B]] ; CHECK-NEXT: ret float [[ADD]] ; @@ -1890,7 +1891,7 @@ define float @fadd_never_negzero_or_possub_daz(float nofpclass(nzero psub) %a, float nofpclass(nzero psub) %b) #2 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define float @fadd_never_negzero_or_possub_daz -; CHECK-SAME: (float nofpclass(nzero psub) [[A:%.*]], float nofpclass(nzero psub) [[B:%.*]]) #[[ATTR9]] { +; CHECK-SAME: (float nofpclass(nzero psub) [[A:%.*]], float nofpclass(nzero psub) [[B:%.*]]) #[[ATTR10]] { ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[A]], [[B]] ; CHECK-NEXT: ret float [[ADD]] ; @@ -1901,7 +1902,7 @@ define float @fadd_never_negzero_or_possub_dapz(float nofpclass(nzero psub) %a, float nofpclass(nzero psub) %b) #5 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(nzero) float @fadd_never_negzero_or_possub_dapz -; CHECK-SAME: (float nofpclass(nzero psub) [[A:%.*]], float nofpclass(nzero psub) [[B:%.*]]) #[[ATTR12]] { +; CHECK-SAME: (float nofpclass(nzero psub) [[A:%.*]], float nofpclass(nzero psub) [[B:%.*]]) #[[ATTR13]] { ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[A]], [[B]] ; CHECK-NEXT: ret float [[ADD]] ; @@ -1912,7 +1913,7 @@ define float @fadd_never_negzero_or_sub_daz(float nofpclass(nzero sub) %a, float nofpclass(nzero sub) %b) #2 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(nzero) float @fadd_never_negzero_or_sub_daz -; CHECK-SAME: (float nofpclass(nzero sub) [[A:%.*]], float nofpclass(nzero sub) [[B:%.*]]) #[[ATTR9]] { +; CHECK-SAME: (float nofpclass(nzero sub) [[A:%.*]], float nofpclass(nzero sub) [[B:%.*]]) #[[ATTR10]] { ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[A]], [[B]] ; CHECK-NEXT: ret float [[ADD]] ; @@ -1923,7 +1924,7 @@ define float @fadd_never_negzero_or_sub_dapz(float nofpclass(nzero sub) %a, float nofpclass(nzero sub) %b) #5 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(nzero) float @fadd_never_negzero_or_sub_dapz -; CHECK-SAME: (float nofpclass(nzero sub) [[A:%.*]], float nofpclass(nzero sub) [[B:%.*]]) #[[ATTR12]] { +; CHECK-SAME: (float nofpclass(nzero sub) [[A:%.*]], float nofpclass(nzero sub) [[B:%.*]]) #[[ATTR13]] { ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[A]], [[B]] ; CHECK-NEXT: ret float [[ADD]] ; @@ -1967,7 +1968,7 @@ define float @fadd_known_positive_daz(float nofpclass(ninf nsub nnorm) %arg0, float nofpclass(ninf nsub nnorm) %arg1) #0 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(ninf nsub nnorm) float @fadd_known_positive_daz -; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nsub nnorm) [[ARG1:%.*]]) #[[ATTR8]] { +; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nsub nnorm) [[ARG1:%.*]]) #[[ATTR9]] { ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[ADD]] ; @@ -2011,7 +2012,7 @@ define float @fadd_known_positive_nzero_ftz_daz(float nofpclass(ninf nsub nnorm nzero) %arg0, float nofpclass(ninf nsub nnorm nzero) %arg1) #0 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(ninf nsub nnorm) float @fadd_known_positive_nzero_ftz_daz -; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nsub nnorm) [[ARG1:%.*]]) #[[ATTR8]] { +; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nsub nnorm) [[ARG1:%.*]]) #[[ATTR9]] { ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[ADD]] ; @@ -2022,7 +2023,7 @@ define float @fadd_known_positive_nzero_ftz(float nofpclass(ninf nsub nnorm nzero) %arg0, float nofpclass(ninf nsub nnorm nzero) %arg1) #1 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(ninf nsub nnorm) float @fadd_known_positive_nzero_ftz -; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nsub nnorm) [[ARG1:%.*]]) #[[ATTR11]] { +; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nsub nnorm) [[ARG1:%.*]]) #[[ATTR12]] { ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[ADD]] ; @@ -2033,7 +2034,7 @@ define float @fadd_known_positive_nzero_daz(float nofpclass(ninf nsub nnorm nzero) %arg0, float nofpclass(ninf nsub nnorm nzero) %arg1) #2 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @fadd_known_positive_nzero_daz -; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nsub nnorm) [[ARG1:%.*]]) #[[ATTR9]] { +; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nsub nnorm) [[ARG1:%.*]]) #[[ATTR10]] { ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[ADD]] ; @@ -2055,7 +2056,7 @@ define float @fadd_known_positive_normal_daz(float nofpclass(ninf nnorm nzero) %arg0, float nofpclass(ninf nnorm nzero) %arg1) #0 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define float @fadd_known_positive_normal_daz -; CHECK-SAME: (float nofpclass(ninf nzero nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nnorm) [[ARG1:%.*]]) #[[ATTR8]] { +; CHECK-SAME: (float nofpclass(ninf nzero nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nnorm) [[ARG1:%.*]]) #[[ATTR9]] { ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[ADD]] ; @@ -2066,7 +2067,7 @@ define float @fadd_known_positive_normal_except0_daz(float nofpclass(ninf nnorm) %arg0, float nofpclass(ninf nnorm) %arg1) #0 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define float @fadd_known_positive_normal_except0_daz -; CHECK-SAME: (float nofpclass(ninf nnorm) [[ARG0:%.*]], float nofpclass(ninf nnorm) [[ARG1:%.*]]) #[[ATTR8]] { +; CHECK-SAME: (float nofpclass(ninf nnorm) [[ARG0:%.*]], float nofpclass(ninf nnorm) [[ARG1:%.*]]) #[[ATTR9]] { ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[ADD]] ; @@ -2077,7 +2078,7 @@ define float @fadd_known_positive_normal_dapz(float nofpclass(ninf nnorm nzero) %arg0, float nofpclass(ninf nnorm nzero) %arg1) #3 { ; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; CHECK-LABEL: define nofpclass(nzero) float @fadd_known_positive_normal_dapz -; CHECK-SAME: (float nofpclass(ninf nzero nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nnorm) [[ARG1:%.*]]) #[[ATTR7]] { +; CHECK-SAME: (float nofpclass(ninf nzero nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nnorm) [[ARG1:%.*]]) #[[ATTR8]] { ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]] ; CHECK-NEXT: ret float [[ADD]] ; Index: llvm/test/Transforms/Attributor/value-simplify.ll =================================================================== --- llvm/test/Transforms/Attributor/value-simplify.ll +++ llvm/test/Transforms/Attributor/value-simplify.ll @@ -436,7 +436,7 @@ ; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; TUNIT-LABEL: define {{[^@]+}}@complicated_args_inalloca ; TUNIT-SAME: (ptr nofree nonnull readnone "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR1]] { -; TUNIT-NEXT: [[CALL:%.*]] = call nonnull dereferenceable(4) ptr @test_inalloca(ptr noalias nofree nonnull writeonly inalloca(i32) "no-capture-maybe-returned" [[ARG]]) #[[ATTR9:[0-9]+]] +; TUNIT-NEXT: [[CALL:%.*]] = call nonnull dereferenceable(4) ptr @test_inalloca(ptr noalias nofree nonnull writeonly inalloca(i32) "no-capture-maybe-returned" [[ARG]]) #[[ATTR10:[0-9]+]] ; TUNIT-NEXT: ret ptr [[CALL]] ; ; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none) @@ -461,8 +461,8 @@ ; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn ; TUNIT-LABEL: define {{[^@]+}}@complicated_args_preallocated ; TUNIT-SAME: () #[[ATTR2:[0-9]+]] { -; TUNIT-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1) #[[ATTR10:[0-9]+]] -; TUNIT-NEXT: [[CALL:%.*]] = call noundef nonnull align 4294967296 dereferenceable(4) ptr @test_preallocated(ptr nofree noundef writeonly preallocated(i32) align 4294967296 null) #[[ATTR9]] [ "preallocated"(token [[C]]) ] +; TUNIT-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1) #[[ATTR11:[0-9]+]] +; TUNIT-NEXT: [[CALL:%.*]] = call noundef nonnull align 4294967296 dereferenceable(4) ptr @test_preallocated(ptr nofree noundef writeonly preallocated(i32) align 4294967296 null) #[[ATTR10]] [ "preallocated"(token [[C]]) ] ; TUNIT-NEXT: ret ptr [[CALL]] ; ; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn @@ -501,7 +501,7 @@ ; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) ; TUNIT-LABEL: define {{[^@]+}}@complicated_args_sret ; TUNIT-SAME: (ptr nocapture nofree writeonly [[B:%.*]]) #[[ATTR3]] { -; TUNIT-NEXT: call void @test_sret(ptr nofree noundef writeonly sret([[STRUCT_X:%.*]]) align 4294967296 null, ptr nocapture nofree noundef writeonly align 8 [[B]]) #[[ATTR11:[0-9]+]] +; TUNIT-NEXT: call void @test_sret(ptr nofree noundef writeonly sret([[STRUCT_X:%.*]]) align 4294967296 null, ptr nocapture nofree noundef writeonly align 8 [[B]]) #[[ATTR12:[0-9]+]] ; TUNIT-NEXT: ret void ; ; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(argmem: write) @@ -564,7 +564,7 @@ ; TUNIT-LABEL: define {{[^@]+}}@complicated_args_byval ; TUNIT-SAME: () #[[ATTR4:[0-9]+]] { ; TUNIT-NEXT: [[TMP1:%.*]] = load ptr, ptr @S, align 8 -; TUNIT-NEXT: call void @test_byval(ptr [[TMP1]]) #[[ATTR11]] +; TUNIT-NEXT: call void @test_byval(ptr [[TMP1]]) #[[ATTR12]] ; TUNIT-NEXT: ret void ; ; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn @@ -1224,7 +1224,7 @@ ; TUNIT-NEXT: [[SRC:%.*]] = alloca i8, align 1 ; TUNIT-NEXT: [[DST:%.*]] = alloca i8, align 1 ; TUNIT-NEXT: store i8 [[ARG]], ptr [[SRC]], align 1 -; TUNIT-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[DST]], ptr noalias nocapture nofree noundef nonnull readonly dereferenceable(1) [[SRC]], i32 noundef 1, i1 noundef false) #[[ATTR12:[0-9]+]] +; TUNIT-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[DST]], ptr noalias nocapture nofree noundef nonnull readonly dereferenceable(1) [[SRC]], i32 noundef 1, i1 noundef false) #[[ATTR13:[0-9]+]] ; TUNIT-NEXT: [[L:%.*]] = load i8, ptr [[DST]], align 1 ; TUNIT-NEXT: ret i8 [[L]] ; @@ -1250,7 +1250,7 @@ ; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) ; TUNIT-LABEL: define {{[^@]+}}@memcpy_uses_store_caller ; TUNIT-SAME: (i8 [[ARG:%.*]]) #[[ATTR1]] { -; TUNIT-NEXT: [[R:%.*]] = call i8 @memcpy_uses_store(i8 [[ARG]]) #[[ATTR13:[0-9]+]] +; TUNIT-NEXT: [[R:%.*]] = call i8 @memcpy_uses_store(i8 [[ARG]]) #[[ATTR14:[0-9]+]] ; TUNIT-NEXT: ret i8 [[R]] ; ; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none) @@ -1275,7 +1275,7 @@ ; TUNIT-NEXT: [[PLUS1:%.*]] = add i32 [[SPEC_RESULT]], 1 ; TUNIT-NEXT: store i32 [[PLUS1]], ptr [[STACK]], align 4 ; TUNIT-NEXT: [[TMP1:%.*]] = load i32, ptr [[STACK]], align 4 -; TUNIT-NEXT: [[RSPEC:%.*]] = call i32 @ret_speculatable_expr(i32 [[TMP1]]) #[[ATTR14:[0-9]+]] +; TUNIT-NEXT: [[RSPEC:%.*]] = call i32 @ret_speculatable_expr(i32 [[TMP1]]) #[[ATTR15:[0-9]+]] ; TUNIT-NEXT: ret i32 [[RSPEC]] ; ; CGSCC: Function Attrs: norecurse nosync memory(none) @@ -1388,7 +1388,9 @@ } define internal void @broker(ptr %ptr) { -; TUNIT-LABEL: define {{[^@]+}}@broker() { +; TUNIT: Function Attrs: norecurse +; TUNIT-LABEL: define {{[^@]+}}@broker +; TUNIT-SAME: () #[[ATTR8:[0-9]+]] { ; TUNIT-NEXT: entry: ; TUNIT-NEXT: call void @indirect() ; TUNIT-NEXT: call void @unknown() @@ -1407,10 +1409,17 @@ } define void @entry() { -; CHECK-LABEL: define {{[^@]+}}@entry() { -; CHECK-NEXT: entry: -; CHECK-NEXT: call void @broker() -; CHECK-NEXT: ret void +; TUNIT: Function Attrs: norecurse +; TUNIT-LABEL: define {{[^@]+}}@entry +; TUNIT-SAME: () #[[ATTR8]] { +; TUNIT-NEXT: entry: +; TUNIT-NEXT: call void @broker() +; TUNIT-NEXT: ret void +; +; CGSCC-LABEL: define {{[^@]+}}@entry() { +; CGSCC-NEXT: entry: +; CGSCC-NEXT: call void @broker() +; CGSCC-NEXT: ret void ; entry: call void @broker(ptr @indirect) @@ -1444,13 +1453,14 @@ ; TUNIT: attributes #[[ATTR5:[0-9]+]] = { speculatable memory(none) } ; TUNIT: attributes #[[ATTR6]] = { norecurse nosync memory(none) } ; TUNIT: attributes #[[ATTR7]] = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) } -; TUNIT: attributes #[[ATTR8:[0-9]+]] = { nocallback nofree nounwind willreturn memory(argmem: readwrite) } -; TUNIT: attributes #[[ATTR9]] = { nofree nosync nounwind willreturn memory(none) } -; TUNIT: attributes #[[ATTR10]] = { nofree willreturn } -; TUNIT: attributes #[[ATTR11]] = { nofree nosync nounwind willreturn memory(write) } -; TUNIT: attributes #[[ATTR12]] = { nofree willreturn memory(readwrite) } -; TUNIT: attributes #[[ATTR13]] = { nofree nosync nounwind willreturn } -; TUNIT: attributes #[[ATTR14]] = { nosync nounwind memory(read) } +; TUNIT: attributes #[[ATTR8]] = { norecurse } +; TUNIT: attributes #[[ATTR9:[0-9]+]] = { nocallback nofree nounwind willreturn memory(argmem: readwrite) } +; TUNIT: attributes #[[ATTR10]] = { nofree nosync nounwind willreturn memory(none) } +; TUNIT: attributes #[[ATTR11]] = { nofree willreturn } +; TUNIT: attributes #[[ATTR12]] = { nofree nosync nounwind willreturn memory(write) } +; TUNIT: attributes #[[ATTR13]] = { nofree willreturn memory(readwrite) } +; TUNIT: attributes #[[ATTR14]] = { nofree nosync nounwind willreturn } +; TUNIT: attributes #[[ATTR15]] = { nosync nounwind memory(read) } ;. ; CGSCC: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind willreturn } ; CGSCC: attributes #[[ATTR1]] = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) }