diff --git a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
--- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
@@ -1297,7 +1297,6 @@
       continue;
     }
 
-    if (isa<PHINode>(InVal)) return nullptr;  // Itself a phi.
     if (NonSimplifiedBB) return nullptr;  // More than one non-simplified value.
 
     NonSimplifiedBB = InBB;
diff --git a/llvm/test/Transforms/InstCombine/icmp-fold-into-phi.ll b/llvm/test/Transforms/InstCombine/icmp-fold-into-phi.ll
--- a/llvm/test/Transforms/InstCombine/icmp-fold-into-phi.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-fold-into-phi.ll
@@ -32,18 +32,14 @@
 ; CHECK:       cond.end:
 ; CHECK-NEXT:    [[TMP4:%.*]] = load ptr, ptr @ObjVal, align 8
 ; CHECK-NEXT:    [[CALL4:%.*]] = tail call zeroext i1 @StrCmp(ptr noundef [[TMP4]], ptr noundef nonnull @.str.3)
-; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CALL4]], i32 127, i32 126
 ; CHECK-NEXT:    br label [[SW_BB]]
 ; CHECK:       sw.bb:
-; CHECK-NEXT:    [[COND2:%.*]] = phi i32 [ [[COND]], [[COND_END]] ], [ 128, [[COND_FALSE3]] ]
 ; CHECK-NEXT:    [[CALL5:%.*]] = tail call zeroext i1 @CheckCond()
 ; CHECK-NEXT:    [[NOT_CALL5:%.*]] = xor i1 [[CALL5]], true
 ; CHECK-NEXT:    br label [[SW_EPILOG]]
 ; CHECK:       sw.epilog:
-; CHECK-NEXT:    [[COND3:%.*]] = phi i32 [ [[COND2]], [[SW_BB]] ], [ 134, [[COND_FALSE2]] ], [ 2, [[COND_FALSE]] ], [ 1, [[ENTRY:%.*]] ]
-; CHECK-NEXT:    [[TAGERROR_0:%.*]] = phi i1 [ [[NOT_CALL5]], [[SW_BB]] ], [ false, [[COND_FALSE2]] ], [ false, [[COND_FALSE]] ], [ false, [[ENTRY]] ]
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[COND3]], 2
-; CHECK-NEXT:    [[BRMERGE:%.*]] = or i1 [[CMP]], [[TAGERROR_0]]
+; CHECK-NEXT:    [[TAGERROR_0:%.*]] = phi i1 [ [[NOT_CALL5]], [[SW_BB]] ], [ false, [[COND_FALSE2]] ], [ false, [[COND_FALSE]] ], [ false, [[ENTRY:%.*]] ]
+; CHECK-NEXT:    [[BRMERGE:%.*]] = or i1 [[CALL]], [[TAGERROR_0]]
 ; CHECK-NEXT:    [[RETVAL2_VAL:%.*]] = load i32, ptr @RetVal2, align 4
 ; CHECK-NEXT:    [[RETVAL1_VAL:%.*]] = load i32, ptr @RetVal1, align 4
 ; CHECK-NEXT:    [[RETVAL_0:%.*]] = select i1 [[BRMERGE]], i32 [[RETVAL2_VAL]], i32 [[RETVAL1_VAL]]