diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp --- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -1312,8 +1312,6 @@ unsigned RegWidth); void cvtMubufImpl(MCInst &Inst, const OperandVector &Operands, bool IsAtomic); - void cvtDSImpl(MCInst &Inst, const OperandVector &Operands, - bool IsGdsHardcoded); public: enum AMDGPUMatchResultTy { @@ -1567,9 +1565,6 @@ bool tryParseFmt(const char *Pref, int64_t MaxVal, int64_t &Val); bool matchDfmtNfmt(int64_t &Dfmt, int64_t &Nfmt, StringRef FormatStr, SMLoc Loc); - void cvtDSOffset01(MCInst &Inst, const OperandVector &Operands); - void cvtDS(MCInst &Inst, const OperandVector &Operands) { cvtDSImpl(Inst, Operands, false); } - void cvtDSGds(MCInst &Inst, const OperandVector &Operands) { cvtDSImpl(Inst, Operands, true); } void cvtExp(MCInst &Inst, const OperandVector &Operands); bool parseCnt(int64_t &IntVal); @@ -6280,76 +6275,9 @@ } //===----------------------------------------------------------------------===// -// ds +// Exp //===----------------------------------------------------------------------===// -void AMDGPUAsmParser::cvtDSOffset01(MCInst &Inst, - const OperandVector &Operands) { - OptionalImmIndexMap OptionalIdx; - - for (unsigned i = 1, e = Operands.size(); i != e; ++i) { - AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]); - - // Add the register arguments - if (Op.isReg()) { - Op.addRegOperands(Inst, 1); - continue; - } - - // Handle optional arguments - OptionalIdx[Op.getImmTy()] = i; - } - - addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOffset0); - addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOffset1); - addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyGDS); - - Inst.addOperand(MCOperand::createReg(AMDGPU::M0)); // m0 -} - -void AMDGPUAsmParser::cvtDSImpl(MCInst &Inst, const OperandVector &Operands, - bool IsGdsHardcoded) { - OptionalImmIndexMap OptionalIdx; - const MCInstrDesc &Desc = MII.get(Inst.getOpcode()); - AMDGPUOperand::ImmTy OffsetType = AMDGPUOperand::ImmTyOffset; - - for (unsigned i = 1, e = Operands.size(); i != e; ++i) { - AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[i]); - - auto TiedTo = - Desc.getOperandConstraint(Inst.getNumOperands(), MCOI::TIED_TO); - - if (TiedTo != -1) { - assert((unsigned)TiedTo < Inst.getNumOperands()); - Inst.addOperand(Inst.getOperand(TiedTo)); - } - - // Add the register arguments - if (Op.isReg()) { - Op.addRegOperands(Inst, 1); - continue; - } - - if (Op.isToken() && Op.getToken() == "gds") { - IsGdsHardcoded = true; - continue; - } - - // Handle optional arguments - OptionalIdx[Op.getImmTy()] = i; - - if (Op.getImmTy() == AMDGPUOperand::ImmTySwizzle) - OffsetType = AMDGPUOperand::ImmTySwizzle; - } - - addOptionalImmOperand(Inst, Operands, OptionalIdx, OffsetType); - - if (!IsGdsHardcoded) { - addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyGDS); - } - Inst.addOperand(MCOperand::createReg(AMDGPU::M0)); // m0 -} - void AMDGPUAsmParser::cvtExp(MCInst &Inst, const OperandVector &Operands) { OptionalImmIndexMap OptionalIdx; diff --git a/llvm/lib/Target/AMDGPU/DSInstructions.td b/llvm/lib/Target/AMDGPU/DSInstructions.td --- a/llvm/lib/Target/AMDGPU/DSInstructions.td +++ b/llvm/lib/Target/AMDGPU/DSInstructions.td @@ -26,8 +26,6 @@ let isPseudo = 1; let isCodeGenOnly = 1; - let AsmMatchConverter = "cvtDS"; - string Mnemonic = opName; string AsmOperands = asmOps; @@ -65,7 +63,6 @@ // copy relevant pseudo op flags let SubtargetPredicate = ps.SubtargetPredicate; let OtherPredicates = ps.OtherPredicates; - let AsmMatchConverter = ps.AsmMatchConverter; let SchedRW = ps.SchedRW; let mayLoad = ps.mayLoad; let mayStore = ps.mayStore; @@ -164,7 +161,6 @@ let has_vdst = 0; let has_offset = 0; - let AsmMatchConverter = "cvtDSOffset01"; } multiclass DS_1A2D_Off8_NORET_mc { @@ -187,7 +183,6 @@ let has_data1 = 0; let has_gds = 0; let gdsValue = 1; - let AsmMatchConverter = "cvtDSGds"; let hasSideEffects = 1; } @@ -262,8 +257,6 @@ " $vdst, $addr, $data0, $data1$offset0$offset1$gds"> { let has_offset = 0; - let AsmMatchConverter = "cvtDSOffset01"; - let hasPostISelHook = 1; } @@ -325,7 +318,6 @@ let has_offset = 0; let has_data0 = 0; let has_data1 = 0; - let AsmMatchConverter = "cvtDSOffset01"; } multiclass DS_1A_Off8_RET_mc { @@ -345,7 +337,6 @@ let has_data1 = 0; let has_gds = 0; let gdsValue = 1; - let AsmMatchConverter = "cvtDSGds"; } class DS_0A_RET : DS_Pseudo @@ -417,7 +407,6 @@ let mayStore = 0; let hasSideEffects = 1; let UseNamedOperandTable = 0; - let AsmMatchConverter = ""; let has_vdst = 0; let has_addr = 0;