diff --git a/mlir/test/CMakeLists.txt b/mlir/test/CMakeLists.txt
--- a/mlir/test/CMakeLists.txt
+++ b/mlir/test/CMakeLists.txt
@@ -20,6 +20,8 @@
       "If set, arch-specific Arm integration tests are run with an emulator.")
   set(ARM_EMULATOR_OPTIONS "" CACHE STRING
       "If arch-specific Arm integration tests run emulated, pass these as parameters to the emulator.")
+  set(ARM_EMULATOR_MLIR_CPU_RUNNER_EXECUTABLE "" CACHE STRING
+      "If arch-specific Arm integration tests run emulated, use this Arm native mlir-cpu-runner.")
   set(ARM_EMULATOR_LLI_EXECUTABLE "" CACHE STRING
       "If arch-specific Arm integration tests run emulated, use this Arm native lli.")
   set(ARM_EMULATOR_UTILS_LIB_DIR "" CACHE STRING
diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_unary.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_unary.mlir
--- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_unary.mlir
+++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_unary.mlir
@@ -1,8 +1,12 @@
+// DEFINE: %{option_vec} = 
 // DEFINE: %{option} = enable-runtime-library=true
+// DEFINE: %{run_option} =
+// DEFINE: %{cpu_runner} = mlir-cpu-runner
+
 // DEFINE: %{compile} = mlir-opt %s --sparse-compiler=%{option}
-// DEFINE: %{run} = mlir-cpu-runner \
+// DEFINE: %{run} = %{cpu_runner} \
 // DEFINE:  -e entry -entry-point-result=void  \
-// DEFINE:  -shared-libs=%mlir_c_runner_utils | \
+// DEFINE:  -shared-libs=%mlir_c_runner_utils %{run_option} | \
 // DEFINE: FileCheck %s
 //
 // RUN: %{compile} | %{run}
@@ -12,19 +16,15 @@
 // RUN: %{compile} | %{run}
 //
 // Do the same run, but now with direct IR generation and vectorization.
-// REDEFINE: %{option} = "enable-runtime-library=false enable-buffer-initialization=true vl=2 reassociate-fp-reductions=true enable-index-optimizations=true"
+// REDEFINE: %{option_vec} = enable-runtime-library=false enable-buffer-initialization=true vl=2 reassociate-fp-reductions=true enable-index-optimizations=true
+// REDEFINE: %{option} = "%{option_vec}"
 // RUN: %{compile} | %{run}
 
-// Do the same run, but now with direct IR generation and, if available, VLA
-// vectorization.
-// REDEFINE: %{option} = "enable-runtime-library=false vl=4 enable-buffer-initialization=true reassociate-fp-reductions=true enable-index-optimizations=true enable-arm-sve=%ENABLE_VLA"
-// REDEFINE: %{run} = %lli_host_or_aarch64_cmd \
-// REDEFINE:   --entry-function=entry_lli \
-// REDEFINE:   --extra-module=%S/Inputs/main_for_lli.ll \
-// REDEFINE:   %VLA_ARCH_ATTR_OPTIONS \
-// REDEFINE:   --dlopen=%mlir_native_utils_lib_dir/libmlir_c_runner_utils%shlibext | \
-// REDEFINE: FileCheck %s
-// RUN: %{compile} | mlir-translate -mlir-to-llvmir | %{run}
+// Do the same run, but with VLA vectorization.
+// REDEFINE: %{option} = "enable-arm-sve=true %{option_vec}"
+// REDEFINE: %{cpu_runner} = %mcr_aarch64_cmd
+// REDEFINE: %{run_option} = %VLA_ARCH_ATTR_OPTIONS
+// RUN: %if mlir_arm_sve_tests %{ %{compile} | %{run} %}
 
 #SparseVector = #sparse_tensor.encoding<{lvlTypes = ["compressed"]}>
 #DCSR = #sparse_tensor.encoding<{lvlTypes = ["compressed", "compressed"]}>
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-sve.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-sve.mlir
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-sve.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-sve.mlir
@@ -1,6 +1,5 @@
 // RUN: mlir-opt %s -lower-affine -convert-scf-to-cf -convert-vector-to-llvm="enable-arm-sve" -finalize-memref-to-llvm -convert-func-to-llvm -convert-arith-to-llvm -canonicalize | \
-// RUN: mlir-translate -mlir-to-llvmir | \
-// RUN: %lli_aarch64_cmd --entry-function=entry --march=aarch64 --mattr="+sve" --dlopen=%mlir_native_utils_lib_dir/libmlir_c_runner_utils%shlibext | \
+// RUN: %mcr_aarch64_cmd -e=entry -entry-point-result=void --march=aarch64 --mattr="+sve" -shared-libs=%mlir_lib_dir/libmlir_c_runner_utils%shlibext | \
 // RUN: FileCheck %s
 
 // Note: To run this test, your CPU must support SVE
@@ -88,10 +87,9 @@
   return
 }
 
-func.func @entry() -> i32 {
+func.func @entry() {
   %i0 = arith.constant 0: i64
   %i1 = arith.constant 1: i64
-  %r0 = arith.constant 0: i32
   %f0 = arith.constant 0.0: f32
   %c0 = arith.constant 0: index
   %c1 = arith.constant 1: index
@@ -212,5 +210,5 @@
   memref.dealloc %f      : memref<33xf32>
   memref.dealloc %g      : memref<36xf32>
 
-  return %r0 : i32
+  return
 }
diff --git a/mlir/test/Integration/lit.local.cfg b/mlir/test/Integration/lit.local.cfg
--- a/mlir/test/Integration/lit.local.cfg
+++ b/mlir/test/Integration/lit.local.cfg
@@ -4,14 +4,15 @@
     config.unsupported = True
 
 
-def configure_aarch64_lli_cmd():
+def configure_aarch64_lli_and_mcr_cmd():
     lli_cmd = "lli"
+    mcr_cmd = "mlir-cpu-runner"
 
     # NOTE: If the SVE tests are disabled and the SME tests are enabled to run
     # under emulation, the SVE specific RUN lines in the SparseTensor tests
     # will run under emulation.
     if not (config.mlir_run_arm_sve_tests or config.mlir_run_arm_sme_tests):
-        return lli_cmd
+        return (lli_cmd, mcr_cmd)
 
     config.substitutions.append(
         (
@@ -41,15 +42,22 @@
         )
         lli_cmd = f"{emulation_cmd} {lli_cmd}"
 
-    return lli_cmd
+        if config.arm_emulator_mlir_cpu_runner_executable:
+          mcr_cmd = config.arm_emulator_mlir_cpu_runner_executable
 
+    return (lli_cmd, mcr_cmd)
 
-aarch64_lli_cmd = configure_aarch64_lli_cmd()
+
+aarch64_lli_cmd, aarch64_mcr_cmd = configure_aarch64_lli_and_mcr_cmd()
 
 # Configure the following AArch64 substitutions:
 #
-# * %lli_aarch64_cmd         - Invokes lli. For tests that will run on AArch64 (ArmSVE, ArmSME).
-# * %lli_host_or_aarch64_cmd - Invokes lli. For tests that may run on AArch64 (SparseTensor).
+# * %lli_aarch64_cmd         - Invokes lli. For tests that _will_ run on AArch64 (ArmSVE, ArmSME).
+# * %lli_host_or_aarch64_cmd - Invokes lli. For tests that _may_ run on AArch64 (SparseTensor).
+# * %mcr_aarch64_cmd         - Invokes mlir-cpu-runner. For tests that _will_
+#                              run on AArch64. May invoke mlir-cpu-runner under
+#                              an AArch64 emulator (when
+#                              `config.arm_emulator_executable` is set).
 #
 # AArch64 tests will run under emulation if configured at build time by the
 # following CMake options:
@@ -65,3 +73,4 @@
 # is not AArch64 and MLIR_RUN_ARM_SVE_TESTS=OFF.
 config.substitutions.append(("%lli_aarch64_cmd", aarch64_lli_cmd))
 config.substitutions.append(("%lli_host_or_aarch64_cmd", aarch64_lli_cmd))
+config.substitutions.append(("%mcr_aarch64_cmd", aarch64_mcr_cmd))
diff --git a/mlir/test/lit.site.cfg.py.in b/mlir/test/lit.site.cfg.py.in
--- a/mlir/test/lit.site.cfg.py.in
+++ b/mlir/test/lit.site.cfg.py.in
@@ -51,6 +51,7 @@
 config.mlir_include_integration_tests = @MLIR_INCLUDE_INTEGRATION_TESTS@
 config.arm_emulator_executable = "@ARM_EMULATOR_EXECUTABLE@"
 config.arm_emulator_options = "@ARM_EMULATOR_OPTIONS@"
+config.arm_emulator_mlir_cpu_runner_executable = "@ARM_EMULATOR_MLIR_CPU_RUNNER_EXECUTABLE@"
 config.arm_emulator_lli_executable = "@ARM_EMULATOR_LLI_EXECUTABLE@"
 config.arm_emulator_utils_lib_dir = "@ARM_EMULATOR_UTILS_LIB_DIR@"
 config.riscv_vector_emulator_executable = "@RISCV_VECTOR_EMULATOR_EXECUTABLE@"