diff --git a/mlir/test/CMakeLists.txt b/mlir/test/CMakeLists.txt --- a/mlir/test/CMakeLists.txt +++ b/mlir/test/CMakeLists.txt @@ -20,6 +20,8 @@ "If set, arch-specific Arm integration tests are run with an emulator.") set(ARM_EMULATOR_OPTIONS "" CACHE STRING "If arch-specific Arm integration tests run emulated, pass these as parameters to the emulator.") + set(ARM_EMULATOR_MLIR_CPU_RUNNER_EXECUTABLE "" CACHE STRING + "If arch-specific Arm integration tests run emulated, use this Arm native mlir-cpu-runner.") set(ARM_EMULATOR_LLI_EXECUTABLE "" CACHE STRING "If arch-specific Arm integration tests run emulated, use this Arm native lli.") set(ARM_EMULATOR_UTILS_LIB_DIR "" CACHE STRING diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_1.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_1.mlir --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_1.mlir +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/concatenate_dim_1.mlir @@ -1,19 +1,23 @@ -// DEFINE: %{option} = enable-runtime-library=true -// DEFINE: %{run_option} = -// DEFINE: %{compile} = mlir-opt %s --sparse-compiler=%{option} -// DEFINE: %{run} = mlir-cpu-runner \ +// DEFINE: %{compile_opts} = enable-runtime-library=true +// DEFINE: %{run_opts} = +// DEFINE: %{compile} = mlir-opt %s --sparse-compiler=%{compile_opts} +// DEFINE: %{cpu_runner} = mlir-cpu-runner +// DEFINE: %{run} = %{cpu_runner} \ // DEFINE: -e entry -entry-point-result=void \ -// DEFINE: -shared-libs=%mlir_lib_dir/libmlir_c_runner_utils%shlibext,%mlir_lib_dir/libmlir_runner_utils%shlibext %{run_option} | \ +// DEFINE: -shared-libs=%mlir_lib_dir/libmlir_c_runner_utils%shlibext,%mlir_lib_dir/libmlir_runner_utils%shlibext %{run_opts} | \ // DEFINE: FileCheck %s // // RUN: %{compile} | %{run} // // Do the same run, but now with direct IR generation. -// REDEFINE: %{option} = "enable-runtime-library=false enable-buffer-initialization=true" +// REDEFINE: %{compile_opts} = "enable-runtime-library=false enable-buffer-initialization=true" // RUN: %{compile} | %{run} // -// Do the same run, but now with direct IR generation and vectorization. -// REDEFINE: %{option} = "enable-runtime-library=false enable-buffer-initialization=true vl=4 reassociate-fp-reductions=true enable-index-optimizations=true" +// Do the same run, but now with direct IR generation and vectorization. Enable +// Arm SVE/VLA if supported. +// REDEFINE: %{compile_opts} = "enable-runtime-library=false enable-buffer-initialization=true vl=4 enable-arm-sve=%ENABLE_VLA reassociate-fp-reductions=true enable-index-optimizations=true" +// REDEFINE: %{cpu_runner} = %mlir_cpu_runner_vla +// REDEFINE: %{run_opts} = %VLA_ARCH_ATTR_OPTIONS // RUN: %{compile} | %{run} #MAT_C_C = #sparse_tensor.encoding<{lvlTypes = ["compressed", "compressed"]}> diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/lit.local.cfg b/mlir/test/Integration/Dialect/SparseTensor/CPU/lit.local.cfg --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/lit.local.cfg +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/lit.local.cfg @@ -7,11 +7,28 @@ # ArmSVE tests must be enabled via build flag. if config.mlir_run_arm_sve_tests: - config.substitutions.append(("%ENABLE_VLA", "true")) - config.substitutions.append( - ("%VLA_ARCH_ATTR_OPTIONS", '--march=aarch64 --mattr="+sve"') - ) + config.substitutions.append(('%ENABLE_VLA', 'true')) + config.substitutions.append(('%VLA_ARCH_ATTR_OPTIONS', '--march=aarch64 --mattr="+sve"')) + mlir_cpu_runner_cmd = 'mlir-cpu-runner' + if config.arm_emulator_mlir_cpu_runner_executable: + mlir_cpu_runner_cmd = config.arm_emulator_mlir_cpu_runner_executable + + if config.arm_emulator_utils_lib_dir: + config.substitutions.append(('%mlir_native_utils_lib_dir', config.arm_emulator_utils_lib_dir)) + else: + config.substitutions.append(('%mlir_native_utils_lib_dir', config.mlir_lib_dir)) + + if config.arm_emulator_executable: + # Run test in emulator (qemu or armie). + emulation_cmd = config.arm_emulator_executable + if config.arm_emulator_options: + emulation_cmd = emulation_cmd + ' ' + config.arm_emulator_options + emulation_cmd = emulation_cmd + ' ' + mlir_cpu_runner_cmd + config.substitutions.append(('%mlir_cpu_runner_vla', emulation_cmd)) + else: + config.substitutions.append(('%mlir_cpu_runner_vla', mlir_cpu_runner_cmd)) else: config.substitutions.append(("%ENABLE_VLA", "false")) config.substitutions.append(("%VLA_ARCH_ATTR_OPTIONS", "")) + config.substitutions.append(("%mlir_cpu_runner_vla", "mlir-cpu-runner")) config.substitutions.append(("%mlir_native_utils_lib_dir", config.mlir_lib_dir)) diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_unary.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_unary.mlir --- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_unary.mlir +++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_unary.mlir @@ -1,8 +1,12 @@ +// DEFINE: %{option_vec} = // DEFINE: %{option} = enable-runtime-library=true +// DEFINE: %{run_option} = +// DEFINE: %{cpu_runner} = mlir-cpu-runner + // DEFINE: %{compile} = mlir-opt %s --sparse-compiler=%{option} -// DEFINE: %{run} = mlir-cpu-runner \ +// DEFINE: %{run} = %{cpu_runner} \ // DEFINE: -e entry -entry-point-result=void \ -// DEFINE: -shared-libs=%mlir_c_runner_utils | \ +// DEFINE: -shared-libs=%mlir_c_runner_utils %{run_option} | \ // DEFINE: FileCheck %s // // RUN: %{compile} | %{run} @@ -12,19 +16,15 @@ // RUN: %{compile} | %{run} // // Do the same run, but now with direct IR generation and vectorization. -// REDEFINE: %{option} = "enable-runtime-library=false enable-buffer-initialization=true vl=2 reassociate-fp-reductions=true enable-index-optimizations=true" +// REDEFINE: %{option_vec} = enable-runtime-library=false enable-buffer-initialization=true vl=2 reassociate-fp-reductions=true enable-index-optimizations=true +// REDEFINE: %{option} = "%{option_vec}" // RUN: %{compile} | %{run} -// Do the same run, but now with direct IR generation and, if available, VLA -// vectorization. -// REDEFINE: %{option} = "enable-runtime-library=false vl=4 enable-buffer-initialization=true reassociate-fp-reductions=true enable-index-optimizations=true enable-arm-sve=%ENABLE_VLA" -// REDEFINE: %{run} = %lli_host_or_aarch64_cmd \ -// REDEFINE: --entry-function=entry_lli \ -// REDEFINE: --extra-module=%S/Inputs/main_for_lli.ll \ -// REDEFINE: %VLA_ARCH_ATTR_OPTIONS \ -// REDEFINE: --dlopen=%mlir_native_utils_lib_dir/libmlir_c_runner_utils%shlibext | \ -// REDEFINE: FileCheck %s -// RUN: %{compile} | mlir-translate -mlir-to-llvmir | %{run} +// Do the same run, but with VLA vectorization. +// REDEFINE: %{option} = "enable-arm-sve=true %{option_vec}" +// REDEFINE: %{cpu_runner} = %mlir_cpu_runner_vla +// REDEFINE: %{run_option} = %VLA_ARCH_ATTR_OPTIONS +// RUN: %if mlir_arm_sve_tests %{ %{compile} | %{run} %} #SparseVector = #sparse_tensor.encoding<{lvlTypes = ["compressed"]}> #DCSR = #sparse_tensor.encoding<{lvlTypes = ["compressed", "compressed"]}> diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/lit.local.cfg b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/lit.local.cfg --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/lit.local.cfg +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/lit.local.cfg @@ -7,3 +7,20 @@ # No JIT on win32. if sys.platform == "win32": config.unsupported = True + +mlir_cpu_runner_cmd = 'mlir-cpu-runner' +if config.arm_emulator_mlir_cpu_runner_executable: + mlir_cpu_runner_cmd = config.arm_emulator_mlir_cpu_runner_executable + +config.substitutions.append(('%mlir_native_utils_lib_dir', + config.arm_emulator_utils_lib_dir or config.mlir_lib_dir)) + +if config.arm_emulator_executable: + # Run test in emulator (qemu or armie) + emulation_cmd = config.arm_emulator_executable + if config.arm_emulator_options: + emulation_cmd = emulation_cmd + ' ' + config.arm_emulator_options + emulation_cmd = emulation_cmd + ' ' + mlir_cpu_runner_cmd + config.substitutions.append(('%mlir-cpu-runner-vla', emulation_cmd)) +else: + config.substitutions.append(('%mlir-cpu-runner-vla', mlir_cpu_runner_cmd)) diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-sve.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-sve.mlir --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-sve.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-sve.mlir @@ -1,6 +1,5 @@ // RUN: mlir-opt %s -lower-affine -convert-scf-to-cf -convert-vector-to-llvm="enable-arm-sve" -finalize-memref-to-llvm -convert-func-to-llvm -convert-arith-to-llvm -canonicalize | \ -// RUN: mlir-translate -mlir-to-llvmir | \ -// RUN: %lli_aarch64_cmd --entry-function=entry --march=aarch64 --mattr="+sve" --dlopen=%mlir_native_utils_lib_dir/libmlir_c_runner_utils%shlibext | \ +// RUN: %mlir-cpu-runner-vla -e=entry -entry-point-result=void --march=aarch64 --mattr="+sve" -shared-libs=%mlir_lib_dir/libmlir_c_runner_utils%shlibext | \ // RUN: FileCheck %s // Note: To run this test, your CPU must support SVE @@ -88,10 +87,9 @@ return } -func.func @entry() -> i32 { +func.func @entry() { %i0 = arith.constant 0: i64 %i1 = arith.constant 1: i64 - %r0 = arith.constant 0: i32 %f0 = arith.constant 0.0: f32 %c0 = arith.constant 0: index %c1 = arith.constant 1: index @@ -212,5 +210,5 @@ memref.dealloc %f : memref<33xf32> memref.dealloc %g : memref<36xf32> - return %r0 : i32 + return } diff --git a/mlir/test/lit.site.cfg.py.in b/mlir/test/lit.site.cfg.py.in --- a/mlir/test/lit.site.cfg.py.in +++ b/mlir/test/lit.site.cfg.py.in @@ -51,6 +51,7 @@ config.mlir_include_integration_tests = @MLIR_INCLUDE_INTEGRATION_TESTS@ config.arm_emulator_executable = "@ARM_EMULATOR_EXECUTABLE@" config.arm_emulator_options = "@ARM_EMULATOR_OPTIONS@" +config.arm_emulator_mlir_cpu_runner_executable = "@ARM_EMULATOR_MLIR_CPU_RUNNER_EXECUTABLE@" config.arm_emulator_lli_executable = "@ARM_EMULATOR_LLI_EXECUTABLE@" config.arm_emulator_utils_lib_dir = "@ARM_EMULATOR_UTILS_LIB_DIR@" config.riscv_vector_emulator_executable = "@RISCV_VECTOR_EMULATOR_EXECUTABLE@"