Make the aarch64 lldb-server capable of debugging arm32 applications

[tberghammer]

Summary

Make the aarch64 lldb-server capable of debugging arm32 applications

After this change an arm32 lldb-server can debug arm32 inferiors both on arm32 and on aarch64 devices and an aarch64 lldb-server can debug both arm32 and aarch64 inferiors on aarch64 devices.

[ovyalov]

source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp

973 ↗

(On Diff #42862)

s/liux/linux

1016 ↗

(On Diff #42862)

Could you wrap aarch64 code into a static function in NativeRegisterContextLinux_arm64 so it can be reused both here and in NativeRegisterContextLinux_arm64::DoReadGPR?

1018 ↗

(On Diff #42862)

It seems, error isn't used.

source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp

153 ↗

(On Diff #42862)

Please add logging here including target_arch.GetMachine() value.

[tberghammer]

Note: This change is blocked by D15529. If that one will get rejected then we have to move some of the 32 <-> 64 architecture matching code into LLDB.

source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp

1016 ↗

(On Diff #42862)

I don't want to call NativeRegisterContextLinux_arm64::DoReadGPR because conceptually a function on NativeRegisterContextLinux_arm64 should read out arm64 resisters while this one reads out arm32 registers. I changed to code to use NativeRegisterContextLinux::ReadRegisterSet what simplifies it quite a bit.

[tberghammer]

Fix type

[omjavaid]

I am wondering whats the reason of replacing arm ptrace calls with aarch64 specific calls that use iovec parameters.

If arm calls can work then may be dont use aarch64 specific calls at all. If they dont work kindly make relevant changes to NativeRegisterContextLinux_arm::WriteHardwareDebugRegs and NativeRegisterContextLinux_arm::ReadHardwareDebugInfo().
I guess these functions will throw same errors in case calls propagated using aarch64 lib interface and not backward compaitible with arm specific interface.

[tberghammer]

I don't fully understand how the ptrace API works in the aarch64 Linux kernel but based on my experiments the arm specific ptrace calls aren't working (returning -EIO for a reason unknown to me at the moment). Because of this, the current watchpoint implementation ins't working when aarch64 lldb-server is debugging an arm32 inferior. I also tried to change the implementation to use ReadRegisterSet(NT_ARM_HW_WATCH) but it wasn't working either most likely because NT_ARM_HW_WATCH isn't listed as a register set in http://lxr.free-electrons.com/source/arch/arm64/kernel/ptrace.c#L853

I will keep investigating how can we set arm watchpoints from an aarch64 kernel but I would appreciate any suggestion if you have one.

[tberghammer]

@omjavaid: What is your opinion about submitting this patch in its current form with knowing that setting watchpoints from a 64bit lldb-server into 32bit inferior will fail?

I think this patch is a step in the good direction to make a 64bit lldb-server capable of debugging a 32bit inferior. Considering how few arm/aarch64 (android) devices are supporting watchpoints I don't think we should block on that issue.

[omjavaid]

LGTM.

I think we should submit this patch as tberghammer explained.

lldb/trunk/source/Host/common/HostInfoBase.cpp

HostInfoBase::ComputeHostArchitectureSupport(ArchSpec &arch_32, ArchSpec &arch_64)
     arch_64.Clear();
 
     switch (triple.getArch())
     {
         default:
             arch_32.SetTriple(triple);
             break;
 
+        case llvm::Triple::aarch64:
         case llvm::Triple::ppc64:
         case llvm::Triple::x86_64:
             arch_64.SetTriple(triple);
             arch_32.SetTriple(triple.get32BitArchVariant());
             break;
 
-        case llvm::Triple::aarch64:
         case llvm::Triple::mips64:
         case llvm::Triple::mips64el:
         case llvm::Triple::sparcv9:
             arch_64.SetTriple(triple);
             break;
     }
 }

lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h

 //===-- NativeRegisterContextLinux_arm.h ---------------------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
-#if defined(__arm__) // arm register context only needed on arm devices
+#if defined(__arm__) || defined(__arm64__) || defined(__aarch64__)
 
 #ifndef lldb_NativeRegisterContextLinux_arm_h
 #define lldb_NativeRegisterContextLinux_arm_h
 
 #include "Plugins/Process/Linux/NativeRegisterContextLinux.h"
 #include "Plugins/Process/Utility/lldb-arm-register-enums.h"
 
 namespace lldb_private {
public:
         enum DREGType
         {
             eDREGTypeWATCH = 0,
             eDREGTypeBREAK
         };
 
     protected:
         Error
+        DoReadRegisterValue(uint32_t offset,
+                            const char* reg_name,
+                            uint32_t size,
+                            RegisterValue &value) override;
+
+        Error
         DoWriteRegisterValue(uint32_t offset,
                              const char* reg_name,
                              const RegisterValue &value) override;
 
         Error
+        DoReadGPR(void *buf, size_t buf_size) override;
+
+        Error
+        DoWriteGPR(void *buf, size_t buf_size) override;
+
+        Error
         DoReadFPR(void *buf, size_t buf_size) override;
 
         Error
         DoWriteFPR(void *buf, size_t buf_size) override;
 
         void*
         GetGPRBuffer() override { return &m_gpr_arm; }
 
private:
         CalculateFprOffset(const RegisterInfo* reg_info) const;
     };
 
 } // namespace process_linux
 } // namespace lldb_private
 
 #endif // #ifndef lldb_NativeRegisterContextLinux_arm_h
 
-#endif // defined(__arm__)
+#endif // defined(__arm__) || defined(__arm64__) || defined(__aarch64__)

lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp

 //===-- NativeRegisterContextLinux_arm.cpp --------------------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
-#if defined(__arm__)
+#if defined(__arm__) || defined(__arm64__) || defined(__aarch64__)
 
 #include "NativeRegisterContextLinux_arm.h"
 
 #include "lldb/Core/DataBufferHeap.h"
 #include "lldb/Core/Error.h"
 #include "lldb/Core/Log.h"
 #include "lldb/Core/RegisterValue.h"
 
+#include "Plugins/Process/Linux/Procfs.h"
 #include "Plugins/Process/Utility/RegisterContextLinux_arm.h"
 
+#include <elf.h>
+#include <sys/socket.h>
+
 #define REG_CONTEXT_SIZE (GetGPRSize() + sizeof (m_fpr))
 
 #ifndef PTRACE_GETVFPREGS
   #define PTRACE_GETVFPREGS 27
   #define PTRACE_SETVFPREGS 28
 #endif
 #ifndef PTRACE_GETHBPREGS
   #define PTRACE_GETHBPREGS 29

 // Register sets for arm.
 static const RegisterSet
 g_reg_sets_arm[k_num_register_sets] =
 {
     { "General Purpose Registers",  "gpr", k_num_gpr_registers_arm, g_gpr_regnums_arm },
     { "Floating Point Registers",   "fpu", k_num_fpr_registers_arm, g_fpu_regnums_arm }
 };
 
+#if defined(__arm__)
+
 NativeRegisterContextLinux*
 NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux(const ArchSpec& target_arch,
                                                                  NativeThreadProtocol &native_thread,
                                                                  uint32_t concrete_frame_idx)
 {
     return new NativeRegisterContextLinux_arm(target_arch, native_thread, concrete_frame_idx);
 }
 
+#endif // defined(__arm__)
+
 NativeRegisterContextLinux_arm::NativeRegisterContextLinux_arm (const ArchSpec& target_arch,
                                                                 NativeThreadProtocol &native_thread,
                                                                 uint32_t concrete_frame_idx) :
     NativeRegisterContextLinux (native_thread, concrete_frame_idx, new RegisterContextLinux_arm(target_arch))
 {
     switch (target_arch.GetMachine())
     {
         case llvm::Triple::arm:
NativeRegisterContextLinux_arm::WriteHardwareDebugRegs(int hwbType, int hwb_index)
     uint32_t *ctrl_buf;
 
     if (hwbType == eDREGTypeWATCH)
     {
         addr_buf = &m_hwp_regs[hwb_index].address;
         ctrl_buf = &m_hwp_regs[hwb_index].control;
 
         error = NativeProcessLinux::PtraceWrapper(PTRACE_SETHBPREGS,
-                m_thread.GetID(), (PTRACE_TYPE_ARG3) -((hwb_index << 1) + 1),
+                m_thread.GetID(), (PTRACE_TYPE_ARG3)(intptr_t) -((hwb_index << 1) + 1),
                 addr_buf, sizeof(unsigned int));
 
         if (error.Fail())
             return error;
 
         error = NativeProcessLinux::PtraceWrapper(PTRACE_SETHBPREGS,
-                m_thread.GetID(), (PTRACE_TYPE_ARG3) -((hwb_index << 1) + 2),
+                m_thread.GetID(), (PTRACE_TYPE_ARG3)(intptr_t) -((hwb_index << 1) + 2),
                 ctrl_buf, sizeof(unsigned int));
     }
     else
     {
         addr_buf = &m_hwp_regs[hwb_index].address;
         ctrl_buf = &m_hwp_regs[hwb_index].control;
 
         error = NativeProcessLinux::PtraceWrapper(PTRACE_SETHBPREGS,
-                m_thread.GetID(), (PTRACE_TYPE_ARG3) ((hwb_index << 1) + 1),
+                m_thread.GetID(), (PTRACE_TYPE_ARG3)(intptr_t) ((hwb_index << 1) + 1),
                 addr_buf, sizeof(unsigned int));
 
         if (error.Fail())
             return error;
 
         error = NativeProcessLinux::PtraceWrapper(PTRACE_SETHBPREGS,
-                m_thread.GetID(), (PTRACE_TYPE_ARG3) ((hwb_index << 1) + 2),
+                m_thread.GetID(), (PTRACE_TYPE_ARG3)(intptr_t) ((hwb_index << 1) + 2),
                 ctrl_buf, sizeof(unsigned int));
 
     }
 
     return error;
 }
 
 uint32_t
 NativeRegisterContextLinux_arm::CalculateFprOffset(const RegisterInfo* reg_info) const
 {
     return reg_info->byte_offset - GetRegisterInfoAtIndex(m_reg_info.first_fpr)->byte_offset;
 }
 
 Error
+NativeRegisterContextLinux_arm::DoReadRegisterValue(uint32_t offset,
+                                                    const char* reg_name,
+                                                    uint32_t size,
+                                                    RegisterValue &value)
+{
+    // PTRACE_PEEKUSER don't work in the aarch64 linux kernel used on android devices (always return
+    // "Bad address"). To avoid using PTRACE_PEEKUSER we read out the full GPR register set instead.
+    // This approach is about 4 times slower but the performance overhead is negligible in
+    // comparision to processing time in lldb-server.
+    assert(offset % 4 == 0 && "Try to write a register with unaligned offset");
+    if (offset + sizeof(uint32_t) > sizeof(m_gpr_arm))
+        return Error("Register isn't fit into the size of the GPR area");
+
+    Error error = DoReadGPR(m_gpr_arm, sizeof(m_gpr_arm));
+    if (error.Fail())
+        return error;
+
+    value.SetUInt32(m_gpr_arm[offset / sizeof(uint32_t)]);
+    return Error();
+}
+
+Error
 NativeRegisterContextLinux_arm::DoWriteRegisterValue(uint32_t offset,
                                                      const char* reg_name,
                                                      const RegisterValue &value)
 {
-    // PTRACE_POKEUSER don't work in the aarch64 liux kernel used on android devices (always return
+    // PTRACE_POKEUSER don't work in the aarch64 linux kernel used on android devices (always return
     // "Bad address"). To avoid using PTRACE_POKEUSER we read out the full GPR register set, modify
     // the requested register and write it back. This approach is about 4 times slower but the
     // performance overhead is negligible in comparision to processing time in lldb-server.
     assert(offset % 4 == 0 && "Try to write a register with unaligned offset");
     if (offset + sizeof(uint32_t) > sizeof(m_gpr_arm))
         return Error("Register isn't fit into the size of the GPR area");
 
     Error error = DoReadGPR(m_gpr_arm, sizeof(m_gpr_arm));
if (offset / sizeof(uint32_t) == gpr_pc_arm)
         }
     }
 
     m_gpr_arm[offset / sizeof(uint32_t)] = reg_value;
     return DoWriteGPR(m_gpr_arm, sizeof(m_gpr_arm));
 }
 
 Error
+NativeRegisterContextLinux_arm::DoReadGPR(void *buf, size_t buf_size)
+{
+#ifdef __arm__
+    return NativeRegisterContextLinux::DoReadGPR(buf, buf_size);
+#else // __aarch64__
+    struct iovec ioVec;
+    ioVec.iov_base = buf;
+    ioVec.iov_len = buf_size;
+
+    return ReadRegisterSet(&ioVec, buf_size, NT_PRSTATUS);
+#endif // __arm__
+}
+
+Error
+NativeRegisterContextLinux_arm::DoWriteGPR(void *buf, size_t buf_size)
+{
+#ifdef __arm__
+    return NativeRegisterContextLinux::DoWriteGPR(buf, buf_size);
+#else // __aarch64__
+    struct iovec ioVec;
+    ioVec.iov_base = buf;
+    ioVec.iov_len = buf_size;
+
+    return WriteRegisterSet(&ioVec, buf_size, NT_PRSTATUS);
+#endif // __arm__
+}
+
+Error
 NativeRegisterContextLinux_arm::DoReadFPR(void *buf, size_t buf_size)
 {
+#ifdef __arm__
     return NativeProcessLinux::PtraceWrapper(PTRACE_GETVFPREGS,
                                              m_thread.GetID(),
                                              nullptr,
                                              buf,
                                              buf_size);
+#else // __aarch64__
+    struct iovec ioVec;
+    ioVec.iov_base = buf;
+    ioVec.iov_len = buf_size;
+
+    return ReadRegisterSet(&ioVec, buf_size, NT_ARM_VFP);
+#endif // __arm__
 }
 
 Error
 NativeRegisterContextLinux_arm::DoWriteFPR(void *buf, size_t buf_size)
 {
+#ifdef __arm__
     return NativeProcessLinux::PtraceWrapper(PTRACE_SETVFPREGS,
                                              m_thread.GetID(),
                                              nullptr,
                                              buf,
                                              buf_size);
+#else // __aarch64__
+    struct iovec ioVec;
+    ioVec.iov_base = buf;
+    ioVec.iov_len = buf_size;
+
+    return WriteRegisterSet(&ioVec, buf_size, NT_ARM_VFP);
+#endif // __arm__
 }
 
-#endif // defined(__arm__)
+#endif // defined(__arm__) || defined(__arm64__) || defined(__aarch64__)

lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp

 //===-- NativeRegisterContextLinux_arm64.cpp --------------------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 
 #if defined (__arm64__) || defined (__aarch64__)
 
+#include "NativeRegisterContextLinux_arm.h"
 #include "NativeRegisterContextLinux_arm64.h"
 
 // C Includes
 // C++ Includes
 
 // Other libraries and framework includes
 #include "lldb/Core/DataBufferHeap.h"
 #include "lldb/Core/Error.h"
 #include "lldb/Core/Log.h"
 #include "lldb/Core/RegisterValue.h"
 #include "lldb/Host/common/NativeProcessProtocol.h"
 
 #include "Plugins/Process/Linux/NativeProcessLinux.h"
 #include "Plugins/Process/Linux/Procfs.h"
+#include "Plugins/Process/POSIX/ProcessPOSIXLog.h"
 #include "Plugins/Process/Utility/RegisterContextLinux_arm64.h"
 
 // System includes - They have to be included after framework includes because they define some
 // macros which collide with variable names in other modules
 #include <sys/socket.h>
 // NT_PRSTATUS and NT_FPREGSET definition
 #include <elf.h>
 
g_reg_sets_arm64[k_num_register_sets] =
     { "Floating Point Registers",   "fpu", k_num_fpr_registers_arm64, g_fpu_regnums_arm64 }
 };
 
 NativeRegisterContextLinux*
 NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux(const ArchSpec& target_arch,
                                                                  NativeThreadProtocol &native_thread,
                                                                  uint32_t concrete_frame_idx)
 {
+    Log *log  = ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_REGISTERS);
+    switch (target_arch.GetMachine())
+    {
+        case llvm::Triple::arm:
+            return new NativeRegisterContextLinux_arm(target_arch, native_thread, concrete_frame_idx);
+        case llvm::Triple::aarch64:
             return new NativeRegisterContextLinux_arm64(target_arch, native_thread, concrete_frame_idx);
+        default:
+            if (log)
+                log->Printf("NativeRegisterContextLinux::%s() have no register context for architecture: %s\n", __FUNCTION__,
+                            target_arch.GetTriple().getArchName().str().c_str());
+            return nullptr;
+    }
 }
 
 NativeRegisterContextLinux_arm64::NativeRegisterContextLinux_arm64 (const ArchSpec& target_arch,
                                                                     NativeThreadProtocol &native_thread,
                                                                     uint32_t concrete_frame_idx) :
     NativeRegisterContextLinux (native_thread, concrete_frame_idx, new RegisterContextLinux_arm64(target_arch))
 {
     switch (target_arch.GetMachine())