diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -699,7 +699,8 @@
       .clampMaxNumElements(1, p0, 2);
 
   getActionDefinitionsBuilder(G_INSERT_VECTOR_ELT)
-      .legalIf(typeInSet(0, {v16s8, v8s8, v8s16, v4s16, v4s32, v2s32, v2s64}));
+      .legalIf(typeInSet(0, {v16s8, v8s8, v8s16, v2s16, v4s16,
+                             v4s32, v2s32, v2s64}));
 
   getActionDefinitionsBuilder(G_BUILD_VECTOR)
       .legalFor({{v8s8, s8},
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/pr-63826.mir b/llvm/test/CodeGen/AArch64/GlobalISel/pr-63826.mir
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/pr-63826.mir
@@ -0,0 +1,17 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=aarch64 -run-pass=legalizer -global-isel-abort=1 %s -o - | FileCheck %s
+---
+name:            pr63826
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: pr63826
+    ; CHECK: [[DEF:%[0-9]+]]:_(<2 x s16>) = IMPLICIT_DEF
+    ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s16) = IMPLICIT_DEF
+    ; CHECK-NEXT: [[DEF2:%[0-9]+]]:_(s32) = IMPLICIT_DEF
+    ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<2 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[DEF1]](s16), [[DEF2]](s32)
+    ; CHECK-NEXT: $w0 = COPY [[IVEC]](<2 x s16>)
+    %0:_(<2 x s16>) = IMPLICIT_DEF
+    %1:_(s16) = IMPLICIT_DEF
+    %2:_(s32) = IMPLICIT_DEF
+    %4:_(<2 x s16>) = G_INSERT_VECTOR_ELT %0(<2 x s16>), %1(s16), %2(s32)
+    $w0 = COPY %4(<2 x s16>)