diff --git a/llvm/test/CodeGen/LoongArch/and-add-lsr.ll b/llvm/test/CodeGen/LoongArch/and-add-lsr.ll
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/and-add-lsr.ll
@@ -0,0 +1,25 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32
+; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64
+
+define i32 @and_add_lsr(i32 %x, i32 %y) {
+; LA32-LABEL: and_add_lsr:
+; LA32:       # %bb.0:
+; LA32-NEXT:    ori $a2, $zero, 4095
+; LA32-NEXT:    add.w $a0, $a0, $a2
+; LA32-NEXT:    srli.w $a1, $a1, 20
+; LA32-NEXT:    and $a0, $a1, $a0
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: and_add_lsr:
+; LA64:       # %bb.0:
+; LA64-NEXT:    ori $a2, $zero, 4095
+; LA64-NEXT:    add.d $a0, $a0, $a2
+; LA64-NEXT:    bstrpick.d $a1, $a1, 31, 20
+; LA64-NEXT:    and $a0, $a1, $a0
+; LA64-NEXT:    ret
+  %1 = add i32 %x, 4095
+  %2 = lshr i32 %y, 20
+  %r = and i32 %2, %1
+  ret i32 %r
+}