diff --git a/llvm/lib/Target/CSKY/CSKYInstrInfo.td b/llvm/lib/Target/CSKY/CSKYInstrInfo.td
--- a/llvm/lib/Target/CSKY/CSKYInstrInfo.td
+++ b/llvm/lib/Target/CSKY/CSKYInstrInfo.td
@@ -1202,6 +1202,13 @@
 defm : BTF32Pat0<setne, seteq, uimm16, CMPNEI32>;
 defm : BTF32Pat0<setuge, setult, oimm16, CMPHSI32>;
 defm : BTF32Pat0<setlt, setge, oimm16, CMPLTI32>;
+
+def : Pat<(brcond (i32 (setne (and GPR:$rs, imm32_1_pop_bit:$im), 0)), bb:$imm16),
+          (BT32 (BTSTI32 GPR:$rs, (imm32_1_pop_bit_XFORM imm32_1_pop_bit:$im)),
+                bb:$imm16)>;
+def : Pat<(brcond (i32 (seteq (and GPR:$rs, imm32_1_pop_bit:$im), 0)), bb:$imm16),
+          (BF32 (BTSTI32 GPR:$rs, (imm32_1_pop_bit_XFORM imm32_1_pop_bit:$im)),
+                bb:$imm16)>;
 }
 
 let Predicates = [iHas2E3] in {
@@ -1366,8 +1373,16 @@
           (ISEL32 CARRY:$ca, GPR:$rx, GPR:$false)>;
 def : Pat<(select (and CARRY:$ca, 1), GPR:$rx, GPR:$false),
           (ISEL32 CARRY:$ca, GPR:$rx, GPR:$false)>;
-}
 
+def : Pat<(select (i32 (setne (and GPR:$rs, imm32_1_pop_bit:$im), 0)),
+                  GPR:$true, GPR:$false),
+          (MOVT32 (BTSTI32 GPR:$rs, (imm32_1_pop_bit_XFORM imm32_1_pop_bit:$im)),
+                  GPR:$true, GPR:$false)>;
+def : Pat<(select (i32 (seteq (and GPR:$rs, imm32_1_pop_bit:$im), 0)),
+                  GPR:$true, GPR:$false),
+          (MOVF32 (BTSTI32 GPR:$rs, (imm32_1_pop_bit_XFORM imm32_1_pop_bit:$im)),
+                  GPR:$true, GPR:$false)>;
+}
 
 let Predicates = [iHas2E3] in {
 def : Pat<(select (i32 (setne GPR:$rs1, GPR:$rs2)), (add GPR:$rx, uimm5:$imm), GPR:$false),
diff --git a/llvm/test/CodeGen/CSKY/br.ll b/llvm/test/CodeGen/CSKY/br.ll
--- a/llvm/test/CodeGen/CSKY/br.ll
+++ b/llvm/test/CodeGen/CSKY/br.ll
@@ -6615,9 +6615,8 @@
 define i32 @br_bit_test_eq_0(i32 %c) {
 ; CHECK-LABEL: br_bit_test_eq_0:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    and16 a0, a1
-; CHECK-NEXT:    bnez32 a0, .LBB145_2
+; CHECK-NEXT:    btsti16 a0, 17
+; CHECK-NEXT:    bt32 .LBB145_2
 ; CHECK-NEXT:  # %bb.1: # %label1
 ; CHECK-NEXT:    movi16 a0, 1
 ; CHECK-NEXT:    rts16
@@ -6661,9 +6660,8 @@
 define i32 @br_bit_test_ne_0(i32 %c) {
 ; CHECK-LABEL: br_bit_test_ne_0:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    and16 a0, a1
-; CHECK-NEXT:    bez32 a0, .LBB146_2
+; CHECK-NEXT:    btsti16 a0, 17
+; CHECK-NEXT:    bf32 .LBB146_2
 ; CHECK-NEXT:  # %bb.1: # %label1
 ; CHECK-NEXT:    movi16 a0, 1
 ; CHECK-NEXT:    rts16
@@ -6707,9 +6705,8 @@
 define i32 @br_bit_test_eq_mask(i32 %c) {
 ; CHECK-LABEL: br_bit_test_eq_mask:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    and16 a0, a1
-; CHECK-NEXT:    bez32 a0, .LBB147_2
+; CHECK-NEXT:    btsti16 a0, 17
+; CHECK-NEXT:    bf32 .LBB147_2
 ; CHECK-NEXT:  # %bb.1: # %label1
 ; CHECK-NEXT:    movi16 a0, 1
 ; CHECK-NEXT:    rts16
@@ -6753,9 +6750,8 @@
 define i32 @br_bit_test_ne_mask(i32 %c) {
 ; CHECK-LABEL: br_bit_test_ne_mask:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    and16 a0, a1
-; CHECK-NEXT:    bnez32 a0, .LBB148_2
+; CHECK-NEXT:    btsti16 a0, 17
+; CHECK-NEXT:    bt32 .LBB148_2
 ; CHECK-NEXT:  # %bb.1: # %label1
 ; CHECK-NEXT:    movi16 a0, 1
 ; CHECK-NEXT:    rts16
diff --git a/llvm/test/CodeGen/CSKY/select.ll b/llvm/test/CodeGen/CSKY/select.ll
--- a/llvm/test/CodeGen/CSKY/select.ll
+++ b/llvm/test/CodeGen/CSKY/select.ll
@@ -8163,9 +8163,7 @@
 define i32 @select_bit_test_eq_0(i32 %0) {
 ; CHECK-LABEL: select_bit_test_eq_0:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    and16 a0, a1
-; CHECK-NEXT:    cmpnei16 a0, 0
+; CHECK-NEXT:    btsti16 a0, 17
 ; CHECK-NEXT:    movi16 a0, 23
 ; CHECK-NEXT:    movi16 a1, 1
 ; CHECK-NEXT:    movf32 a0, a1
@@ -8189,10 +8187,10 @@
 ; GENERIC-NEXT:    mvcv16 a1
 ; GENERIC-NEXT:    movi16 a0, 1
 ; GENERIC-NEXT:    btsti16 a1, 0
-; GENERIC-NEXT:    bt16 .LBB200_2
+; GENERIC-NEXT:    bt16 .LBB202_2
 ; GENERIC-NEXT:  # %bb.1:
 ; GENERIC-NEXT:    movi16 a0, 23
-; GENERIC-NEXT:  .LBB200_2:
+; GENERIC-NEXT:  .LBB202_2:
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    rts16
   %2 = and i32 %0, 131072
@@ -8204,9 +8202,7 @@
 define i32 @select_bit_test_ne_0(i32 %0) {
 ; CHECK-LABEL: select_bit_test_ne_0:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    and16 a0, a1
-; CHECK-NEXT:    cmpnei16 a0, 0
+; CHECK-NEXT:    btsti16 a0, 17
 ; CHECK-NEXT:    movi16 a0, 34
 ; CHECK-NEXT:    movi16 a1, 5
 ; CHECK-NEXT:    movt32 a0, a1
@@ -8232,10 +8228,10 @@
 ; GENERIC-NEXT:    subu16 a1, a0
 ; GENERIC-NEXT:    movi16 a0, 5
 ; GENERIC-NEXT:    btsti16 a1, 0
-; GENERIC-NEXT:    bt16 .LBB201_2
+; GENERIC-NEXT:    bt16 .LBB203_2
 ; GENERIC-NEXT:  # %bb.1:
 ; GENERIC-NEXT:    movi16 a0, 34
-; GENERIC-NEXT:  .LBB201_2:
+; GENERIC-NEXT:  .LBB203_2:
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    rts16
   %2 = and i32 %0, 131072
@@ -8247,9 +8243,7 @@
 define i32 @select_bit_test_eq_mask(i32 %0) {
 ; CHECK-LABEL: select_bit_test_eq_mask:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    and16 a0, a1
-; CHECK-NEXT:    cmpnei16 a0, 0
+; CHECK-NEXT:    btsti16 a0, 17
 ; CHECK-NEXT:    movi16 a0, 5
 ; CHECK-NEXT:    movi16 a1, 34
 ; CHECK-NEXT:    movt32 a0, a1
@@ -8275,10 +8269,10 @@
 ; GENERIC-NEXT:    subu16 a1, a0
 ; GENERIC-NEXT:    movi16 a0, 34
 ; GENERIC-NEXT:    btsti16 a1, 0
-; GENERIC-NEXT:    bt16 .LBB202_2
+; GENERIC-NEXT:    bt16 .LBB204_2
 ; GENERIC-NEXT:  # %bb.1:
 ; GENERIC-NEXT:    movi16 a0, 5
-; GENERIC-NEXT:  .LBB202_2:
+; GENERIC-NEXT:  .LBB204_2:
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    rts16
   %2 = and i32 %0, 131072
@@ -8290,9 +8284,7 @@
 define i32 @select_bit_test_ne_mask(i32 %0) {
 ; CHECK-LABEL: select_bit_test_ne_mask:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    and16 a0, a1
-; CHECK-NEXT:    cmpnei16 a0, 0
+; CHECK-NEXT:    btsti16 a0, 17
 ; CHECK-NEXT:    movi16 a0, 34
 ; CHECK-NEXT:    movi16 a1, 5
 ; CHECK-NEXT:    movt32 a0, a1
@@ -8318,10 +8310,10 @@
 ; GENERIC-NEXT:    subu16 a1, a0
 ; GENERIC-NEXT:    movi16 a0, 5
 ; GENERIC-NEXT:    btsti16 a1, 0
-; GENERIC-NEXT:    bt16 .LBB203_2
+; GENERIC-NEXT:    bt16 .LBB205_2
 ; GENERIC-NEXT:  # %bb.1:
 ; GENERIC-NEXT:    movi16 a0, 34
-; GENERIC-NEXT:  .LBB203_2:
+; GENERIC-NEXT:  .LBB205_2:
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    rts16
   %2 = and i32 %0, 131072
@@ -8362,10 +8354,10 @@
 ; GENERIC-NEXT:    subu16 a2, a0
 ; GENERIC-NEXT:    movi16 a0, 5
 ; GENERIC-NEXT:    btsti16 a2, 0
-; GENERIC-NEXT:    bt16 .LBB204_2
+; GENERIC-NEXT:    bt16 .LBB206_2
 ; GENERIC-NEXT:  # %bb.1:
 ; GENERIC-NEXT:    movi16 a0, 34
-; GENERIC-NEXT:  .LBB204_2:
+; GENERIC-NEXT:  .LBB206_2:
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    ld16.w l0, (sp, 0) # 4-byte Folded Reload
 ; GENERIC-NEXT:    addi16 sp, sp, 4