Index: llvm/lib/Target/CSKY/CSKYInstrInfo.td
===================================================================
--- llvm/lib/Target/CSKY/CSKYInstrInfo.td
+++ llvm/lib/Target/CSKY/CSKYInstrInfo.td
@@ -1205,6 +1205,14 @@
   def : Pat<(brcond (i32 (setge GPR:$rs1, oimm16:$rs2)), bb:$imm16),
           (BF32 (CMPLTI32 GPR:$rs1, oimm16:$rs2), bb:$imm16)>;
 
+  def : Pat<(brcond (i32 (setne (and GPR:$rs, imm32_1_pop_bit:$im), 0)),
+                    bb:$imm16),
+            (BT32 (BTSTI32 GPR:$rs, (LowestSetBit imm32_1_pop_bit:$im)),
+                  bb:$imm16)>;
+  def : Pat<(brcond (i32 (seteq (and GPR:$rs, imm32_1_pop_bit:$im), 0)),
+                    bb:$imm16),
+            (BF32 (BTSTI32 GPR:$rs, (LowestSetBit imm32_1_pop_bit:$im)),
+                  bb:$imm16)>;
 }
 
 let Predicates = [iHas2E3] in {
@@ -1309,6 +1317,15 @@
 def : Pat<(select (i32 (setge GPR:$rs1, oimm16:$rs2)), GPR:$rx, GPR:$false),
           (MOVF32 (CMPLTI32 GPR:$rs1, oimm16:$rs2), GPR:$rx, GPR:$false)>;
 
+def : Pat<(select (i32 (setne (and GPR:$rs, imm32_1_pop_bit:$im), 0)),
+                  GPR:$true, GPR:$false),
+          (MOVT32 (BTSTI32 GPR:$rs, (LowestSetBit imm32_1_pop_bit:$im)),
+                  GPR:$true, GPR:$false)>;
+def : Pat<(select (i32 (seteq (and GPR:$rs, imm32_1_pop_bit:$im), 0)),
+                  GPR:$true, GPR:$false),
+          (MOVF32 (BTSTI32 GPR:$rs, (LowestSetBit imm32_1_pop_bit:$im)),
+                  GPR:$true, GPR:$false)>;
+
 def : Pat<(select CARRY:$ca, GPR:$rx, GPR:$false),
           (ISEL32 CARRY:$ca, GPR:$rx, GPR:$false)>;
 def : Pat<(select (and CARRY:$ca, 1), GPR:$rx, GPR:$false),
Index: llvm/test/CodeGen/CSKY/br.ll
===================================================================
--- llvm/test/CodeGen/CSKY/br.ll
+++ llvm/test/CodeGen/CSKY/br.ll
@@ -6630,9 +6630,8 @@
 define i32 @br_bit_test_eq_0(i32 %c) {
 ; CHECK-LABEL: br_bit_test_eq_0:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    and16 a0, a1
-; CHECK-NEXT:    bnez32 a0, .LBB145_2
+; CHECK-NEXT:    btsti16 a0, 17
+; CHECK-NEXT:    bt32 .LBB145_2
 ; CHECK-NEXT:  # %bb.1: # %label1
 ; CHECK-NEXT:    movi16 a0, 1
 ; CHECK-NEXT:    rts16
@@ -6676,9 +6675,8 @@
 define i32 @br_bit_test_ne_0(i32 %c) {
 ; CHECK-LABEL: br_bit_test_ne_0:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    and16 a0, a1
-; CHECK-NEXT:    bez32 a0, .LBB146_2
+; CHECK-NEXT:    btsti16 a0, 17
+; CHECK-NEXT:    bf32 .LBB146_2
 ; CHECK-NEXT:  # %bb.1: # %label1
 ; CHECK-NEXT:    movi16 a0, 1
 ; CHECK-NEXT:    rts16
@@ -6722,9 +6720,8 @@
 define i32 @br_bit_test_eq_mask(i32 %c) {
 ; CHECK-LABEL: br_bit_test_eq_mask:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    and16 a0, a1
-; CHECK-NEXT:    bez32 a0, .LBB147_2
+; CHECK-NEXT:    btsti16 a0, 17
+; CHECK-NEXT:    bf32 .LBB147_2
 ; CHECK-NEXT:  # %bb.1: # %label1
 ; CHECK-NEXT:    movi16 a0, 1
 ; CHECK-NEXT:    rts16
@@ -6768,9 +6765,8 @@
 define i32 @br_bit_test_ne_mask(i32 %c) {
 ; CHECK-LABEL: br_bit_test_ne_mask:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    and16 a0, a1
-; CHECK-NEXT:    bnez32 a0, .LBB148_2
+; CHECK-NEXT:    btsti16 a0, 17
+; CHECK-NEXT:    bt32 .LBB148_2
 ; CHECK-NEXT:  # %bb.1: # %label1
 ; CHECK-NEXT:    movi16 a0, 1
 ; CHECK-NEXT:    rts16
Index: llvm/test/CodeGen/CSKY/select.ll
===================================================================
--- llvm/test/CodeGen/CSKY/select.ll
+++ llvm/test/CodeGen/CSKY/select.ll
@@ -8112,9 +8112,7 @@
 define i32 @select_bit_test_eq_0(i32 %0) {
 ; CHECK-LABEL: select_bit_test_eq_0:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    and16 a0, a1
-; CHECK-NEXT:    cmpnei16 a0, 0
+; CHECK-NEXT:    btsti16 a0, 17
 ; CHECK-NEXT:    movi16 a0, 23
 ; CHECK-NEXT:    movi16 a1, 1
 ; CHECK-NEXT:    movf32 a0, a1
@@ -8153,9 +8151,7 @@
 define i32 @select_bit_test_ne_0(i32 %0) {
 ; CHECK-LABEL: select_bit_test_ne_0:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    and16 a0, a1
-; CHECK-NEXT:    cmpnei16 a0, 0
+; CHECK-NEXT:    btsti16 a0, 17
 ; CHECK-NEXT:    movi16 a0, 34
 ; CHECK-NEXT:    movi16 a1, 5
 ; CHECK-NEXT:    movt32 a0, a1
@@ -8196,9 +8192,7 @@
 define i32 @select_bit_test_eq_mask(i32 %0) {
 ; CHECK-LABEL: select_bit_test_eq_mask:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    and16 a0, a1
-; CHECK-NEXT:    cmpnei16 a0, 0
+; CHECK-NEXT:    btsti16 a0, 17
 ; CHECK-NEXT:    movi16 a0, 5
 ; CHECK-NEXT:    movi16 a1, 34
 ; CHECK-NEXT:    movt32 a0, a1
@@ -8239,9 +8233,7 @@
 define i32 @select_bit_test_ne_mask(i32 %0) {
 ; CHECK-LABEL: select_bit_test_ne_mask:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    and16 a0, a1
-; CHECK-NEXT:    cmpnei16 a0, 0
+; CHECK-NEXT:    btsti16 a0, 17
 ; CHECK-NEXT:    movi16 a0, 34
 ; CHECK-NEXT:    movi16 a1, 5
 ; CHECK-NEXT:    movt32 a0, a1