Index: ELF/Writer.cpp =================================================================== --- ELF/Writer.cpp +++ ELF/Writer.cpp @@ -50,6 +50,10 @@ void scanRelocs(InputSectionBase &S, const Elf_Shdr &RelSec); void updateRelro(Elf_Phdr *Cur, Elf_Phdr *GnuRelroPhdr, OutputSectionBase *Sec, uintX_t VA); + bool alignRelro(bool &RelroAligned, Elf_Phdr *Cur, Elf_Phdr *GnuRelroPhdr, + OutputSectionBase *Sec, uintX_t &VA, uintX_t &FileOff); + bool isRelroEnded(Elf_Phdr *Cur, Elf_Phdr *GnuRelroPhdr, + OutputSectionBase *Sec); void assignAddresses(); void buildSectionMap(); void openFile(StringRef OutputPath); @@ -838,6 +842,14 @@ } template +bool Writer::isRelroEnded(Elf_Phdr *Cur, Elf_Phdr *GnuRelroPhdr, + OutputSectionBase *Sec) { + if (!Config->ZRelro || ((Cur->p_flags & PF_W) && isRelroSection(Sec))) + return false; + return GnuRelroPhdr->p_type; +} + +template void Writer::updateRelro(Elf_Phdr *Cur, Elf_Phdr *GnuRelroPhdr, OutputSectionBase *Sec, uintX_t VA) { if (!Config->ZRelro || !(Cur->p_flags & PF_W) || !isRelroSection(Sec)) @@ -849,6 +861,22 @@ GnuRelroPhdr->p_memsz = VA - Cur->p_vaddr; } +template +bool Writer::alignRelro(bool &RelroAligned, Elf_Phdr *Cur, + Elf_Phdr *GnuRelroPhdr, + OutputSectionBase *Sec, uintX_t &VA, + uintX_t &FileOff) { + if (RelroAligned || !isRelroEnded(Cur, GnuRelroPhdr, Sec)) + return false; + VA = RoundUpToAlignment(VA, Target->getPageSize()); + VA = RoundUpToAlignment(VA, Sec->getAlign()); + FileOff = RoundUpToAlignment(FileOff, Target->getPageSize()); + Sec->setVA(VA); + VA += Sec->getSize(); + RelroAligned = true; + return true; +} + // Visits all sections to create PHDRs and to assign incremental, // non-overlapping addresses to output sections. template void Writer::assignAddresses() { @@ -876,6 +904,7 @@ Target->getPageSize()); Elf_Phdr GnuRelroPhdr = {}; + bool GnuRelroAligned = false; Elf_Phdr TlsPhdr{}; uintX_t ThreadBSSOffset = 0; // Create phdrs as we assign VAs and file offsets to all output sections. @@ -906,10 +935,13 @@ } TlsPhdr.p_align = std::max(TlsPhdr.p_align, Sec->getAlign()); } else { - VA = RoundUpToAlignment(VA, Sec->getAlign()); - Sec->setVA(VA); - VA += Sec->getSize(); - updateRelro(&Phdrs[PhdrIdx], &GnuRelroPhdr, Sec, VA); + if (!alignRelro(GnuRelroAligned, &Phdrs[PhdrIdx], &GnuRelroPhdr, Sec, + VA, FileOff)) { + VA = RoundUpToAlignment(VA, Sec->getAlign()); + Sec->setVA(VA); + VA += Sec->getSize(); + updateRelro(&Phdrs[PhdrIdx], &GnuRelroPhdr, Sec, VA); + } } } Index: test/ELF/aarch64-copy.s =================================================================== --- test/ELF/aarch64-copy.s +++ test/ELF/aarch64-copy.s @@ -22,7 +22,7 @@ // CHECK-NEXT: SHF_ALLOC // CHECK-NEXT: SHF_WRITE // CHECK-NEXT: ] -// CHECK-NEXT: Address: 0x120B0 +// CHECK-NEXT: Address: 0x13010 // CHECK-NEXT: Offset: // CHECK-NEXT: Size: 24 // CHECK-NEXT: Link: @@ -32,19 +32,19 @@ // CHECK: Relocations [ // CHECK-NEXT: Section ({{.*}}) .rela.dyn { // CHECK-NEXT: Relocation { -// CHECK-NEXT: Offset: 0x120B0 +// CHECK-NEXT: Offset: 0x13010 // CHECK-NEXT: Type: R_AARCH64_COPY // CHECK-NEXT: Symbol: x // CHECK-NEXT: Addend: 0x0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { -// CHECK-NEXT: Offset: 0x120C0 +// CHECK-NEXT: Offset: 0x13020 // CHECK-NEXT: Type: R_AARCH64_COPY // CHECK-NEXT: Symbol: y // CHECK-NEXT: Addend: 0x0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { -// CHECK-NEXT: Offset: 0x120C4 +// CHECK-NEXT: Offset: 0x13024 // CHECK-NEXT: Type: R_AARCH64_COPY // CHECK-NEXT: Symbol: z // CHECK-NEXT: Addend: 0x0 @@ -54,21 +54,21 @@ // CHECK: Symbols [ // CHECK: Name: x -// CHECK-NEXT: Value: 0x120B0 +// CHECK-NEXT: Value: 0x13010 // CHECK-NEXT: Size: 4 // CHECK-NEXT: Binding: Global // CHECK-NEXT: Type: Object // CHECK-NEXT: Other: // CHECK-NEXT: Section: .bss // CHECK: Name: y -// CHECK-NEXT: Value: 0x120C0 +// CHECK-NEXT: Value: 0x13020 // CHECK-NEXT: Size: 4 // CHECK-NEXT: Binding: Global // CHECK-NEXT: Type: Object // CHECK-NEXT: Other: // CHECK-NEXT: Section: .bss // CHECK: Name: z -// CHECK-NEXT: Value: 0x120C4 +// CHECK-NEXT: Value: 0x13024 // CHECK-NEXT: Size: 4 // CHECK-NEXT: Binding: Global // CHECK-NEXT: Type: Object @@ -78,16 +78,16 @@ // CODE: Disassembly of section .text: // CODE-NEXT: _start: -// S(x) = 0x120B0, A = 0, P = 0x11000 -// S + A - P = 0x10B0 = 4272 -// CODE-NEXT: 11000: {{.*}} adr x1, #4272 -// S(y) = 0x120C0, A = 0, P = 0x11004 -// Page(S + A) - Page(P) = 0x12000 - 0x11000 = 0x1000 - 4096 -// CODE-NEXT: 11004: {{.*}} adrp x2, #4096 -// S(y) = 0x120C0, A = 0 -// (S + A) & 0xFFF = 0xC0 = 192 -// CODE-NEXT: 11008: {{.*}} add x2, x2, #192 +// S(x) = 0x13010, A = 0, P = 0x11000 +// S + A - P = 0x10B0 = 8208 +// CODE-NEXT: 11000: {{.*}} adr x1, #8208 +// S(y) = 0x13020, A = 0, P = 0x11004 +// Page(S + A) - Page(P) = 0x13000 - 0x11000 = 0x2000 = 8192 +// CODE-NEXT: 11004: {{.*}} adrp x2, #8192 +// S(y) = 0x13020, A = 0 +// (S + A) & 0xFFF = 0x20 = 32 +// CODE-NEXT: 11008: {{.*}} add x2, x2, #32 // DATA: Contents of section .data: -// S(z) = 0x120c4 -// DATA-NEXT: 120a0 c4200100 +// S(z) = 0x13024 +// DATA-NEXT: 13000 24300100 Index: test/ELF/dynamic-reloc-index.s =================================================================== --- test/ELF/dynamic-reloc-index.s +++ test/ELF/dynamic-reloc-index.s @@ -8,7 +8,7 @@ // CHECK: Relocations [ // CHECK-NEXT: Section ({{.*}}) .rela.plt { -// CHECK-NEXT: 0x120C8 R_X86_64_JUMP_SLOT bar 0x0 +// CHECK-NEXT: 0x13018 R_X86_64_JUMP_SLOT bar 0x0 // CHECK-NEXT: } // CHECK-NEXT: ] Index: test/ELF/dynamic-reloc.s =================================================================== --- test/ELF/dynamic-reloc.s +++ test/ELF/dynamic-reloc.s @@ -33,7 +33,7 @@ // CHECK: Relocations [ // CHECK-NEXT: Section ({{.*}}) .rela.plt { // CHECK-NEXT: Relocation { -// CHECK-NEXT: Offset: 0x120C8 +// CHECK-NEXT: Offset: 0x13018 // CHECK-NEXT: Type: R_X86_64_JUMP_SLOT // CHECK-NEXT: Symbol: bar // CHECK-NEXT: Addend: 0x0 Index: test/ELF/mips-got-relocs.s =================================================================== --- test/ELF/mips-got-relocs.s +++ test/ELF/mips-got-relocs.s @@ -49,17 +49,17 @@ # EXE_SYM: SYMBOL TABLE: # EXE_SYM: 00037ff0 *ABS* 00000000 _gp # ^-- .got + GP offset (0x7ff0) -# EXE_SYM: 00030010 g .data 00000004 v1 +# EXE_SYM: 00040000 g .data 00000004 v1 # EXE_GOT_BE: Contents of section .got: -# EXE_GOT_BE: 30000 00000000 80000000 00030010 -# ^ ^ ^-- v1 (0x30010) +# EXE_GOT_BE: 30000 00000000 80000000 00040000 +# ^ ^ ^-- v1 (0x40000) # | +-- Module pointer (0x80000000) # +-- Lazy resolver (0x0) # EXE_GOT_EL: Contents of section .got: -# EXE_GOT_EL: 30000 00000000 00000080 10000300 -# ^ ^ ^-- v1 (0x30010) +# EXE_GOT_EL: 30000 00000000 00000080 00000400 +# ^ ^ ^-- v1 (0x40000) # | +-- Module pointer (0x80000000) # +-- Lazy resolver (0x0) @@ -72,17 +72,17 @@ # DSO_SYM: SYMBOL TABLE: # DSO_SYM: 00027ff0 *ABS* 00000000 _gp # ^-- .got + GP offset (0x7ff0) -# DSO_SYM: 00020010 g .data 00000004 v1 +# DSO_SYM: 00030000 g .data 00000004 v1 # DSO_GOT_BE: Contents of section .got: -# DSO_GOT_BE: 20000 00000000 80000000 00020010 -# ^ ^ ^-- v1 (0x20010) +# DSO_GOT_BE: 20000 00000000 80000000 00030000 +# ^ ^ ^-- v1 (0x30000) # | +-- Module pointer (0x80000000) # +-- Lazy resolver (0x0) # DSO_GOT_EL: Contents of section .got: -# DSO_GOT_EL: 20000 00000000 00000080 10000200 -# ^ ^ ^-- v1 (0x20010) +# DSO_GOT_EL: 20000 00000000 00000080 00000300 +# ^ ^ ^-- v1 (0x30000) # | +-- Module pointer (0x80000000) # +-- Lazy resolver (0x0) Index: test/ELF/plt-aarch64.s =================================================================== --- test/ELF/plt-aarch64.s +++ test/ELF/plt-aarch64.s @@ -31,7 +31,7 @@ // CHECKDSO-NEXT: SHF_ALLOC // CHECKDSO-NEXT: SHF_WRITE // CHECKDSO-NEXT: ] -// CHECKDSO-NEXT: Address: 0x20B0 +// CHECKDSO-NEXT: Address: 0x3000 // CHECKDSO-NEXT: Offset: // CHECKDSO-NEXT: Size: 48 // CHECKDSO-NEXT: Link: @@ -41,23 +41,23 @@ // CHECKDSO: Relocations [ // CHECKDSO-NEXT: Section ({{.*}}) .rela.plt { -// &(.got.plt[3]) = 0x20B0 + 3 * 8 = 0x20C8 -// CHECKDSO-NEXT: 0x20C8 R_AARCH64_JUMP_SLOT foo +// &(.got.plt[3]) = 0x3000 + 3 * 8 = 0x3018 +// CHECKDSO-NEXT: 0x3018 R_AARCH64_JUMP_SLOT foo -// &(.got.plt[4]) = 0x20B0 + 4 * 8 = 0x20D0 -// CHECKDSO-NEXT: 0x20D0 R_AARCH64_JUMP_SLOT bar +// &(.got.plt[4]) = 0x3000 + 4 * 8 = 0x3020 +// CHECKDSO-NEXT: 0x3020 R_AARCH64_JUMP_SLOT bar -// &(.got.plt[5]) = 0x20B0 + 5 * 8 = 0x20D8 -// CHECKDSO-NEXT: 0x20D8 R_AARCH64_JUMP_SLOT weak +// &(.got.plt[5]) = 0x3000 + 5 * 8 = 0x3028 +// CHECKDSO-NEXT: 0x3028 R_AARCH64_JUMP_SLOT weak // CHECKDSO-NEXT: } // CHECKDSO-NEXT: ] // DUMPDSO: Contents of section .got.plt: // .got.plt[0..2] = 0 (reserved) // .got.plt[3..5] = .plt = 0x1010 -// DUMPDSO-NEXT: 20b0 00000000 00000000 00000000 00000000 ................ -// DUMPDSO-NEXT: 20c0 00000000 00000000 10100000 00000000 ................ -// DUMPDSO-NEXT: 20d0 10100000 00000000 10100000 00000000 ................ +// DUMPDSO-NEXT: 3000 00000000 00000000 00000000 00000000 ................ +// DUMPDSO-NEXT: 3010 00000000 00000000 10100000 00000000 ................ +// DUMPDSO-NEXT: 3020 10100000 00000000 10100000 00000000 ................ // DISASMDSO: _start: // 0x1030 - 0x1000 = 0x30 = 48 @@ -73,39 +73,39 @@ // DISASMDSO: Disassembly of section .plt: // DISASMDSO-NEXT: .plt: // DISASMDSO-NEXT: 1010: f0 7b bf a9 stp x16, x30, [sp, #-16]! -// &(.got.plt[2]) = 0x20B0 + 2 * 8 = 0x20C0 -// Page(0x20C0) - Page(0x1014) = 0x2000 - 0x1000 = 0x1000 = 4096 -// DISASMDSO-NEXT: 1014: 10 00 00 b0 adrp x16, #4096 -// 0x20c0 & 0xFFF = 0xC0 = 192 -// DISASMDSO-NEXT: 1018: 11 62 40 f9 ldr x17, [x16, #192] -// DISASMDSO-NEXT: 101c: 10 02 03 91 add x16, x16, #192 +// &(.got.plt[2]) = 0x3000 + 2 * 8 = 0x3010 +// Page(0x3010) - Page(0x1014) = 0x3000 - 0x1000 = 0x2000 = 8192 +// DISASMDSO-NEXT: 1014: 10 00 00 d0 adrp x16, #8192 +// 0x3010 & 0xFFF = 0x10 = 16 +// DISASMDSO-NEXT: 1018: 11 0a 40 f9 ldr x17, [x16, #16] +// DISASMDSO-NEXT: 101c: 10 42 00 91 add x16, x16, #16 // DISASMDSO-NEXT: 1020: 20 02 1f d6 br x17 // DISASMDSO-NEXT: 1024: 1f 20 03 d5 nop // DISASMDSO-NEXT: 1028: 1f 20 03 d5 nop // DISASMDSO-NEXT: 102c: 1f 20 03 d5 nop // foo@plt -// Page(0x20C8) - Page(0x1030) = 0x2000 - 0x1000 = 0x1000 = 4096 -// DISASMDSO-NEXT: 1030: 10 00 00 b0 adrp x16, #4096 -// 0x20C8 & 0xFFF = 0xC8 = 200 -// DISASMDSO-NEXT: 1034: 11 66 40 f9 ldr x17, [x16, #200] -// DISASMDSO-NEXT: 1038: 10 22 03 91 add x16, x16, #200 +// Page(0x3018) - Page(0x1030) = 0x3000 - 0x1000 = 0x2000 = 8192 +// DISASMDSO-NEXT: 1030: 10 00 00 d0 adrp x16, #8192 +// 0x3018 & 0xFFF = 0x18 = 24 +// DISASMDSO-NEXT: 1034: 11 0e 40 f9 ldr x17, [x16, #24] +// DISASMDSO-NEXT: 1038: 10 62 00 91 add x16, x16, #24 // DISASMDSO-NEXT: 103c: 20 02 1f d6 br x17 // bar@plt -// Page(0x20D0) - Page(0x1040) = 0x2000 - 0x1000 = 0x1000 = 4096 -// DISASMDSO-NEXT: 1040: 10 00 00 b0 adrp x16, #4096 -// 0x20D0 & 0xFFF = 0xD0 = 208 -// DISASMDSO-NEXT: 1044: 11 6a 40 f9 ldr x17, [x16, #208] -// DISASMDSO-NEXT: 1048: 10 42 03 91 add x16, x16, #208 +// Page(0x3020) - Page(0x1040) = 0x3000 - 0x1000 = 0x2000 = 8192 +// DISASMDSO-NEXT: 1040: 10 00 00 d0 adrp x16, #8192 +// 0x3020 & 0xFFF = 0x20 = 32 +// DISASMDSO-NEXT: 1044: 11 12 40 f9 ldr x17, [x16, #32] +// DISASMDSO-NEXT: 1048: 10 82 00 91 add x16, x16, #32 // DISASMDSO-NEXT: 104c: 20 02 1f d6 br x17 // weak@plt -// Page(0x20D8) - Page(0x1050) = 0x2000 - 0x1000 = 0x1000 = 4096 -// DISASMDSO-NEXT: 1050: 10 00 00 b0 adrp x16, #4096 -// 0x20D8 & 0xFFF = 0xD8 = 216 -// DISASMDSO-NEXT: 1054: 11 6e 40 f9 ldr x17, [x16, #216] -// DISASMDSO-NEXT: 1058: 10 62 03 91 add x16, x16, #216 +// Page(0x3028) - Page(0x1050) = 0x3000 - 0x1000 = 0x2000 = 8192 +// DISASMDSO-NEXT: 1050: 10 00 00 d0 adrp x16, #8192 +// 0x3028 & 0xFFF = 0x28 = 40 +// DISASMDSO-NEXT: 1054: 11 16 40 f9 ldr x17, [x16, #40] +// DISASMDSO-NEXT: 1058: 10 a2 00 91 add x16, x16, #40 // DISASMDSO-NEXT: 105c: 20 02 1f d6 br x17 // CHECKEXE: Name: .plt @@ -127,7 +127,7 @@ // CHECKEXE-NEXT: SHF_ALLOC // CHECKEXE-NEXT: SHF_WRITE // CHECKEXE-NEXT: ] -// CHECKEXE-NEXT: Address: 0x120B0 +// CHECKEXE-NEXT: Address: 0x13000 // CHECKEXE-NEXT: Offset: // CHECKEXE-NEXT: Size: 40 // CHECKEXE-NEXT: Link: @@ -137,20 +137,20 @@ // CHECKEXE: Relocations [ // CHECKEXE-NEXT: Section ({{.*}}) .rela.plt { -// &(.got.plt[3]) = 0x120B0 + 3 * 8 = 0x120C8 -// CHECKEXE-NEXT: 0x120C8 R_AARCH64_JUMP_SLOT bar 0x0 +// &(.got.plt[3]) = 0x13000 + 3 * 8 = 0x13018 +// CHECKEXE-NEXT: 0x13018 R_AARCH64_JUMP_SLOT bar 0x0 -// &(.got.plt[4]) = 0x120B0 + 4 * 8 = 0x120D0 -// CHECKEXE-NEXT: 0x120D0 R_AARCH64_JUMP_SLOT weak 0x0 +// &(.got.plt[4]) = 0x13000 + 4 * 8 = 0x13020 +// CHECKEXE-NEXT: 0x13020 R_AARCH64_JUMP_SLOT weak 0x0 // CHECKEXE-NEXT: } // CHECKEXE-NEXT: ] // DUMPEXE: Contents of section .got.plt: // .got.plt[0..2] = 0 (reserved) // .got.plt[3..4] = .plt = 0x11010 -// DUMPEXE-NEXT: 120b0 00000000 00000000 00000000 00000000 ................ -// DUMPEXE-NEXT: 120c0 00000000 00000000 10100100 00000000 ................ -// DUMPEXE-NEXT: 120d0 10100100 00000000 ........ +// DUMPEXE-NEXT: 13000 00000000 00000000 00000000 00000000 ................ +// DUMPEXE-NEXT: 13010 00000000 00000000 10100100 00000000 ................ +// DUMPEXE-NEXT: 13020 10100100 00000000 ........ // DISASMEXE: _start: // 0x1100c - 0x11000 = 0xc = 12 @@ -167,30 +167,30 @@ // DISASMEXE-NEXT: .plt: // DISASMEXE-NEXT: 11010: f0 7b bf a9 stp x16, x30, [sp, #-16]! // &(.got.plt[2]) = 0x120B0 + 2 * 8 = 0x120C0 -// Page(0x120C0) - Page(0x11014) = 0x12000 - 0x11000 = 0x1000 = 4096 -// DISASMEXE-NEXT: 11014: 10 00 00 b0 adrp x16, #4096 +// Page(0x13010) - Page(0x11014) = 0x13000 - 0x11000 = 0x1000 = 8192 +// DISASMEXE-NEXT: 11014: 10 00 00 d0 adrp x16, #8192 // 0x120c0 & 0xFFF = 0xC0 = 192 -// DISASMEXE-NEXT: 11018: 11 62 40 f9 ldr x17, [x16, #192] -// DISASMEXE-NEXT: 1101c: 10 02 03 91 add x16, x16, #192 +// DISASMEXE-NEXT: 11018: 11 0a 40 f9 ldr x17, [x16, #16] +// DISASMEXE-NEXT: 1101c: 10 42 00 91 add x16, x16, #16 // DISASMEXE-NEXT: 11020: 20 02 1f d6 br x17 // DISASMEXE-NEXT: 11024: 1f 20 03 d5 nop // DISASMEXE-NEXT: 11028: 1f 20 03 d5 nop // DISASMEXE-NEXT: 1102c: 1f 20 03 d5 nop // bar@plt -// Page(0x120C8) - Page(0x11030) = 0x12000 - 0x11000 = 0x1000 = 4096 -// DISASMEXE-NEXT: 11030: 10 00 00 b0 adrp x16, #4096 +// Page(0x13018) - Page(0x11030) = 0x12000 - 0x11000 = 0x1000 = 8192 +// DISASMEXE-NEXT: 11030: 10 00 00 d0 adrp x16, #8192 // 0x120C8 & 0xFFF = 0xC8 = 200 -// DISASMEXE-NEXT: 11034: 11 66 40 f9 ldr x17, [x16, #200] -// DISASMEXE-NEXT: 11038: 10 22 03 91 add x16, x16, #200 +// DISASMEXE-NEXT: 11034: 11 0e 40 f9 ldr x17, [x16, #24] +// DISASMEXE-NEXT: 11038: 10 62 00 91 add x16, x16, #24 // DISASMEXE-NEXT: 1103c: 20 02 1f d6 br x17 // weak@plt -// Page(0x120D0) - Page(0x11040) = 0x12000 - 0x11000 = 0x1000 = 4096 -// DISASMEXE-NEXT: 11040: 10 00 00 b0 adrp x16, #4096 +// Page(0x13020) - Page(0x11040) = 0x12000 - 0x11000 = 0x1000 = 8192 +// DISASMEXE-NEXT: 11040: 10 00 00 d0 adrp x16, #8192 // 0x120D0 & 0xFFF = 0xD0 = 208 -// DISASMEXE-NEXT: 11044: 11 6a 40 f9 ldr x17, [x16, #208] -// DISASMEXE-NEXT: 11048: 10 42 03 91 add x16, x16, #208 +// DISASMEXE-NEXT: 11044: 11 12 40 f9 ldr x17, [x16, #32] +// DISASMEXE-NEXT: 11048: 10 82 00 91 add x16, x16, #32 // DISASMEXE-NEXT: 1104c: 20 02 1f d6 br x17 .global _start,foo,bar Index: test/ELF/plt-i686.s =================================================================== --- test/ELF/plt-i686.s +++ test/ELF/plt-i686.s @@ -29,20 +29,20 @@ // CHECK-NEXT: SHF_ALLOC // CHECK-NEXT: SHF_WRITE // CHECK-NEXT: ] -// CHECK-NEXT: Address: 0x12058 -// CHECK-NEXT: Offset: 0x2058 +// CHECK-NEXT: Address: 0x13000 +// CHECK-NEXT: Offset: 0x3000 // CHECK-NEXT: Size: 20 // CHECK-NEXT: Link: 0 // CHECK-NEXT: Info: 0 // CHECK-NEXT: AddressAlignment: 4 // CHECK-NEXT: EntrySize: 0 -// 0x12058 + got.plt.reserved(12) = 0x12064 -// 0x12058 + got.plt.reserved(12) + 4 = 0x12068 +// 0x13000 + got.plt.reserved(12) = 0x1300C +// 0x13000 + got.plt.reserved(12) + 4 = 0x13010 // CHECK: Relocations [ // CHECK-NEXT: Section ({{.*}}) .rel.plt { -// CHECK-NEXT: 0x12064 R_386_JUMP_SLOT bar 0x0 -// CHECK-NEXT: 0x12068 R_386_JUMP_SLOT zed 0x0 +// CHECK-NEXT: 0x1300C R_386_JUMP_SLOT bar 0x0 +// CHECK-NEXT: 0x13010 R_386_JUMP_SLOT zed 0x0 // CHECK-NEXT: } // CHECK-NEXT: ] @@ -66,22 +66,22 @@ // 0x11010 - 0x1102b - 5 = -32 // 0x11010 - 0x1103b - 5 = -48 -// 73820 = 0x1205C = .got.plt (0x12058) + 4 -// 73824 = 0x12060 = .got.plt (0x12058) + 8 -// 73828 = 0x12064 = .got.plt (0x12058) + got.plt.reserved(12) -// 73832 = 0x12068 = .got.plt (0x12058) + got.plt.reserved(12) + 4 +// 77828 = 0x13004 = .got.plt (0x13000) + 4 +// 77832 = 0x13008 = .got.plt (0x13000) + 8 +// 77836 = 0x1300C = .got.plt (0x13000) + got.plt.reserved(12) +// 77840 = 0x13010 = .got.plt (0x13000) + got.plt.reserved(12) + 4 // DISASM: Disassembly of section .plt: // DISASM-NEXT: .plt: -// DISASM-NEXT: 11020: ff 35 5c 20 01 00 pushl 73820 -// DISASM-NEXT: 11026: ff 25 60 20 01 00 jmpl *73824 +// DISASM-NEXT: 11020: ff 35 04 30 01 00 pushl 77828 +// DISASM-NEXT: 11026: ff 25 08 30 01 00 jmpl *77832 // DISASM-NEXT: 1102c: 90 nop // DISASM-NEXT: 1102d: 90 nop // DISASM-NEXT: 1102e: 90 nop // DISASM-NEXT: 1102f: 90 nop -// DISASM-NEXT: 11030: ff 25 64 20 01 00 jmpl *73828 +// DISASM-NEXT: 11030: ff 25 0c 30 01 00 jmpl *77836 // DISASM-NEXT: 11036: 68 00 00 00 00 pushl $0 // DISASM-NEXT: 1103b: e9 e0 ff ff ff jmp -32 <.plt> -// DISASM-NEXT: 11040: ff 25 68 20 01 00 jmpl *73832 +// DISASM-NEXT: 11040: ff 25 10 30 01 00 jmpl *77840 // DISASM-NEXT: 11046: 68 08 00 00 00 pushl $8 // DISASM-NEXT: 1104b: e9 d0 ff ff ff jmp -48 <.plt> @@ -105,8 +105,8 @@ // CHECKSHARED-NEXT: SHF_ALLOC // CHECKSHARED-NEXT: SHF_WRITE // CHECKSHARED-NEXT: ] -// CHECKSHARED-NEXT: Address: 0x2058 -// CHECKSHARED-NEXT: Offset: 0x2058 +// CHECKSHARED-NEXT: Address: 0x3000 +// CHECKSHARED-NEXT: Offset: 0x3000 // CHECKSHARED-NEXT: Size: 20 // CHECKSHARED-NEXT: Link: 0 // CHECKSHARED-NEXT: Info: 0 @@ -114,12 +114,12 @@ // CHECKSHARED-NEXT: EntrySize: 0 // CHECKSHARED-NEXT: } -// 0x2058 + got.plt.reserved(12) = 0x2064 -// 0x2058 + got.plt.reserved(12) + 4 = 0x2068 +// 0x3000 + got.plt.reserved(12) = 0x300C +// 0x3000 + got.plt.reserved(12) + 4 = 0x3010 // CHECKSHARED: Relocations [ // CHECKSHARED-NEXT: Section ({{.*}}) .rel.plt { -// CHECKSHARED-NEXT: 0x2064 R_386_JUMP_SLOT bar 0x0 -// CHECKSHARED-NEXT: 0x2068 R_386_JUMP_SLOT zed 0x0 +// CHECKSHARED-NEXT: 0x300C R_386_JUMP_SLOT bar 0x0 +// CHECKSHARED-NEXT: 0x3010 R_386_JUMP_SLOT zed 0x0 // CHECKSHARED-NEXT: } // CHECKSHARED-NEXT: ] Index: test/ELF/plt.s =================================================================== --- test/ELF/plt.s +++ test/ELF/plt.s @@ -25,9 +25,9 @@ // CHECK: Relocations [ // CHECK-NEXT: Section ({{.*}}) .rela.plt { -// CHECK-NEXT: 0x20C8 R_X86_64_JUMP_SLOT bar 0x0 -// CHECK-NEXT: 0x20D0 R_X86_64_JUMP_SLOT zed 0x0 -// CHECK-NEXT: 0x20D8 R_X86_64_JUMP_SLOT _start 0x0 +// CHECK-NEXT: 0x3018 R_X86_64_JUMP_SLOT bar 0x0 +// CHECK-NEXT: 0x3020 R_X86_64_JUMP_SLOT zed 0x0 +// CHECK-NEXT: 0x3028 R_X86_64_JUMP_SLOT _start 0x0 // CHECK-NEXT: } // CHECK-NEXT: ] @@ -46,8 +46,8 @@ // CHECK2: Relocations [ // CHECK2-NEXT: Section ({{.*}}) .rela.plt { -// CHECK2-NEXT: 0x120C8 R_X86_64_JUMP_SLOT bar 0x0 -// CHECK2-NEXT: 0x120D0 R_X86_64_JUMP_SLOT zed 0x0 +// CHECK2-NEXT: 0x13018 R_X86_64_JUMP_SLOT bar 0x0 +// CHECK2-NEXT: 0x13020 R_X86_64_JUMP_SLOT zed 0x0 // CHECK2-NEXT: } // CHECK2-NEXT: ] @@ -65,22 +65,22 @@ // DISASM-NEXT: 100a: e9 {{.*}} jmp 49 // DISASM-NEXT: 100f: e9 {{.*}} jmp 60 -// 0x20C8 - 0x1036 = 4242 -// 0x20D0 - 0x1046 = 4234 -// 0x20D8 - 0x1056 = 4226 +// 0x3018 - 0x1036 = 8162 +// 0x3020 - 0x1046 = 4234 +// 0x3028 - 0x1056 = 4226 // DISASM: Disassembly of section .plt: // DISASM-NEXT: .plt: -// DISASM-NEXT: 1020: ff 35 92 10 00 00 pushq 4242(%rip) -// DISASM-NEXT: 1026: ff 25 94 10 00 00 jmpq *4244(%rip) +// DISASM-NEXT: 1020: ff 35 e2 1f 00 00 pushq 8162(%rip) +// DISASM-NEXT: 1026: ff 25 e4 1f 00 00 jmpq *8164(%rip) // DISASM-NEXT: 102c: 0f 1f 40 00 nopl (%rax) -// DISASM-NEXT: 1030: ff 25 92 10 00 00 jmpq *4242(%rip) +// DISASM-NEXT: 1030: ff 25 e2 1f 00 00 jmpq *8162(%rip) // DISASM-NEXT: 1036: 68 00 00 00 00 pushq $0 // DISASM-NEXT: 103b: e9 e0 ff ff ff jmp -32 <.plt> -// DISASM-NEXT: 1040: ff 25 8a 10 00 00 jmpq *4234(%rip) +// DISASM-NEXT: 1040: ff 25 da 1f 00 00 jmpq *8154(%rip) // DISASM-NEXT: 1046: 68 01 00 00 00 pushq $1 // DISASM-NEXT: 104b: e9 d0 ff ff ff jmp -48 <.plt> -// DISASM-NEXT: 1050: ff 25 82 10 00 00 jmpq *4226(%rip) +// DISASM-NEXT: 1050: ff 25 d2 1f 00 00 jmpq *8146(%rip) // DISASM-NEXT: 1056: 68 02 00 00 00 pushq $2 // DISASM-NEXT: 105b: e9 c0 ff ff ff jmp -64 <.plt> @@ -95,18 +95,18 @@ // DISASM2-NEXT: 1100a: e9 {{.*}} jmp 49 // DISASM2-NEXT: 1100f: e9 {{.*}} jmp -20 -// 0x120C8 - 0x11036 = 4242 -// 0x120D0 - 0x11046 = 4234 +// 0x13018 - 0x11036 = 4242 +// 0x13020 - 0x11046 = 4234 // DISASM2: Disassembly of section .plt: // DISASM2-NEXT: .plt: -// DISASM2-NEXT: 11020: ff 35 92 10 00 00 pushq 4242(%rip) -// DISASM2-NEXT: 11026: ff 25 94 10 00 00 jmpq *4244(%rip) +// DISASM2-NEXT: 11020: ff 35 e2 1f 00 00 pushq 8162(%rip) +// DISASM2-NEXT: 11026: ff 25 e4 1f 00 00 jmpq *8164(%rip) // DISASM2-NEXT: 1102c: 0f 1f 40 00 nopl (%rax) -// DISASM2-NEXT: 11030: ff 25 92 10 00 00 jmpq *4242(%rip) +// DISASM2-NEXT: 11030: ff 25 e2 1f 00 00 jmpq *8162(%rip) // DISASM2-NEXT: 11036: 68 00 00 00 00 pushq $0 // DISASM2-NEXT: 1103b: e9 e0 ff ff ff jmp -32 <.plt> -// DISASM2-NEXT: 11040: ff 25 8a 10 00 00 jmpq *4234(%rip) +// DISASM2-NEXT: 11040: ff 25 da 1f 00 00 jmpq *8154(%rip) // DISASM2-NEXT: 11046: 68 01 00 00 00 pushq $1 // DISASM2-NEXT: 1104b: e9 d0 ff ff ff jmp -48 <.plt> // DISASM2-NEXT-NOT: 110C0 Index: test/ELF/ppc64-shared-rel-toc.s =================================================================== --- test/ELF/ppc64-shared-rel-toc.s +++ test/ELF/ppc64-shared-rel-toc.s @@ -19,9 +19,9 @@ .Lfunc_begin0: blr -// CHECK: 0x20090 R_PPC64_RELATIVE - 0x10000 -// CHECK: 0x20098 R_PPC64_RELATIVE - 0x8000 +// CHECK: 0x30000 R_PPC64_RELATIVE - 0x10000 +// CHECK: 0x30008 R_PPC64_RELATIVE - 0x8000 // CHECK: Name: foo -// CHECK-NEXT: Value: 0x20090 +// CHECK-NEXT: Value: 0x30000 Index: test/ELF/relocation-copy-i686.s =================================================================== --- test/ELF/relocation-copy-i686.s +++ test/ELF/relocation-copy-i686.s @@ -21,8 +21,8 @@ // CHECK-NEXT: SHF_ALLOC // CHECK-NEXT: SHF_WRITE // CHECK-NEXT: ] -// CHECK-NEXT: Address: 0x12050 -// CHECK-NEXT: Offset: 0x2050 +// CHECK-NEXT: Address: 0x13000 +// CHECK-NEXT: Offset: 0x3000 // CHECK-NEXT: Size: 24 // CHECK-NEXT: Link: 0 // CHECK-NEXT: Info: 0 @@ -52,12 +52,12 @@ // CHECK-NEXT: } // CHECK-NEXT: ] -// 73808 = 0x12050 +// 77824 = 0x13000 // 16 is alignment here -// 73824 = 0x12050 + 16 -// 73828 = 0x12050 + 16 + 4 +// 77840 = 0x13000 + 16 +// 77844 = 0x13000 + 16 + 4 // CODE: Disassembly of section .text: // CODE-NEXT: main: -// CODE-NEXT: 11000: c7 05 50 20 01 00 05 00 00 00 movl $5, 73808 -// CODE-NEXT: 1100a: c7 05 60 20 01 00 07 00 00 00 movl $7, 73824 -// CODE-NEXT: 11014: c7 05 64 20 01 00 09 00 00 00 movl $9, 73828 +// CODE-NEXT: 11000: c7 05 00 30 01 00 05 00 00 00 movl $5, 77824 +// CODE-NEXT: 1100a: c7 05 10 30 01 00 07 00 00 00 movl $7, 77840 +// CODE-NEXT: 11014: c7 05 14 30 01 00 09 00 00 00 movl $9, 77844 Index: test/ELF/relocation-copy.s =================================================================== --- test/ELF/relocation-copy.s +++ test/ELF/relocation-copy.s @@ -21,8 +21,8 @@ // CHECK-NEXT: SHF_ALLOC (0x2) // CHECK-NEXT: SHF_WRITE (0x1) // CHECK-NEXT: ] -// CHECK-NEXT: Address: 0x120A0 -// CHECK-NEXT: Offset: 0x20A0 +// CHECK-NEXT: Address: 0x13000 +// CHECK-NEXT: Offset: 0x3000 // CHECK-NEXT: Size: 24 // CHECK-NEXT: Link: 0 // CHECK-NEXT: Info: 0 @@ -52,12 +52,12 @@ // CHECK-NEXT: } // CHECK-NEXT: ] -// 73888 = 0x120A0 +// 77824 = 0x13000 // 16 is alignment here -// 73904 = 0x120A0 + 16 -// 73908 = 0x120A0 + 16 + 4 +// 77840 = 0x13000 + 16 +// 77844 = 0x13000 + 16 + 4 // CODE: Disassembly of section .text: // CODE-NEXT: main: -// CODE-NEXT: 11000: c7 04 25 a0 20 01 00 05 00 00 00 movl $5, 73888 -// CODE-NEXT: 1100b: c7 04 25 b0 20 01 00 07 00 00 00 movl $7, 73904 -// CODE-NEXT: 11016: c7 04 25 b4 20 01 00 09 00 00 00 movl $9, 73908 +// CODE-NEXT: 11000: c7 04 25 00 30 01 00 05 00 00 00 movl $5, 77824 +// CODE-NEXT: 1100b: c7 04 25 10 30 01 00 07 00 00 00 movl $7, 77840 +// CODE-NEXT: 11016: c7 04 25 14 30 01 00 09 00 00 00 movl $9, 77844 Index: test/ELF/relocation.s =================================================================== --- test/ELF/relocation.s +++ test/ELF/relocation.s @@ -37,8 +37,8 @@ // SEC-NEXT: SHF_ALLOC // SEC-NEXT: SHF_WRITE // SEC-NEXT: ] -// SEC-NEXT: Address: 0x120E8 -// SEC-NEXT: Offset: 0x20E8 +// SEC-NEXT: Address: 0x13000 +// SEC-NEXT: Offset: 0x3000 // SEC-NEXT: Size: 32 // SEC-NEXT: Link: 0 // SEC-NEXT: Info: 0 Index: test/ELF/relro.s =================================================================== --- test/ELF/relro.s +++ test/ELF/relro.s @@ -56,8 +56,8 @@ // FULLRELRO-NEXT: SHF_ALLOC // FULLRELRO-NEXT: SHF_WRITE // FULLRELRO-NEXT: ] -// FULLRELRO-NEXT: Address: 0x12128 -// FULLRELRO-NEXT: Offset: 0x2128 +// FULLRELRO-NEXT: Address: 0x13000 +// FULLRELRO-NEXT: Offset: 0x3000 // FULLRELRO-NEXT: Size: 12 // FULLRELRO-NEXT: Link: 0 // FULLRELRO-NEXT: Info: 0 @@ -75,8 +75,8 @@ // FULLRELRO-NEXT: SHF_ALLOC // FULLRELRO-NEXT: SHF_WRITE // FULLRELRO-NEXT: ] -// FULLRELRO-NEXT: Address: 0x12134 -// FULLRELRO-NEXT: Offset: 0x2134 +// FULLRELRO-NEXT: Address: 0x1300C +// FULLRELRO-NEXT: Offset: 0x300C // FULLRELRO-NEXT: Size: 0 // FULLRELRO-NEXT: Link: 0 // FULLRELRO-NEXT: Info: 0 @@ -91,8 +91,8 @@ // FULLRELRO: Offset: 0x2000 // FULLRELRO-NEXT: VirtualAddress: [[RWADDR:.*]] // FULLRELRO-NEXT: PhysicalAddress: -// FULLRELRO-NEXT: FileSize: 308 -// FULLRELRO-NEXT: MemSize: 308 +// FULLRELRO-NEXT: FileSize: 4108 +// FULLRELRO-NEXT: MemSize: 4108 // FULLRELRO-NEXT: Flags [ // FULLRELRO-NEXT: PF_R // FULLRELRO-NEXT: PF_W @@ -138,8 +138,8 @@ // PARTRELRO-NEXT: SHF_ALLOC // PARTRELRO-NEXT: SHF_WRITE // PARTRELRO-NEXT: ] -// PARTRELRO-NEXT: Address: 0x120E8 -// PARTRELRO-NEXT: Offset: 0x20E8 +// PARTRELRO-NEXT: Address: 0x13000 +// PARTRELRO-NEXT: Offset: 0x3000 // PARTRELRO-NEXT: Size: 12 // PARTRELRO-NEXT: Link: 0 // PARTRELRO-NEXT: Info: 0 @@ -157,8 +157,8 @@ // PARTRELRO-NEXT: SHF_ALLOC // PARTRELRO-NEXT: SHF_WRITE // PARTRELRO-NEXT: ] -// PARTRELRO-NEXT: Address: 0x120F4 -// PARTRELRO-NEXT: Offset: 0x20F4 +// PARTRELRO-NEXT: Address: 0x1300C +// PARTRELRO-NEXT: Offset: 0x300C // PARTRELRO-NEXT: Size: 0 // PARTRELRO-NEXT: Link: 0 // PARTRELRO-NEXT: Info: 0 @@ -175,8 +175,8 @@ // PARTRELRO-NEXT: SHF_ALLOC // PARTRELRO-NEXT: SHF_WRITE // PARTRELRO-NEXT: ] -// PARTRELRO-NEXT: Address: 0x120F8 -// PARTRELRO-NEXT: Offset: 0x20F8 +// PARTRELRO-NEXT: Address: 0x13010 +// PARTRELRO-NEXT: Offset: 0x3010 // PARTRELRO-NEXT: Size: 32 // PARTRELRO-NEXT: Link: 0 // PARTRELRO-NEXT: Info: 0 @@ -195,22 +195,21 @@ // PARTRELRO-NEXT: SHF_ALLOC // PARTRELRO-NEXT: SHF_WRITE // PARTRELRO-NEXT: ] -// PARTRELRO-NEXT: Address: 0x12118 -// PARTRELRO-NEXT: Offset: 0x2118 +// PARTRELRO-NEXT: Address: 0x13030 +// PARTRELRO-NEXT: Offset: 0x3030 // PARTRELRO-NEXT: Size: 0 // PARTRELRO-NEXT: Link: 0 // PARTRELRO-NEXT: Info: 0 // PARTRELRO-NEXT: AddressAlignment: 1 // PARTRELRO-NEXT: EntrySize: 0 // PARTRELRO-NEXT: } -// 232 + sizeof(.data)(12) + align(4) + sizeof(.got.plt)(32) = 280 // PARTRELRO: ProgramHeader { // PARTRELRO: Type: PT_LOAD // PARTRELRO: Offset: 0x2000 // PARTRELRO-NEXT: VirtualAddress: [[RWADDR:.*]] // PARTRELRO-NEXT: PhysicalAddress: -// PARTRELRO-NEXT: FileSize: 280 -// PARTRELRO-NEXT: MemSize: 280 +// PARTRELRO-NEXT: FileSize: 4144 +// PARTRELRO-NEXT: MemSize: 4144 // PARTRELRO-NEXT: Flags [ // PARTRELRO-NEXT: PF_R (0x4) // PARTRELRO-NEXT: PF_W (0x2) Index: test/ELF/tls-opt-gdie.s =================================================================== --- test/ELF/tls-opt-gdie.s +++ test/ELF/tls-opt-gdie.s @@ -27,7 +27,7 @@ //RELOC-NEXT: 0x120E8 R_X86_64_TPOFF64 tlsshared1 0x0 //RELOC-NEXT: } //RELOC-NEXT: Section (5) .rela.plt { -//RELOC-NEXT: 0x12108 R_X86_64_JUMP_SLOT __tls_get_addr 0x0 +//RELOC-NEXT: 0x13018 R_X86_64_JUMP_SLOT __tls_get_addr 0x0 //RELOC-NEXT: } //RELOC-NEXT: ]