diff --git a/bolt/lib/Profile/DataAggregator.cpp b/bolt/lib/Profile/DataAggregator.cpp
--- a/bolt/lib/Profile/DataAggregator.cpp
+++ b/bolt/lib/Profile/DataAggregator.cpp
@@ -1368,17 +1368,14 @@
   // LBRs are stored in reverse execution order. NextPC refers to the next
   // recorded executed PC.
   uint64_t NextPC = opts::UseEventPC ? Sample.PC : 0;
-  uint32_t NumEntry = 0;
-  for (const LBREntry &LBR : Sample.LBR) {
-    ++NumEntry;
-    // Hardware bug workaround: Intel Skylake (which has 32 LBR entries)
-    // sometimes record entry 32 as an exact copy of entry 31. This will cause
-    // us to likely record an invalid trace and generate a stale function for
-    // BAT mode (non BAT disassembles the function and is able to ignore this
-    // trace at aggregation time). Drop first 2 entries (last two, in
-    // chronological order)
-    if (NeedsSkylakeFix && NumEntry <= 2)
-      continue;
+  // Hardware bug workaround: Intel Skylake (which has 32 LBR entries)
+  // sometimes record entry 32 as an exact copy of entry 31. This will cause
+  // us to likely record an invalid trace and generate a stale function for
+  // BAT mode (non BAT disassembles the function and is able to ignore this
+  // trace at aggregation time). Drop first 2 entries (last two, in
+  // chronological order)
+  for (const LBREntry &LBR :
+       llvm::drop_begin(Sample.LBR, NeedsSkylakeFix ? 2 : 0)) {
     if (NextPC) {
       // Record fall-through trace.
       const uint64_t TraceFrom = LBR.To;