diff --git a/llvm/test/tools/llvm-objcopy/ELF/binary-output-target.test b/llvm/test/tools/llvm-objcopy/ELF/binary-output-target.test
--- a/llvm/test/tools/llvm-objcopy/ELF/binary-output-target.test
+++ b/llvm/test/tools/llvm-objcopy/ELF/binary-output-target.test
@@ -42,6 +42,12 @@
 # RUN: llvm-objcopy -I binary -O elf32-hexagon %t.txt %t.hexagon.o
 # RUN: llvm-readobj --file-headers %t.hexagon.o | FileCheck %s --check-prefixes=CHECK,LE,HEXAGON,32
 
+# RUN: llvm-objcopy -I binary -O elf32-loongarch %t.txt %t.la32.o
+# RUN: llvm-readobj --file-headers %t.la32.o | FileCheck %s --check-prefixes=CHECK,LE,LA32,32
+
+# RUN: llvm-objcopy -I binary -O elf64-loongarch %t.txt %t.la64.o
+# RUN: llvm-readobj --file-headers %t.la64.o | FileCheck %s --check-prefixes=CHECK,LE,LA64,64
+
 # CHECK: Format:
 # 32-SAME:      elf32-
 # 64-SAME:      elf64-
@@ -49,6 +55,8 @@
 # ARM-SAME:     littlearm
 # HEXAGON-SAME: hexagon
 # I386-SAME:    i386
+# LA32-SAME:    loongarch{{$}}
+# LA64-SAME:    loongarch{{$}}
 # MIPS-SAME:    mips{{$}}
 # RISCV32-SAME: riscv{{$}}
 # RISCV64-SAME: riscv{{$}}
@@ -62,6 +70,8 @@
 # ARM-NEXT:     Arch: arm
 # HEXAGON-NEXT: Arch: hexagon
 # I386-NEXT:    Arch: i386
+# LA32-NEXT:    Arch: loongarch32
+# LA64-NEXT:    Arch: loongarch64
 # MIPS-NEXT:    Arch: mips{{$}}
 # PPC32BE-NEXT: Arch: powerpc{{$}}
 # PPC32LE-NEXT: Arch: powerpcle{{$}}
@@ -97,6 +107,8 @@
 # ARM-NEXT:       Machine: EM_ARM (0x28)
 # HEXAGON-NEXT:   Machine: EM_HEXAGON (0xA4)
 # I386-NEXT:      Machine: EM_386 (0x3)
+# LA32-NEXT:      Machine: EM_LOONGARCH (0x102)
+# LA64-NEXT:      Machine: EM_LOONGARCH (0x102)
 # MIPS-NEXT:      Machine: EM_MIPS (0x8)
 # PPC32-NEXT:     Machine: EM_PPC (0x14)
 # PPC64-NEXT:     Machine: EM_PPC64 (0x15)
diff --git a/llvm/test/tools/llvm-objcopy/ELF/cross-arch-headers.test b/llvm/test/tools/llvm-objcopy/ELF/cross-arch-headers.test
--- a/llvm/test/tools/llvm-objcopy/ELF/cross-arch-headers.test
+++ b/llvm/test/tools/llvm-objcopy/ELF/cross-arch-headers.test
@@ -109,6 +109,14 @@
 # RUN: llvm-readobj --file-headers %t.elf32_hexagon.o | FileCheck %s --check-prefixes=CHECK,LE,HEXAGON,32,SYSV
 # RUN: llvm-readobj --file-headers %t.elf32_hexagon.dwo | FileCheck %s --check-prefixes=CHECK,LE,HEXAGON,32,SYSV
 
+# RUN: llvm-objcopy %t.o -O elf32-loongarch %t.elf32_loongarch.o --split-dwo=%t.elf32_loongarch.dwo
+# RUN: llvm-readobj --file-headers %t.elf32_loongarch.o | FileCheck %s --check-prefixes=CHECK,LE,LA32,32,SYSV
+# RUN: llvm-readobj --file-headers %t.elf32_loongarch.dwo | FileCheck %s --check-prefixes=CHECK,LE,LA32,32,SYSV
+
+# RUN: llvm-objcopy %t.o -O elf64-loongarch %t.elf64_loongarch.o --split-dwo=%t.elf64_loongarch.dwo
+# RUN: llvm-readobj --file-headers %t.elf64_loongarch.o | FileCheck %s --check-prefixes=CHECK,LE,LA64,64,SYSV
+# RUN: llvm-readobj --file-headers %t.elf64_loongarch.dwo | FileCheck %s --check-prefixes=CHECK,LE,LA64,64,SYSV
+
 !ELF
 FileHeader:
   Class:           ELFCLASS32
@@ -144,6 +152,8 @@
 # AARCH-SAME:   aarch64
 # ARM-SAME:     littlearm
 # HEXAGON-SAME: hexagon
+# LA32-SAME:    loongarch{{$}}
+# LA64-SAME:    loongarch{{$}}
 # MIPS-SAME:    mips
 # PPCBE-SAME:   powerpc{{$}}
 # PPCLE-SAME:   powerpcle{{$}}
@@ -158,6 +168,8 @@
 # AARCH-NEXT:    Arch: aarch64
 # ARM-NEXT:      Arch: arm
 # HEXAGON-NEXT:  Arch: hexagon
+# LA32-NEXT:     Arch: loongarch32
+# LA64-NEXT:     Arch: loongarch64
 # MIPSBE-NEXT:   Arch: mips{{$}}
 # MIPSLE-NEXT:   Arch: mipsel{{$}}
 # MIPS64BE-NEXT: Arch: mips64{{$}}
@@ -190,6 +202,8 @@
 # HEXAGON: Machine: EM_HEXAGON (0xA4)
 # I386:    Machine: EM_386 (0x3)
 # IAMCU:   Machine: EM_IAMCU (0x6)
+# LA32:    Machine: EM_LOONGARCH (0x102)
+# LA64:    Machine: EM_LOONGARCH (0x102)
 # MIPS:    Machine: EM_MIPS (0x8)
 # PPC32:   Machine: EM_PPC (0x14)
 # PPC64:   Machine: EM_PPC64 (0x15)
diff --git a/llvm/tools/llvm-objcopy/ObjcopyOptions.cpp b/llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
--- a/llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
+++ b/llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
@@ -332,7 +332,11 @@
     // SPARC
     {"elf32-sparc", {ELF::EM_SPARC, false, false}},
     {"elf32-sparcel", {ELF::EM_SPARC, false, true}},
+    // Hexagon
     {"elf32-hexagon", {ELF::EM_HEXAGON, false, true}},
+    // LoongArch
+    {"elf32-loongarch", {ELF::EM_LOONGARCH, false, true}},
+    {"elf64-loongarch", {ELF::EM_LOONGARCH, true, true}},
 };
 
 static Expected<TargetInfo>