diff --git a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td --- a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td +++ b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td @@ -1201,6 +1201,8 @@ /// Select +def : Pat<(select GPR:$cond, GPR:$t, 0), (MASKEQZ GPR:$t, GPR:$cond)>; +def : Pat<(select GPR:$cond, 0, GPR:$f), (MASKNEZ GPR:$f, GPR:$cond)>; def : Pat<(select GPR:$cond, GPR:$t, GPR:$f), (OR (MASKEQZ GPR:$t, GPR:$cond), (MASKNEZ GPR:$f, GPR:$cond))>; diff --git a/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll b/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll --- a/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll +++ b/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll @@ -22,8 +22,6 @@ ; LA64-NEXT: addi.d $a5, $a5, 1 ; LA64-NEXT: xori $a6, $a6, 1 ; LA64-NEXT: masknez $a5, $a5, $a6 -; LA64-NEXT: maskeqz $a6, $zero, $a6 -; LA64-NEXT: or $a5, $a6, $a5 ; LA64-NEXT: andi $a5, $a5, 255 ; LA64-NEXT: sll.w $a5, $a5, $a0 ; LA64-NEXT: and $a6, $a3, $a4 @@ -77,8 +75,6 @@ ; LA64-NEXT: addi.d $a5, $a5, 1 ; LA64-NEXT: xori $a6, $a6, 1 ; LA64-NEXT: masknez $a5, $a5, $a6 -; LA64-NEXT: maskeqz $a6, $zero, $a6 -; LA64-NEXT: or $a5, $a6, $a5 ; LA64-NEXT: bstrpick.d $a5, $a5, 15, 0 ; LA64-NEXT: sll.w $a5, $a5, $a0 ; LA64-NEXT: and $a6, $a3, $a4 @@ -123,8 +119,6 @@ ; LA64-NEXT: xori $a1, $a1, 1 ; LA64-NEXT: addi.d $a4, $a3, 1 ; LA64-NEXT: masknez $a4, $a4, $a1 -; LA64-NEXT: maskeqz $a1, $zero, $a1 -; LA64-NEXT: or $a4, $a1, $a4 ; LA64-NEXT: .LBB2_3: # %atomicrmw.start ; LA64-NEXT: # Parent Loop BB2_1 Depth=1 ; LA64-NEXT: # => This Inner Loop Header: Depth=2 @@ -164,8 +158,6 @@ ; LA64-NEXT: xori $a2, $a2, 1 ; LA64-NEXT: addi.d $a4, $a3, 1 ; LA64-NEXT: masknez $a4, $a4, $a2 -; LA64-NEXT: maskeqz $a2, $zero, $a2 -; LA64-NEXT: or $a4, $a2, $a4 ; LA64-NEXT: .LBB3_3: # %atomicrmw.start ; LA64-NEXT: # Parent Loop BB3_1 Depth=1 ; LA64-NEXT: # => This Inner Loop Header: Depth=2 diff --git a/llvm/test/CodeGen/LoongArch/ir-instruction/select-bare-int.ll b/llvm/test/CodeGen/LoongArch/ir-instruction/select-bare-int.ll --- a/llvm/test/CodeGen/LoongArch/ir-instruction/select-bare-int.ll +++ b/llvm/test/CodeGen/LoongArch/ir-instruction/select-bare-int.ll @@ -106,3 +106,35 @@ %res = select i1 %a, i64 %b, i64 %c ret i64 %res } + +define i16 @bare_select_zero_i16(i1 %a, i16 %b) { +; LA32-LABEL: bare_select_zero_i16: +; LA32: # %bb.0: +; LA32-NEXT: andi $a0, $a0, 1 +; LA32-NEXT: masknez $a0, $a1, $a0 +; LA32-NEXT: ret +; +; LA64-LABEL: bare_select_zero_i16: +; LA64: # %bb.0: +; LA64-NEXT: andi $a0, $a0, 1 +; LA64-NEXT: masknez $a0, $a1, $a0 +; LA64-NEXT: ret + %res = select i1 %a, i16 0, i16 %b + ret i16 %res +} + +define i32 @bare_select_zero_i32(i1 %a, i32 %b) { +; LA32-LABEL: bare_select_zero_i32: +; LA32: # %bb.0: +; LA32-NEXT: andi $a0, $a0, 1 +; LA32-NEXT: maskeqz $a0, $a1, $a0 +; LA32-NEXT: ret +; +; LA64-LABEL: bare_select_zero_i32: +; LA64: # %bb.0: +; LA64-NEXT: andi $a0, $a0, 1 +; LA64-NEXT: maskeqz $a0, $a1, $a0 +; LA64-NEXT: ret + %res = select i1 %a, i32 %b, i32 0 + ret i32 %res +}