diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp --- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp @@ -172,7 +172,7 @@ // Signed 19-bit immediate which gets multiplied by 4 if (!isInt<21>(SignedValue)) Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); - if (Value & 0x3) + if (!isAligned(Align{4}, Value)) Ctx.reportError(Fixup.getLoc(), "fixup not sufficiently aligned"); // Low two bits are not encoded. return (Value >> 2) & 0x7ffff; @@ -181,43 +181,43 @@ if (TheTriple.isOSBinFormatCOFF() && !IsResolved) Value &= 0xfff; // Unsigned 12-bit immediate - if (Value >= 0x1000) + if (!isUInt<12>(Value)) Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); return Value; case AArch64::fixup_aarch64_ldst_imm12_scale2: if (TheTriple.isOSBinFormatCOFF() && !IsResolved) Value &= 0xfff; // Unsigned 12-bit immediate which gets multiplied by 2 - if (Value >= 0x2000) + if (!isUInt<13>(Value)) Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); - if (Value & 0x1) + if (!isAligned(Align{2}, Value)) Ctx.reportError(Fixup.getLoc(), "fixup must be 2-byte aligned"); return Value >> 1; case AArch64::fixup_aarch64_ldst_imm12_scale4: if (TheTriple.isOSBinFormatCOFF() && !IsResolved) Value &= 0xfff; // Unsigned 12-bit immediate which gets multiplied by 4 - if (Value >= 0x4000) + if (!isUInt<14>(Value)) Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); - if (Value & 0x3) + if (!isAligned(Align{4}, Value)) Ctx.reportError(Fixup.getLoc(), "fixup must be 4-byte aligned"); return Value >> 2; case AArch64::fixup_aarch64_ldst_imm12_scale8: if (TheTriple.isOSBinFormatCOFF() && !IsResolved) Value &= 0xfff; // Unsigned 12-bit immediate which gets multiplied by 8 - if (Value >= 0x8000) + if (!isUInt<15>(Value)) Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); - if (Value & 0x7) + if (!isAligned(Align{8}, Value)) Ctx.reportError(Fixup.getLoc(), "fixup must be 8-byte aligned"); return Value >> 3; case AArch64::fixup_aarch64_ldst_imm12_scale16: if (TheTriple.isOSBinFormatCOFF() && !IsResolved) Value &= 0xfff; // Unsigned 12-bit immediate which gets multiplied by 16 - if (Value >= 0x10000) + if (!isUInt<16>(Value)) Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); - if (Value & 0xf) + if (!isAligned(Align{16}, Value)) Ctx.reportError(Fixup.getLoc(), "fixup must be 16-byte aligned"); return Value >> 4; case AArch64::fixup_aarch64_movw: { @@ -306,19 +306,19 @@ } case AArch64::fixup_aarch64_pcrel_branch14: // Signed 16-bit immediate - if (SignedValue > 32767 || SignedValue < -32768) + if (!isInt<16>(SignedValue)) Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); // Low two bits are not encoded (4-byte alignment assumed). - if (Value & 0x3) + if (!isAligned(Align{4}, Value)) Ctx.reportError(Fixup.getLoc(), "fixup not sufficiently aligned"); return (Value >> 2) & 0x3fff; case AArch64::fixup_aarch64_pcrel_branch26: case AArch64::fixup_aarch64_pcrel_call26: // Signed 28-bit immediate - if (SignedValue > 134217727 || SignedValue < -134217728) + if (!isInt<28>(SignedValue)) Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); // Low two bits are not encoded (4-byte alignment assumed). - if (Value & 0x3) + if (!isAligned(Align{4}, Value)) Ctx.reportError(Fixup.getLoc(), "fixup not sufficiently aligned"); return (Value >> 2) & 0x3ffffff; case FK_Data_1: