diff --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -3194,7 +3194,9 @@
       if (!(N->getConstantOperandVal(*TailPolicyOpIdx) &
             RISCVII::TAIL_AGNOSTIC)) {
         // We can't use TA if the tie-operand is not IMPLICIT_DEF
-        if (!N->getOperand(0).isUndef()) {
+        if (!(N->getOperand(0).isMachineOpcode() &&
+              N->getOperand(0).getMachineOpcode() ==
+                  TargetOpcode::IMPLICIT_DEF)) {
           // Keep the true-masked instruction when there is no unmasked TU
           // instruction
           if (I->UnmaskedTUPseudo == I->MaskedPseudo)