diff --git a/clang/include/clang/Basic/BuiltinsRISCV.def b/clang/include/clang/Basic/BuiltinsRISCV.def
--- a/clang/include/clang/Basic/BuiltinsRISCV.def
+++ b/clang/include/clang/Basic/BuiltinsRISCV.def
@@ -36,6 +36,8 @@
 TARGET_BUILTIN(__builtin_riscv_brev8, "LiLi", "nc", "zbkb")
 TARGET_BUILTIN(__builtin_riscv_zip_32, "ZiZi", "nc", "zbkb,32bit")
 TARGET_BUILTIN(__builtin_riscv_unzip_32, "ZiZi", "nc", "zbkb,32bit")
+TARGET_BUILTIN(__builtin_riscv_zip, "LiLi", "nc", "zbkb,32bit")
+TARGET_BUILTIN(__builtin_riscv_unzip, "LiLi", "nc", "zbkb,32bit")
 
 // Zknd extension
 TARGET_BUILTIN(__builtin_riscv_aes32dsi_32, "ZiZiZiIUi", "nc", "zknd,32bit")
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -20173,6 +20173,8 @@
   case RISCV::BI__builtin_riscv_xperm4:
   case RISCV::BI__builtin_riscv_xperm8:
   case RISCV::BI__builtin_riscv_brev8:
+  case RISCV::BI__builtin_riscv_zip:
+  case RISCV::BI__builtin_riscv_unzip:
   case RISCV::BI__builtin_riscv_zip_32:
   case RISCV::BI__builtin_riscv_unzip_32: {
     switch (BuiltinID) {
@@ -20216,9 +20218,11 @@
     case RISCV::BI__builtin_riscv_brev8:
       ID = Intrinsic::riscv_brev8;
       break;
+    case RISCV::BI__builtin_riscv_zip:
     case RISCV::BI__builtin_riscv_zip_32:
       ID = Intrinsic::riscv_zip;
       break;
+    case RISCV::BI__builtin_riscv_unzip:
     case RISCV::BI__builtin_riscv_unzip_32:
       ID = Intrinsic::riscv_unzip;
       break;
diff --git a/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbkb.c b/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbkb.c
--- a/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbkb.c
+++ b/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbkb.c
@@ -23,9 +23,9 @@
 // RV32ZBKB-NEXT:    [[TMP1:%.*]] = call i32 @llvm.riscv.zip.i32(i32 [[TMP0]])
 // RV32ZBKB-NEXT:    ret i32 [[TMP1]]
 //
-int zip(int rs1)
+long zip(long rs1)
 {
-  return __builtin_riscv_zip_32(rs1);
+  return __builtin_riscv_zip(rs1);
 }
 
 // RV32ZBKB-LABEL: @unzip(
@@ -36,7 +36,33 @@
 // RV32ZBKB-NEXT:    [[TMP1:%.*]] = call i32 @llvm.riscv.unzip.i32(i32 [[TMP0]])
 // RV32ZBKB-NEXT:    ret i32 [[TMP1]]
 //
-int unzip(int rs1)
+long unzip(long rs1)
+{
+  return __builtin_riscv_unzip(rs1);
+}
+
+// RV32ZBKB-LABEL: @zip_32(
+// RV32ZBKB-NEXT:  entry:
+// RV32ZBKB-NEXT:    [[RS1_ADDR:%.*]] = alloca i32, align 4
+// RV32ZBKB-NEXT:    store i32 [[RS1:%.*]], ptr [[RS1_ADDR]], align 4
+// RV32ZBKB-NEXT:    [[TMP0:%.*]] = load i32, ptr [[RS1_ADDR]], align 4
+// RV32ZBKB-NEXT:    [[TMP1:%.*]] = call i32 @llvm.riscv.zip.i32(i32 [[TMP0]])
+// RV32ZBKB-NEXT:    ret i32 [[TMP1]]
+//
+int zip_32(int rs1)
+{
+  return __builtin_riscv_zip_32(rs1);
+}
+
+// RV32ZBKB-LABEL: @unzip_32(
+// RV32ZBKB-NEXT:  entry:
+// RV32ZBKB-NEXT:    [[RS1_ADDR:%.*]] = alloca i32, align 4
+// RV32ZBKB-NEXT:    store i32 [[RS1:%.*]], ptr [[RS1_ADDR]], align 4
+// RV32ZBKB-NEXT:    [[TMP0:%.*]] = load i32, ptr [[RS1_ADDR]], align 4
+// RV32ZBKB-NEXT:    [[TMP1:%.*]] = call i32 @llvm.riscv.unzip.i32(i32 [[TMP0]])
+// RV32ZBKB-NEXT:    ret i32 [[TMP1]]
+//
+int unzip_32(int rs1)
 {
   return __builtin_riscv_unzip_32(rs1);
 }
diff --git a/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbkb-error.c b/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbkb-error.c
--- a/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbkb-error.c
+++ b/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbkb-error.c
@@ -1,12 +1,22 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
 // RUN: %clang_cc1 -triple riscv64 -target-feature +zbkb -verify %s -o -
 
-int zip(int rs1)
+long zip(long rs1)
+{
+  return __builtin_riscv_zip(rs1); // expected-error {{builtin requires: 'RV32'}}
+}
+
+long unzip(long rs1)
+{
+  return __builtin_riscv_unzip(rs1); // expected-error {{builtin requires: 'RV32'}}
+}
+
+int zip_32(int rs1)
 {
   return __builtin_riscv_zip_32(rs1); // expected-error {{builtin requires: 'RV32'}}
 }
 
-int unzip(int rs1)
+int unzip_32(int rs1)
 {
   return __builtin_riscv_unzip_32(rs1); // expected-error {{builtin requires: 'RV32'}}
 }