diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td --- a/llvm/lib/Target/AArch64/AArch64.td +++ b/llvm/lib/Target/AArch64/AArch64.td @@ -747,6 +747,7 @@ include "AArch64SchedThunderX3T110.td" include "AArch64SchedTSV110.td" include "AArch64SchedAmpere1.td" +include "AArch64SchedNeoverseN1.td" include "AArch64SchedNeoverseN2.td" include "AArch64SchedNeoverseV2.td" @@ -1388,7 +1389,7 @@ [TuneX3]>; def : ProcessorModel<"neoverse-e1", CortexA53Model, ProcessorFeatures.NeoverseE1, [TuneNeoverseE1]>; -def : ProcessorModel<"neoverse-n1", CortexA57Model, +def : ProcessorModel<"neoverse-n1", NeoverseN1Model, ProcessorFeatures.NeoverseN1, [TuneNeoverseN1]>; def : ProcessorModel<"neoverse-n2", NeoverseN2Model, ProcessorFeatures.NeoverseN2, [TuneNeoverseN2]>; diff --git a/llvm/lib/Target/AArch64/AArch64SchedNeoverseN1.td b/llvm/lib/Target/AArch64/AArch64SchedNeoverseN1.td new file mode 100644 --- /dev/null +++ b/llvm/lib/Target/AArch64/AArch64SchedNeoverseN1.td @@ -0,0 +1,1060 @@ +//=- AArch64SchedNeoverseN1.td - NeoverseN1 Scheduling Model -*- tablegen -*-=// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines the scheduling model for the Arm Neoverse N1 processors. +// +// References: +// - "Arm Neoverse N1 Software Optimization Guide" +// - https://en.wikichip.org/wiki/arm_holdings/microarchitectures/neoverse_n1 +// +//===----------------------------------------------------------------------===// + +def NeoverseN1Model : SchedMachineModel { + let IssueWidth = 8; // Maximum micro-ops dispatch rate. + let MicroOpBufferSize = 128; // NOTE: Copied from Cortex-A76. + let LoadLatency = 4; // Optimistic load latency. + let MispredictPenalty = 11; // Cycles cost of branch mispredicted. + let LoopMicroOpBufferSize = 16; // NOTE: Copied from Cortex-A57. + let CompleteModel = 1; + + list UnsupportedFeatures = !listconcat(PAUnsupported.F, + SMEUnsupported.F, + SVEUnsupported.F, + [HasMTE]); +} + +//===----------------------------------------------------------------------===// +// Define each kind of processor resource and number available on Neoverse N1. +// Instructions are first fetched and then decoded into internal macro-ops +// (MOPs). From there, the MOPs proceed through register renaming and dispatch +// stages. A MOP can be split into one or more micro-ops further down the +// pipeline, after the decode stage. Once dispatched, micro-ops wait for their +// operands and issue out-of-order to one of the issue pipelines. Each issue +// pipeline can accept one micro-op per cycle. + +let SchedModel = NeoverseN1Model in { + +// Define the issue ports. +def N1UnitB : ProcResource<1>; // Branch +def N1UnitS : ProcResource<2>; // Integer single cycle 0/1 +def N1UnitM : ProcResource<1>; // Integer multicycle +def N1UnitL : ProcResource<2>; // Load/Store 0/1 +def N1UnitD : ProcResource<2>; // Store data 0/1 +def N1UnitV0 : ProcResource<1>; // FP/ASIMD 0 +def N1UnitV1 : ProcResource<1>; // FP/ASIMD 1 + +def N1UnitI : ProcResGroup<[N1UnitS, N1UnitM]>; // Integer units +def N1UnitV : ProcResGroup<[N1UnitV0, N1UnitV1]>; // FP/ASIMD units + +// Define commonly used read types. + +// No generic forwarding is provided for these types. +def : ReadAdvance; +def : ReadAdvance; +def : ReadAdvance; +def : ReadAdvance; +def : ReadAdvance; +def : ReadAdvance; +def : ReadAdvance; +def : ReadAdvance; +def : ReadAdvance; +def : ReadAdvance; + +def : WriteRes { let Unsupported = 1; } +def : WriteRes { let Latency = 1; } +def : WriteRes { let Latency = 1; } + + +//===----------------------------------------------------------------------===// +// Define generic 0 micro-op types + +let Latency = 0, NumMicroOps = 0 in +def N1Write_0c_0Z : SchedWriteRes<[]>; + +//===----------------------------------------------------------------------===// +// Define generic 1 micro-op types + +def N1Write_1c_1B : SchedWriteRes<[N1UnitB]> { let Latency = 1; } +def N1Write_1c_1I : SchedWriteRes<[N1UnitI]> { let Latency = 1; } +def N1Write_2c_1M : SchedWriteRes<[N1UnitM]> { let Latency = 2; } +def N1Write_3c_1M : SchedWriteRes<[N1UnitM]> { let Latency = 3; } +def N1Write_4c3_1M : SchedWriteRes<[N1UnitM]> { let Latency = 4; + let ResourceCycles = [3]; } +def N1Write_5c3_1M : SchedWriteRes<[N1UnitM]> { let Latency = 5; + let ResourceCycles = [3]; } +def N1Write_12c5_1M : SchedWriteRes<[N1UnitM]> { let Latency = 12; + let ResourceCycles = [5]; } +def N1Write_20c5_1M : SchedWriteRes<[N1UnitM]> { let Latency = 20; + let ResourceCycles = [5]; } +def N1Write_4c_1L : SchedWriteRes<[N1UnitL]> { let Latency = 4; } +def N1Write_5c_1L : SchedWriteRes<[N1UnitL]> { let Latency = 5; } +def N1Write_7c_1L : SchedWriteRes<[N1UnitL]> { let Latency = 7; } +def N1Write_2c_1V : SchedWriteRes<[N1UnitV]> { let Latency = 2; } +def N1Write_3c_1V : SchedWriteRes<[N1UnitV]> { let Latency = 3; } +def N1Write_4c_1V : SchedWriteRes<[N1UnitV]> { let Latency = 4; } +def N1Write_5c_1V : SchedWriteRes<[N1UnitV]> { let Latency = 5; } +def N1Write_2c_1V0 : SchedWriteRes<[N1UnitV0]> { let Latency = 2; } +def N1Write_3c_1V0 : SchedWriteRes<[N1UnitV0]> { let Latency = 3; } +def N1Write_4c_1V0 : SchedWriteRes<[N1UnitV0]> { let Latency = 4; } +def N1Write_7c7_1V0 : SchedWriteRes<[N1UnitV0]> { let Latency = 7; + let ResourceCycles = [7]; } +def N1Write_10c7_1V0 : SchedWriteRes<[N1UnitV0]> { let Latency = 10; + let ResourceCycles = [7]; } +def N1Write_13c10_1V0 : SchedWriteRes<[N1UnitV0]> { let Latency = 13; + let ResourceCycles = [10]; } +def N1Write_15c7_1V0 : SchedWriteRes<[N1UnitV0]> { let Latency = 15; + let ResourceCycles = [7]; } +def N1Write_17c7_1V0 : SchedWriteRes<[N1UnitV0]> { let Latency = 17; + let ResourceCycles = [7]; } +def N1Write_2c_1V1 : SchedWriteRes<[N1UnitV1]> { let Latency = 2; } +def N1Write_3c_1V1 : SchedWriteRes<[N1UnitV1]> { let Latency = 3; } +def N1Write_4c_1V1 : SchedWriteRes<[N1UnitV1]> { let Latency = 4; } + +//===----------------------------------------------------------------------===// +// Define generic 2 micro-op types + +let Latency = 1, NumMicroOps = 2 in +def N1Write_1c_1B_1I : SchedWriteRes<[N1UnitB, N1UnitI]>; +let Latency = 3, NumMicroOps = 2 in +def N1Write_3c_1I_1M : SchedWriteRes<[N1UnitI, N1UnitM]>; +let Latency = 2, NumMicroOps = 2 in +def N1Write_2c_1I_1L : SchedWriteRes<[N1UnitI, N1UnitL]>; +let Latency = 5, NumMicroOps = 2 in +def N1Write_5c_1I_1L : SchedWriteRes<[N1UnitI, N1UnitL]>; +let Latency = 6, NumMicroOps = 2 in +def N1Write_6c_1I_1L : SchedWriteRes<[N1UnitI, N1UnitL]>; +let Latency = 7, NumMicroOps = 2 in +def N1Write_7c_1I_1L : SchedWriteRes<[N1UnitI, N1UnitL]>; +let Latency = 5, NumMicroOps = 2 in +def N1Write_5c_1M_1V : SchedWriteRes<[N1UnitM, N1UnitV]>; +let Latency = 6, NumMicroOps = 2 in +def N1Write_6c_1M_1V0 : SchedWriteRes<[N1UnitM, N1UnitV0]>; +let Latency = 5, NumMicroOps = 2 in +def N1Write_5c_2L : SchedWriteRes<[N1UnitL, N1UnitL]>; +let Latency = 1, NumMicroOps = 2 in +def N1Write_1c_1L_1D : SchedWriteRes<[N1UnitL, N1UnitD]>; +let Latency = 2, NumMicroOps = 2 in +def N1Write_2c_1L_1V : SchedWriteRes<[N1UnitL, N1UnitV]>; +let Latency = 4, NumMicroOps = 2 in +def N1Write_4c_1L_1V : SchedWriteRes<[N1UnitL, N1UnitV]>; +let Latency = 7, NumMicroOps = 2 in +def N1Write_7c_1L_1V : SchedWriteRes<[N1UnitL, N1UnitV]>; +let Latency = 4, NumMicroOps = 2 in +def N1Write_4c_1V0_1V1 : SchedWriteRes<[N1UnitV0, N1UnitV1]>; +let Latency = 4, NumMicroOps = 2 in +def N1Write_4c_2V0 : SchedWriteRes<[N1UnitV0, N1UnitV0]>; +let Latency = 5, NumMicroOps = 2 in +def N1Write_5c_2V0 : SchedWriteRes<[N1UnitV0, N1UnitV0]>; +let Latency = 6, NumMicroOps = 2 in +def N1Write_6c_2V1 : SchedWriteRes<[N1UnitV1, N1UnitV1]>; +let Latency = 5, NumMicroOps = 2 in +def N1Write_5c_1V1_1V : SchedWriteRes<[N1UnitV1, N1UnitV]>; + +//===----------------------------------------------------------------------===// +// Define generic 3 micro-op types + +let Latency = 7, NumMicroOps = 3 in +def N1Write_2c_1I_1L_1V : SchedWriteRes<[N1UnitI, N1UnitL, N1UnitV]>; +let Latency = 1, NumMicroOps = 3 in +def N1Write_1c_2L_1D : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitD]>; +let Latency = 2, NumMicroOps = 3 in +def N1Write_2c_1L_2V : SchedWriteRes<[N1UnitL, N1UnitV, N1UnitV]>; +let Latency = 6, NumMicroOps = 3 in +def N1Write_6c_3L : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitL]>; +let Latency = 4, NumMicroOps = 3 in +def N1Write_4c_3V : SchedWriteRes<[N1UnitV, N1UnitV, N1UnitV]>; +let Latency = 6, NumMicroOps = 3 in +def N1Write_6c_3V : SchedWriteRes<[N1UnitV, N1UnitV, N1UnitV]>; +let Latency = 8, NumMicroOps = 3 in +def N1Write_8c_3V : SchedWriteRes<[N1UnitV, N1UnitV, N1UnitV]>; + +//===----------------------------------------------------------------------===// +// Define generic 4 micro-op types + +let Latency = 2, NumMicroOps = 4 in +def N1Write_2c_2I_2L : SchedWriteRes<[N1UnitI, N1UnitI, N1UnitL, N1UnitL]>; +let Latency = 6, NumMicroOps = 4 in +def N1Write_6c_4L : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitL, N1UnitL]>; +let Latency = 2, NumMicroOps = 4 in +def N1Write_2c_2L_2V : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitV, N1UnitV]>; +let Latency = 2, NumMicroOps = 4 in +def N1Write_3c_2L_2V : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitV, N1UnitV]>; +let Latency = 5, NumMicroOps = 4 in +def N1Write_5c_2L_2V : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitV, N1UnitV]>; +let Latency = 7, NumMicroOps = 4 in +def N1Write_7c_2L_2V : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitV, N1UnitV]>; +let Latency = 4, NumMicroOps = 4 in +def N1Write_4c_4V : SchedWriteRes<[N1UnitV, N1UnitV, N1UnitV, N1UnitV]>; +let Latency = 6, NumMicroOps = 4 in +def N1Write_6c_4V0 : SchedWriteRes<[N1UnitV0, N1UnitV0, N1UnitV0, N1UnitV0]>; + +//===----------------------------------------------------------------------===// +// Define generic 5 micro-op types + +let Latency = 3, NumMicroOps = 5 in +def N1Write_3c_2L_3V : SchedWriteRes<[N1UnitL, N1UnitL, + N1UnitV, N1UnitV, N1UnitV]>; +let Latency = 7, NumMicroOps = 5 in +def N1Write_7c_2L_3V : SchedWriteRes<[N1UnitL, N1UnitL, + N1UnitV, N1UnitV, N1UnitV]>; +let Latency = 6, NumMicroOps = 5 in +def N1Write_6c_5V : SchedWriteRes<[N1UnitV, N1UnitV, N1UnitV, N1UnitV, N1UnitV]>; + +//===----------------------------------------------------------------------===// +// Define generic 6 micro-op types + +let Latency = 3, NumMicroOps = 6 in +def N1Write_3c_4L_2V : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitL, N1UnitL, + N1UnitV, N1UnitV]>; +let Latency = 4, NumMicroOps = 6 in +def N1Write_4c_3L_3V : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitL, + N1UnitV, N1UnitV, N1UnitV]>; +let Latency = 5, NumMicroOps = 6 in +def N1Write_5c_3L_3V : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitL, + N1UnitV, N1UnitV, N1UnitV]>; +let Latency = 6, NumMicroOps = 6 in +def N1Write_6c_3L_3V : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitL, + N1UnitV, N1UnitV, N1UnitV]>; +let Latency = 7, NumMicroOps = 6 in +def N1Write_7c_3L_3V : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitL, + N1UnitV, N1UnitV, N1UnitV]>; +let Latency = 8, NumMicroOps = 6 in +def N1Write_8c_3L_3V : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitL, + N1UnitV, N1UnitV, N1UnitV]>; + +//===----------------------------------------------------------------------===// +// Define generic 7 micro-op types + +let Latency = 8, NumMicroOps = 7 in +def N1Write_8c_3L_4V : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitL, + N1UnitV, N1UnitV, N1UnitV, N1UnitV]>; + +//===----------------------------------------------------------------------===// +// Define generic 8 micro-op types + +let Latency = 5, NumMicroOps = 8 in +def N1Write_5c_4L_4V : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitL, N1UnitL, + N1UnitV, N1UnitV, N1UnitV, N1UnitV]>; +let Latency = 6, NumMicroOps = 8 in +def N1Write_6c_4L_4V : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitL, N1UnitL, + N1UnitV, N1UnitV, N1UnitV, N1UnitV]>; +let Latency = 8, NumMicroOps = 8 in +def N1Write_8c_4L_4V : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitL, N1UnitL, + N1UnitV, N1UnitV, N1UnitV, N1UnitV]>; +let Latency = 10, NumMicroOps = 8 in +def N1Write_10c_4L_4V : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitL, N1UnitL, + N1UnitV, N1UnitV, N1UnitV, N1UnitV]>; + +//===----------------------------------------------------------------------===// +// Define generic 12 micro-op types + +let Latency = 9, NumMicroOps = 12 in +def N1Write_9c_6L_6V : SchedWriteRes<[N1UnitL, N1UnitL, N1UnitL, + N1UnitL, N1UnitL, N1UnitL, + N1UnitV, N1UnitV, N1UnitV, + N1UnitV, N1UnitV, N1UnitV]>; + + +// Miscellaneous Instructions +// ----------------------------------------------------------------------------- + +def : InstRW<[WriteI], (instrs COPY)>; + +// Convert floating-point condition flags +// Flag manipulation instructions +def : WriteRes { let Latency = 1; } + + +// Branch Instructions +// ----------------------------------------------------------------------------- + +// Branch, immed +// Compare and branch +def : SchedAlias; + +// Branch, register +def : SchedAlias; + +// Branch and link, immed +// Branch and link, register +def : InstRW<[N1Write_1c_1B_1I], (instrs BL, BLR)>; + +// Compare and branch +def : InstRW<[N1Write_1c_1B], (instregex "^[CT]BN?Z[XW]$")>; + + +// Arithmetic and Logical Instructions +// ----------------------------------------------------------------------------- + +// ALU, basic +// ALU, basic, flagset +// Conditional compare +// Conditional select +// Logical, basic +// Address generation +// Count leading +// Reverse bits/bytes +// Move immediate +def : SchedAlias; + +// ALU, extend and shift +def : SchedAlias; + +// Arithmetic, LSL shift, shift <= 4 +// Arithmetic, flagset, LSL shift, shift <= 4 +// Arithmetic, LSR/ASR/ROR shift or LSL shift > 4 +def N1WriteISReg : SchedWriteVariant<[ + SchedVar, + SchedVar]>; +def : SchedAlias; + +// Logical, shift, no flagset +def : InstRW<[N1Write_1c_1I], + (instregex "^(AND|BIC|EON|EOR|ORN|ORR)[WX]rs$")>; + +// Logical, shift, flagset +def : InstRW<[N1Write_2c_1M], (instregex "^(AND|BIC)S[WX]rs$")>; + + +// Divide and multiply instructions +// ----------------------------------------------------------------------------- + +// Divide +def : SchedAlias; +def : SchedAlias; + +// Multiply accumulate +// Multiply accumulate, long +def : SchedAlias; +def : SchedAlias; + +// Multiply high +def : InstRW<[N1Write_5c3_1M, ReadIM, ReadIM], (instrs SMULHrr, UMULHrr)>; + + +// Miscellaneous data-processing instructions +// ----------------------------------------------------------------------------- + +// Bitfield extract, one reg +// Bitfield extract, two regs +def N1WriteExtr : SchedWriteVariant<[ + SchedVar, + SchedVar]>; +def : SchedAlias; + +// Bitfield move, basic +// Variable shift +def : SchedAlias; + +// Bitfield move, insert +def : InstRW<[N1Write_2c_1M], (instregex "^BFM[WX]ri$")>; + +// Move immediate +def : SchedAlias; + +// Load instructions +// ----------------------------------------------------------------------------- + +// Load register, immed offset +def : SchedAlias; + +// Load register, immed offset, index +def : SchedAlias; +def : SchedAlias; + +// Load pair, immed offset +def : SchedAlias; + +// Load pair, immed offset, W-form +def : InstRW<[N1Write_4c_1L, N1Write_0c_0Z], (instrs LDPWi, LDNPWi)>; + +// Load pair, signed immed offset, signed words +def : InstRW<[N1Write_5c_1I_1L, N1Write_0c_0Z], (instrs LDPSWi)>; + +// Load pair, immed post or pre-index, signed words +def : InstRW<[N1Write_5c_1I_1L, N1Write_0c_0Z, WriteAdr], + (instrs LDPSWpost, LDPSWpre)>; + + +// Store instructions +// ----------------------------------------------------------------------------- + +// Store register, immed offset +def : SchedAlias; + +// Store register, immed offset, index +def : SchedAlias; + +// Store pair, immed offset +def : SchedAlias; + +// Store pair, immed offset, W-form +def : InstRW<[N1Write_1c_1L_1D], (instrs STPWi)>; + + +// FP data processing instructions +// ----------------------------------------------------------------------------- + +// FP absolute value +// FP arithmetic +// FP min/max +// FP negate +// FP select +def : SchedAlias; + +// FP compare +def : SchedAlias; + +// FP divide +// FP square root +def : SchedAlias; + +// FP divide, H-form +// FP square root, H-form +def : InstRW<[N1Write_7c7_1V0], (instrs FDIVHrr, FSQRTHr)>; + +// FP divide, S-form +// FP square root, S-form +def : InstRW<[N1Write_10c7_1V0], (instrs FDIVSrr, FSQRTSr)>; + +// FP divide, D-form +def : InstRW<[N1Write_15c7_1V0], (instrs FDIVDrr)>; + +// FP square root, D-form +def : InstRW<[N1Write_17c7_1V0], (instrs FSQRTDr)>; + +// FP multiply +def : SchedAlias; + +// FP multiply accumulate +def : InstRW<[N1Write_4c_1V], (instregex "^FN?M(ADD|SUB)[HSD]rrr$")>; + +// FP round to integral +def : InstRW<[N1Write_3c_1V0], (instregex "^FRINT[AIMNPXZ][HSD]r$", + "^FRINT(32|64)[XZ][SD]r$")>; + + +// FP miscellaneous instructions +// ----------------------------------------------------------------------------- + +// FP convert, from vec to vec reg +// FP convert, Javascript from vec to gen reg +def : SchedAlias; + +// FP convert, from gen to vec reg +def : InstRW<[N1Write_6c_1M_1V0], (instregex "^[SU]CVTF[SU][WX][HSD]ri$")>; + +// FP convert, from vec to gen reg +def : InstRW<[N1Write_4c_1V0_1V1], (instregex "^FCVT[AMNPZ][SU][SU][WX][HSD]r$")>; + +// FP move, immed +def : SchedAlias; + +// FP move, register +def : InstRW<[N1Write_2c_1V], (instrs FMOVHr, FMOVSr, FMOVDr)>; + +// FP transfer, from gen to low half of vec reg +// FP transfer, from gen to high half of vec reg +def : InstRW<[N1Write_3c_1M], (instrs FMOVWHr, FMOVXHr, FMOVWSr, FMOVXDr, + FMOVXDHighr)>; + +// FP transfer, from vec to gen reg +def : SchedAlias; + + +// FP load instructions +// ----------------------------------------------------------------------------- + +// Load vector reg, literal, S/D/Q forms +// Load vector reg, unscaled immed +def : InstRW<[N1Write_5c_1L, ReadAdrBase], (instregex "^LDR[SDQ]l$", + "^LDUR[BHSDQ]i$")>; + +// Load vector reg, immed post-index +// Load vector reg, immed pre-index +def : InstRW<[N1Write_5c_1L, WriteAdr], + (instregex "^LDR[BHSDQ](post|pre)$")>; + +// Load vector reg, unsigned immed +def : InstRW<[N1Write_5c_1I_1L], (instregex "^LDR[BHSDQ]ui$")>; + +// Load vector reg, register offset, basic +// Load vector reg, register offset, scale, S/D-form +// Load vector reg, register offset, extend +// Load vector reg, register offset, extend, scale, S/D-form +def : InstRW<[N1Write_5c_1I_1L, ReadAdrBase], (instregex "^LDR[BSD]ro[WX]$")>; + +// Load vector reg, register offset, scale, H/Q-form +// Load vector reg, register offset, extend, scale, H/Q-form +def : InstRW<[N1Write_6c_1I_1L, ReadAdrBase], (instregex "^LDR[HQ]ro[WX]$")>; + +// Load vector pair, immed offset, S/D-form +def : InstRW<[N1Write_5c_1I_1L, WriteLDHi], (instregex "^LDN?P[SD]i$")>; + +// Load vector pair, immed offset, H/Q-form +def : InstRW<[N1Write_7c_1I_1L, WriteLDHi], (instregex "^LDPN?[HQ]i$")>; + +// Load vector pair, immed post-index, S/D-form +// Load vector pair, immed pre-index, S/D-form +def : InstRW<[N1Write_5c_1L, WriteLDHi, WriteAdr], + (instregex "^LDP[SD](pre|post)$")>; + +// Load vector pair, immed post-index, Q-form +// Load vector pair, immed pre-index, Q-form +def : InstRW<[N1Write_7c_1L, WriteLDHi, WriteAdr], + (instrs LDPQpost, LDPQpre)>; + + +// FP store instructions +// ----------------------------------------------------------------------------- + +// Store vector reg, unscaled immed, B/H/S/D-form +def : InstRW<[N1Write_2c_1I_1L], (instregex "^STUR[BHSD]i$")>; + +// Store vector reg, unscaled immed, Q-form +def : InstRW<[N1Write_2c_2I_2L], (instrs STURQi)>; + +// Store vector reg, immed post-index, B/H/S/D-form +// Store vector reg, immed pre-index, B/H/S/D-form +def : InstRW<[N1Write_2c_1L_1V, WriteAdr], (instregex "^STR[BHSD](pre|post)$")>; + +// Store vector reg, immed pre-index, Q-form +// Store vector reg, immed post-index, Q-form +def : InstRW<[N1Write_2c_2L_2V, WriteAdr], (instrs STRQpre, STRQpost)>; + +// Store vector reg, unsigned immed, B/H/S/D-form +def : InstRW<[N1Write_2c_1L_1V], (instregex "^STR[BHSD]ui$")>; + +// Store vector reg, unsigned immed, Q-form +def : InstRW<[N1Write_2c_2L_2V], (instrs STRQui)>; + +// Store vector reg, register offset, basic, B/S/D-form +// Store vector reg, register offset, scale, B/S/D-form +// Store vector reg, register offset, extend, B/S/D-form +// Store vector reg, register offset, extend, scale, B/S/D-form +def : InstRW<[N1Write_2c_1L_1V, ReadAdrBase], (instregex "^STR[BSD]ro[WX]$")>; + +// Store vector reg, register offset, basic, H-form +// Store vector reg, register offset, scale, H-form +// Store vector reg, register offset, extend, H-form +// Store vector reg, register offset, extend, scale, H-form +def : InstRW<[N1Write_2c_1I_1L_1V, ReadAdrBase], (instregex "^STRHro[WX]$")>; + +// Store vector reg, register offset, basic, Q-form +// Store vector reg, register offset, scale, Q-form +// Store vector reg, register offset, extend, Q-form +// Store vector reg, register offset, extend, scale, Q-form +def : InstRW<[N1Write_2c_2L_2V, ReadAdrBase], (instregex "^STRQro[WX]$")>; + +// Store vector pair, immed offset, S-form +def : InstRW<[N1Write_2c_1L_1V], (instrs STPSi, STNPSi)>; + +// Store vector pair, immed offset, D-form +def : InstRW<[N1Write_2c_2L_2V], (instrs STPDi, STNPDi)>; + +// Store vector pair, immed offset, Q-form +def : InstRW<[N1Write_3c_4L_2V], (instrs STPQi, STNPQi)>; + +// Store vector pair, immed post-index, S-form +// Store vector pair, immed pre-index, S-form +def : InstRW<[N1Write_2c_1L_1V, WriteAdr], (instrs STPSpre, STPSpost)>; + +// Store vector pair, immed post-index, D-form +// Store vector pair, immed pre-index, D-form +def : InstRW<[N1Write_2c_2L_2V, WriteAdr], (instrs STPDpre, STPDpost)>; + +// Store vector pair, immed post-index, Q-form +// Store vector pair, immed pre-index, Q-form +def : InstRW<[N1Write_3c_4L_2V, WriteAdr], (instrs STPQpre, STPQpost)>; + + +// ASIMD integer instructions +// ----------------------------------------------------------------------------- + +// ASIMD absolute diff +// ASIMD absolute diff long +// ASIMD arith, basic +// ASIMD arith, complex +// ASIMD arith, pair-wise +// ASIMD compare +// ASIMD logical +// ASIMD max/min, basic and pair-wise +def : SchedAlias; +def : SchedAlias; + +// ASIMD absolute diff accum +// ASIMD absolute diff accum long +def : InstRW<[N1Write_4c_1V1], (instregex "^[SU]ABAL?v")>; + +// ASIMD arith, reduce, 4H/4S +def : InstRW<[N1Write_3c_1V1], (instregex "^(ADDV|[SU]ADDLV)v4(i16|i32)v$")>; + +// ASIMD arith, reduce, 8B/8H +def : InstRW<[N1Write_5c_1V1_1V], (instregex "^(ADDV|[SU]ADDLV)v8(i8|i16)v$")>; + +// ASIMD arith, reduce, 16B +def : InstRW<[N1Write_6c_2V1], (instregex "^(ADDV|[SU]ADDLV)v16i8v$")>; + +// ASIMD max/min, reduce, 4H/4S +def : InstRW<[N1Write_3c_1V1], (instregex "^[SU](MAX|MIN)Vv4(i16|i32)v$")>; + +// ASIMD max/min, reduce, 8B/8H +def : InstRW<[N1Write_5c_1V1_1V], (instregex "^[SU](MAX|MIN)Vv8(i8|i16)v$")>; + +// ASIMD max/min, reduce, 16B +def : InstRW<[N1Write_6c_2V1], (instregex "[SU](MAX|MIN)Vv16i8v$")>; + +// ASIMD multiply, D-form +// ASIMD multiply accumulate, D-form +// ASIMD multiply accumulate high, D-form +// ASIMD multiply accumulate saturating long +// ASIMD multiply long +// ASIMD multiply accumulate long +def : InstRW<[N1Write_4c_1V0], (instregex "^MUL(v[14]i16|v[12]i32)$", + "^ML[AS](v[14]i16|v[12]i32)$", + "^SQ(R)?DMULH(v[14]i16|v[12]i32)$", + "^SQRDML[AS]H(v[14]i16|v[12]i32)$", + "^SQDML[AS]Lv", + "^([SU]|SQD)MULLv", + "^[SU]ML[AS]Lv")>; + +// ASIMD multiply, Q-form +// ASIMD multiply accumulate, Q-form +// ASIMD multiply accumulate high, Q-form +def : InstRW<[N1Write_5c_2V0], (instregex "^MUL(v8i16|v4i32)$", + "^ML[AS](v8i16|v4i32)$", + "^SQ(R)?DMULH(v8i16|v4i32)$", + "^SQRDML[AS]H(v8i16|v4i32)$")>; + +// ASIMD multiply/multiply long (8x8) polynomial, D-form +def : InstRW<[N1Write_3c_1V0], (instrs PMULv8i8, PMULLv8i8)>; + +// ASIMD multiply/multiply long (8x8) polynomial, Q-form +def : InstRW<[N1Write_4c_2V0], (instrs PMULv16i8, PMULLv16i8)>; + +// ASIMD pairwise add and accumulate long +def : InstRW<[N1Write_4c_1V1], (instregex "^[SU]ADALPv")>; + +// ASIMD shift accumulate +def : InstRW<[N1Write_4c_1V1], (instregex "^[SU]R?SRAv")>; + +// ASIMD shift by immed, basic +// ASIMD shift by immed and insert, basic +// ASIMD shift by register, basic +def : InstRW<[N1Write_2c_1V1], (instregex "^SHLL?v", "^SHRNv", "^[SU]SHLLv", + "^[SU]SHRv", "^S[LR]Iv", "^[SU]SHLv")>; + +// ASIMD shift by immed, complex +// ASIMD shift by register, complex +def : InstRW<[N1Write_4c_1V1], + (instregex "^RSHRNv", "^SQRSHRU?Nv", "^(SQSHLU?|UQSHL)[bhsd]$", + "^(SQSHLU?|UQSHL)(v8i8|v16i8|v4i16|v8i16|v2i32|v4i32|v2i64)_shift$", + "^SQSHU?RNv", "^[SU]RSHRv", "^UQR?SHRNv", + "^[SU]Q?RSHLv", "^[SU]QSHLv")>; + + +// ASIMD FP instructions +// ----------------------------------------------------------------------------- + +// ASIMD FP absolute value/difference +// ASIMD FP arith, normal +// ASIMD FP compare +// ASIMD FP max/min, normal +// ASIMD FP max/min, pairwise +// ASIMD FP negate +// Covered by "SchedAlias (WriteV[dq]...)" above + +// ASIMD FP convert, long (F16 to F32) +def : InstRW<[N1Write_4c_2V0], (instregex "^FCVTL(v4|v8)i16$")>; + +// ASIMD FP convert, long (F32 to F64) +def : InstRW<[N1Write_3c_1V0], (instregex "^FCVTL(v2|v4)i32$")>; + +// ASIMD FP convert, narrow (F32 to F16) +def : InstRW<[N1Write_4c_2V0], (instregex "^FCVTN(v4|v8)i16$")>; + +// ASIMD FP convert, narrow (F64 to F32) +def : InstRW<[N1Write_3c_1V0], (instregex "^FCVTN(v2|v4)i32$", + "^FCVTXN(v2|v4)f32$")>; + +// ASIMD FP convert, other, D-form F32 and Q-form F64 +def : InstRW<[N1Write_3c_1V0], (instregex "^[FSU]CVT[AMNPZ][SU]v2f(32|64)$", + "^[SU]CVTFv2f(32|64)$")>; + +// ASIMD FP convert, other, D-form F16 and Q-form F32 +def : InstRW<[N1Write_4c_2V0], (instregex "^[FSU]CVT[AMNPZ][SU]v4f(16|32)$", + "^[SU]CVTFv4f(16|32)$")>; + +// ASIMD FP convert, other, Q-form F16 +def : InstRW<[N1Write_6c_4V0], (instregex "^[FSU]CVT[AMNPZ][SU]v8f16$", + "^[SU]CVTFv8f16$")>; + +// ASIMD FP divide, D-form, F16 +// ASIMD FP square root, D-form, F16 +def : InstRW<[N1Write_7c7_1V0], (instrs FDIVv4f16, FSQRTv4f16)>; + +// ASIMD FP divide, D-form, F32 +// ASIMD FP square root, D-form, F32 +def : InstRW<[N1Write_10c7_1V0], (instrs FDIVv2f32, FSQRTv2f32)>; + +// ASIMD FP divide, Q-form, F16 +// ASIMD FP square root, Q-form, F16 +def : InstRW<[N1Write_13c10_1V0], (instrs FDIVv8f16, FSQRTv8f16)>; + +// ASIMD FP divide, Q-form, F32 +// ASIMD FP square root, Q-form, F32 +def : InstRW<[N1Write_10c7_1V0], (instrs FDIVv4f32, FSQRTv4f32)>; + +// ASIMD FP divide, Q-form, F64 +def : InstRW<[N1Write_15c7_1V0], (instrs FDIVv2f64)>; + +// ASIMD FP square root, Q-form, F64 +def : InstRW<[N1Write_17c7_1V0], (instrs FSQRTv2f64)>; + +// ASIMD FP max/min, reduce, F32 and D-form F16 +def : InstRW<[N1Write_5c_1V], (instregex "^F(MAX|MIN)(NM)?Vv4(i16|i32)v$")>; + +// ASIMD FP max/min, reduce, Q-form F16 +def : InstRW<[N1Write_8c_3V], (instregex "^F(MAX|MIN)(NM)?Vv8i16v$")>; + +// ASIMD FP multiply +def : InstRW<[N1Write_3c_1V], (instregex "^FMULX?v")>; + +// ASIMD FP multiply accumulate +def : InstRW<[N1Write_4c_1V], (instregex "^FML[AS]v")>; + +// ASIMD FP multiply accumulate long +def : InstRW<[N1Write_5c_1V], (instregex "^FML[AS]L2?v")>; + +// ASIMD FP round, D-form F32 and Q-form F64 +def : InstRW<[N1Write_3c_1V0], (instregex "^FRINT[AIMNPXZ]v2f(32|64)$")>; + +// ASIMD FP round, D-form F16 and Q-form F32 +def : InstRW<[N1Write_4c_2V0], (instregex "^FRINT[AIMNPXZ]v4f(16|32)$")>; + +// ASIMD FP round, Q-form F16 +def : InstRW<[N1Write_6c_4V0], (instregex "^FRINT[AIMNPXZ]v8f16$")>; + + +// ASIMD miscellaneous instructions +// ----------------------------------------------------------------------------- + +// ASIMD bit reverse +// ASIMD bitwise insert +// ASIMD count +// ASIMD duplicate, element +// ASIMD extract +// ASIMD extract narrow +// ASIMD insert, element to element +// ASIMD move, FP immed +// ASIMD move, integer immed +// ASIMD reverse +// ASIMD table lookup, 1 or 2 table regs +// ASIMD table lookup extension, 1 table reg +// ASIMD transfer, element to gen reg +// ASIMD transpose +// ASIMD unzip/zip +// Covered by "SchedAlias (WriteV[dq]...)" above + +// ASIMD duplicate, gen reg +def : InstRW<[N1Write_3c_1M], + (instregex "^DUP((v16|v8)i8|(v8|v4)i16|(v4|v2)i32|v2i64)gpr$")>; + +// ASIMD extract narrow, saturating +def : InstRW<[N1Write_4c_1V1], (instregex "^[SU]QXTNv", "^SQXTUNv")>; + +// ASIMD reciprocal and square root estimate, D-form F32 and F64 +def : InstRW<[N1Write_3c_1V0], (instrs FRECPEv1i32, FRECPEv2f32, FRECPEv1i64, + FRECPXv1i32, FRECPXv1i64, + URECPEv2i32, + FRSQRTEv1i32, FRSQRTEv2f32, FRSQRTEv1i64, + URSQRTEv2i32)>; + +// ASIMD reciprocal and square root estimate, D-form F16 and Q-form F32 +def : InstRW<[N1Write_4c_2V0], (instrs FRECPEv1f16, FRECPEv4f16, FRECPEv4f32, + FRECPXv1f16, + URECPEv4i32, + FRSQRTEv1f16, FRSQRTEv4f16, FRSQRTEv4f32, + URSQRTEv4i32)>; + +// ASIMD reciprocal and square root estimate, Q-form F16 +def : InstRW<[N1Write_6c_4V0], (instrs FRECPEv8f16, + FRSQRTEv8f16)>; + +// ASIMD reciprocal step +def : InstRW<[N1Write_4c_1V], (instregex "^FRECPS(16|32|64)$", "^FRECPSv", + "^FRSQRTS(16|32|64)$", "^FRSQRTSv")>; + +// ASIMD table lookup, 3 table regs +// ASIMD table lookup extension, 2 table reg +def : InstRW<[N1Write_4c_4V], (instrs TBLv8i8Three, TBLv16i8Three, + TBXv8i8Two, TBXv16i8Two)>; + +// ASIMD table lookup, 4 table regs +def : InstRW<[N1Write_4c_3V], (instrs TBLv8i8Four, TBLv16i8Four)>; + +// ASIMD table lookup extension, 3 table reg +def : InstRW<[N1Write_6c_3V], (instrs TBXv8i8Three, TBXv16i8Three)>; + +// ASIMD table lookup extension, 4 table reg +def : InstRW<[N1Write_6c_5V], (instrs TBXv8i8Four, TBXv16i8Four)>; + +// ASIMD transfer, element to gen reg +def : InstRW<[N1Write_2c_1V1], (instregex "^SMOVvi(((8|16)to(32|64))|32to64)$", + "^UMOVvi(8|16|32|64)$")>; + +// ASIMD transfer, gen reg to element +def : InstRW<[N1Write_5c_1M_1V], (instregex "^INSvi(8|16|32|64)gpr$")>; + + +// ASIMD load instructions +// ----------------------------------------------------------------------------- + +// ASIMD load, 1 element, multiple, 1 reg +def : InstRW<[N1Write_5c_1L], + (instregex "^LD1Onev(8b|16b|4h|8h|2s|4s|1d|2d)$")>; +def : InstRW<[N1Write_5c_1L, WriteAdr], + (instregex "^LD1Onev(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>; + +// ASIMD load, 1 element, multiple, 2 reg +def : InstRW<[N1Write_5c_2L], + (instregex "^LD1Twov(8b|16b|4h|8h|2s|4s|1d|2d)$")>; +def : InstRW<[N1Write_5c_2L, WriteAdr], + (instregex "^LD1Twov(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>; + +// ASIMD load, 1 element, multiple, 3 reg +def : InstRW<[N1Write_6c_3L], + (instregex "^LD1Threev(8b|16b|4h|8h|2s|4s|1d|2d)$")>; +def : InstRW<[N1Write_6c_3L, WriteAdr], + (instregex "^LD1Threev(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>; + +// ASIMD load, 1 element, multiple, 4 reg +def : InstRW<[N1Write_6c_4L], + (instregex "^LD1Fourv(8b|16b|4h|8h|2s|4s|1d|2d)$")>; +def : InstRW<[N1Write_6c_4L, WriteAdr], + (instregex "^LD1Fourv(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>; + +// ASIMD load, 1 element, one lane +// ASIMD load, 1 element, all lanes +def : InstRW<[N1Write_7c_1L_1V], + (instregex "LD1(i|Rv)(8|16|32|64)$", + "LD1Rv(8b|16b|4h|8h|2s|4s|1d|2d)$")>; +def : InstRW<[N1Write_7c_1L_1V, WriteAdr], + (instregex "LD1i(8|16|32|64)_POST$", + "LD1Rv(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>; + +// ASIMD load, 2 element, multiple +// ASIMD load, 2 element, one lane +// ASIMD load, 2 element, all lanes +def : InstRW<[N1Write_7c_2L_2V], + (instregex "LD2Twov(8b|16b|4h|8h|2s|4s|2d)$", + "LD2i(8|16|32|64)$", + "LD2Rv(8b|16b|4h|8h|2s|4s|1d|2d)$")>; +def : InstRW<[N1Write_7c_2L_2V, WriteAdr], + (instregex "LD2Twov(8b|16b|4h|8h|2s|4s|2d)_POST$", + "LD2i(8|16|32|64)_POST$", + "LD2Rv(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>; + +// ASIMD load, 3 element, multiple +def : InstRW<[N1Write_8c_3L_3V], + (instregex "LD3Threev(8b|16b|4h|8h|2s|4s|2d)$")>; +def : InstRW<[N1Write_8c_3L_3V, WriteAdr], + (instregex "LD3Threev(8b|16b|4h|8h|2s|4s|2d)_POST$")>; + +// ASIMD load, 3 element, one lane +// ASIMD load, 3 element, all lanes +def : InstRW<[N1Write_7c_2L_3V], + (instregex "LD3i(8|16|32|64)$", + "LD3Rv(8b|16b|4h|8h|2s|4s|1d|2d)$")>; +def : InstRW<[N1Write_7c_2L_3V, WriteAdr], + (instregex "LD3i(8|16|32|64)_POST$", + "LD3Rv(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>; + +// ASIMD load, 4 element, multiple, D-form +def : InstRW<[N1Write_8c_3L_4V], + (instregex "LD4Fourv(8b|4h|2s)$")>; +def : InstRW<[N1Write_8c_3L_4V, WriteAdr], + (instregex "LD4Fourv(8b|4h|2s)_POST$")>; + +// ASIMD load, 4 element, multiple, Q-form +def : InstRW<[N1Write_10c_4L_4V], + (instregex "LD4Fourv(16b|8h|4s|2d)$")>; +def : InstRW<[N1Write_10c_4L_4V, WriteAdr], + (instregex "LD4Fourv(16b|8h|4s|2d)_POST$")>; + +// ASIMD load, 4 element, one lane +// ASIMD load, 4 element, all lanes +def : InstRW<[N1Write_8c_4L_4V], + (instregex "LD4i(8|16|32|64)$", + "LD4Rv(8b|16b|4h|8h|2s|4s|1d|2d)$")>; +def : InstRW<[N1Write_8c_4L_4V, WriteAdr], + (instregex "LD4i(8|16|32|64)_POST$", + "LD4Rv(8b|16b|4h|8h|2s|4s|1d|2d)_POST$")>; + + +// ASIMD store instructions +// ----------------------------------------------------------------------------- + +// ASIMD store, 1 element, multiple, 1 reg, D-form +def : InstRW<[N1Write_2c_1L_1V], + (instregex "ST1Onev(8b|4h|2s|1d)$")>; +def : InstRW<[N1Write_2c_1L_1V, WriteAdr], + (instregex "ST1Onev(8b|4h|2s|1d)_POST$")>; + +// ASIMD store, 1 element, multiple, 1 reg, Q-form +def : InstRW<[N1Write_2c_1L_1V], + (instregex "ST1Onev(16b|8h|4s|2d)$")>; +def : InstRW<[N1Write_2c_1L_1V, WriteAdr], + (instregex "ST1Onev(16b|8h|4s|2d)_POST$")>; + +// ASIMD store, 1 element, multiple, 2 reg, D-form +def : InstRW<[N1Write_2c_1L_2V], + (instregex "ST1Twov(8b|4h|2s|1d)$")>; +def : InstRW<[N1Write_2c_1L_2V, WriteAdr], + (instregex "ST1Twov(8b|4h|2s|1d)_POST$")>; + +// ASIMD store, 1 element, multiple, 2 reg, Q-form +def : InstRW<[N1Write_3c_2L_2V], + (instregex "ST1Twov(16b|8h|4s|2d)$")>; +def : InstRW<[N1Write_3c_2L_2V, WriteAdr], + (instregex "ST1Twov(16b|8h|4s|2d)_POST$")>; + +// ASIMD store, 1 element, multiple, 3 reg, D-form +def : InstRW<[N1Write_3c_2L_3V], + (instregex "ST1Threev(8b|4h|2s|1d)$")>; +def : InstRW<[N1Write_3c_2L_3V, WriteAdr], + (instregex "ST1Threev(8b|4h|2s|1d)_POST$")>; + +// ASIMD store, 1 element, multiple, 3 reg, Q-form +def : InstRW<[N1Write_4c_3L_3V], + (instregex "ST1Threev(16b|8h|4s|2d)$")>; +def : InstRW<[N1Write_4c_3L_3V, WriteAdr], + (instregex "ST1Threev(16b|8h|4s|2d)_POST$")>; + +// ASIMD store, 1 element, multiple, 4 reg, D-form +def : InstRW<[N1Write_3c_2L_2V], + (instregex "ST1Fourv(8b|4h|2s|1d)$")>; +def : InstRW<[N1Write_3c_2L_2V, WriteAdr], + (instregex "ST1Fourv(8b|4h|2s|1d)_POST$")>; + +// ASIMD store, 1 element, multiple, 4 reg, Q-form +def : InstRW<[N1Write_5c_4L_4V], + (instregex "ST1Fourv(16b|8h|4s|2d)$")>; +def : InstRW<[N1Write_5c_4L_4V, WriteAdr], + (instregex "ST1Fourv(16b|8h|4s|2d)_POST$")>; + +// ASIMD store, 1 element, one lane +def : InstRW<[N1Write_4c_1L_1V], + (instregex "ST1i(8|16|32|64)$")>; +def : InstRW<[N1Write_4c_1L_1V, WriteAdr], + (instregex "ST1i(8|16|32|64)_POST$")>; + +// ASIMD store, 2 element, multiple, D-form, B/H/S +def : InstRW<[N1Write_4c_1L_1V], + (instregex "ST2Twov(8b|4h|2s)$")>; +def : InstRW<[N1Write_4c_1L_1V, WriteAdr], + (instregex "ST2Twov(8b|4h|2s)_POST$")>; + +// ASIMD store, 2 element, multiple, Q-form +def : InstRW<[N1Write_5c_2L_2V], + (instregex "ST2Twov(16b|8h|4s|2d)$")>; +def : InstRW<[N1Write_5c_2L_2V, WriteAdr], + (instregex "ST2Twov(16b|8h|4s|2d)_POST$")>; + +// ASIMD store, 2 element, one lane +def : InstRW<[N1Write_4c_1L_1V], + (instregex "ST2i(8|16|32|64)$")>; +def : InstRW<[N1Write_4c_1L_1V, WriteAdr], + (instregex "ST2i(8|16|32|64)_POST$")>; + +// ASIMD store, 3 element, multiple, D-form, B/H/S +def : InstRW<[N1Write_5c_2L_2V], + (instregex "ST3Threev(8b|4h|2s)$")>; +def : InstRW<[N1Write_5c_2L_2V, WriteAdr], + (instregex "ST3Threev(8b|4h|2s)_POST$")>; + +// ASIMD store, 3 element, multiple, Q-form +def : InstRW<[N1Write_6c_3L_3V], + (instregex "ST3Threev(16b|8h|4s|2d)$")>; +def : InstRW<[N1Write_6c_3L_3V, WriteAdr], + (instregex "ST3Threev(16b|8h|4s|2d)_POST$")>; + +// ASIMD store, 3 element, one lane, B/H/S +def : InstRW<[N1Write_4c_3L_3V], + (instregex "ST3i(8|16|32)$")>; +def : InstRW<[N1Write_4c_3L_3V, WriteAdr], + (instregex "ST3i(8|16|32)_POST$")>; + +// ASIMD store, 3 element, one lane, D +def : InstRW<[N1Write_5c_3L_3V], + (instrs ST3i64)>; +def : InstRW<[N1Write_5c_3L_3V, WriteAdr], + (instrs ST3i64_POST)>; + +// ASIMD store, 4 element, multiple, D-form, B/H/S +def : InstRW<[N1Write_7c_3L_3V], + (instregex "ST4Fourv(8b|4h|2s)$")>; +def : InstRW<[N1Write_7c_3L_3V, WriteAdr], + (instregex "ST4Fourv(8b|4h|2s)_POST$")>; + +// ASIMD store, 4 element, multiple, Q-form, B/H/S +def : InstRW<[N1Write_9c_6L_6V], + (instregex "ST4Fourv(16b|8h|4s)$")>; +def : InstRW<[N1Write_9c_6L_6V, WriteAdr], + (instregex "ST4Fourv(16b|8h|4s)_POST$")>; + +// ASIMD store, 4 element, multiple, Q-form, D +def : InstRW<[N1Write_6c_4L_4V], + (instrs ST4Fourv2d)>; +def : InstRW<[N1Write_6c_4L_4V, WriteAdr], + (instrs ST4Fourv2d_POST)>; + +// ASIMD store, 4 element, one lane, B/H/S +def : InstRW<[N1Write_5c_3L_3V], + (instregex "ST4i(8|16|32)$")>; +def : InstRW<[N1Write_5c_3L_3V, WriteAdr], + (instregex "ST4i(8|16|32)_POST$")>; + +// ASIMD store, 4 element, one lane, D +def : InstRW<[N1Write_4c_3L_3V], + (instrs ST4i64)>; +def : InstRW<[N1Write_4c_3L_3V, WriteAdr], + (instrs ST4i64_POST)>; + + +// Cryptography extensions +// ----------------------------------------------------------------------------- + +// Crypto AES ops +def N1WriteVC : WriteSequence<[N1Write_2c_1V0]>; +def N1ReadVC : SchedReadAdvance<2, [N1WriteVC]>; +def : InstRW<[N1WriteVC], (instrs AESDrr, AESErr)>; +def : InstRW<[N1Write_2c_1V0, N1ReadVC], (instrs AESMCrr, AESIMCrr)>; + +// Crypto polynomial (64x64) multiply long +// Crypto SHA1 hash acceleration op +// Crypto SHA1 schedule acceleration ops +// Crypto SHA256 schedule acceleration ops +def : InstRW<[N1Write_2c_1V0], (instregex "^PMULLv[12]i64$", + "^SHA1(H|SU0|SU1)rr", + "^SHA256SU[01]rr")>; + +// Crypto SHA1 hash acceleration ops +// Crypto SHA256 hash acceleration ops +def : InstRW<[N1Write_4c_1V0], (instregex "^SHA1[CMP]rrr$", + "^SHA256H2?rrr$")>; + + +// CRC +// ----------------------------------------------------------------------------- + +// CRC checksum ops +def : InstRW<[N1Write_2c_1M], (instregex "^CRC32C?[BHWX]rr$")>; + + +} diff --git a/llvm/test/CodeGen/AArch64/machine-licm-sub-loop.ll b/llvm/test/CodeGen/AArch64/machine-licm-sub-loop.ll --- a/llvm/test/CodeGen/AArch64/machine-licm-sub-loop.ll +++ b/llvm/test/CodeGen/AArch64/machine-licm-sub-loop.ll @@ -12,10 +12,10 @@ ; CHECK-NEXT: mov w10, w0 ; CHECK-NEXT: mov x8, xzr ; CHECK-NEXT: mov x9, xzr -; CHECK-NEXT: and x11, x10, #0xfffffff0 ; CHECK-NEXT: add x12, x1, #32 ; CHECK-NEXT: ubfiz x13, x0, #2, #32 ; CHECK-NEXT: add x14, x2, #16 +; CHECK-NEXT: and x11, x10, #0xfffffff0 ; CHECK-NEXT: b .LBB0_3 ; CHECK-NEXT: .p2align 5, , 16 ; CHECK-NEXT: .LBB0_2: // %for.cond1.for.cond.cleanup3_crit_edge.us @@ -45,18 +45,18 @@ ; CHECK-NEXT: .LBB0_6: // %vector.body ; CHECK-NEXT: // Parent Loop BB0_3 Depth=1 ; CHECK-NEXT: // => This Inner Loop Header: Depth=2 -; CHECK-NEXT: dup v0.8h, w15 +; CHECK-NEXT: ldp q1, q0, [x16, #-16] +; CHECK-NEXT: dup v6.8h, w15 ; CHECK-NEXT: subs x18, x18, #16 -; CHECK-NEXT: ldp q1, q2, [x16, #-16] ; CHECK-NEXT: add x16, x16, #32 -; CHECK-NEXT: ldp q4, q3, [x17, #-32] -; CHECK-NEXT: smlal v4.4s, v0.4h, v1.4h -; CHECK-NEXT: smlal2 v3.4s, v0.8h, v1.8h -; CHECK-NEXT: ldp q6, q5, [x17] -; CHECK-NEXT: smlal v6.4s, v0.4h, v2.4h -; CHECK-NEXT: smlal2 v5.4s, v0.8h, v2.8h -; CHECK-NEXT: stp q4, q3, [x17, #-32] -; CHECK-NEXT: stp q6, q5, [x17], #64 +; CHECK-NEXT: ldp q3, q2, [x17, #-32] +; CHECK-NEXT: smlal v3.4s, v6.4h, v1.4h +; CHECK-NEXT: ldp q5, q4, [x17] +; CHECK-NEXT: smlal2 v2.4s, v6.8h, v1.8h +; CHECK-NEXT: smlal v5.4s, v6.4h, v0.4h +; CHECK-NEXT: smlal2 v4.4s, v6.8h, v0.8h +; CHECK-NEXT: stp q3, q2, [x17, #-32] +; CHECK-NEXT: stp q5, q4, [x17], #64 ; CHECK-NEXT: b.ne .LBB0_6 ; CHECK-NEXT: // %bb.7: // %middle.block ; CHECK-NEXT: // in Loop: Header=BB0_3 Depth=1 @@ -74,8 +74,8 @@ ; CHECK-NEXT: // Parent Loop BB0_3 Depth=1 ; CHECK-NEXT: // => This Inner Loop Header: Depth=2 ; CHECK-NEXT: ldrsh w3, [x18], #2 -; CHECK-NEXT: subs x16, x16, #1 ; CHECK-NEXT: ldr w4, [x17] +; CHECK-NEXT: subs x16, x16, #1 ; CHECK-NEXT: madd w3, w3, w15, w4 ; CHECK-NEXT: str w3, [x17], #4 ; CHECK-NEXT: b.ne .LBB0_9 diff --git a/llvm/test/tools/llvm-mca/AArch64/Neoverse/N1-basic-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Neoverse/N1-basic-instructions.s new file mode 100644 --- /dev/null +++ b/llvm/test/tools/llvm-mca/AArch64/Neoverse/N1-basic-instructions.s @@ -0,0 +1,3722 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=aarch64 -mcpu=neoverse-n1 -instruction-tables < %s | FileCheck %s + +#------------------------------------------------------------------------------ +# Add/sub (immediate) +#------------------------------------------------------------------------------ + +add w2, w3, #4095 +add w30, w29, #1, lsl #12 +add w13, w5, #4095, lsl #12 +add x5, x7, #1638 +add w20, wsp, #801 +add wsp, wsp, #1104 +add wsp, w30, #4084 +add x0, x24, #291 +add x3, x24, #4095, lsl #12 +add x8, sp, #1074 +add sp, x29, #3816 +sub w0, wsp, #4077 +sub w4, w20, #546, lsl #12 +sub sp, sp, #288 +sub wsp, w19, #16 +adds w13, w23, #291, lsl #12 +cmn w2, #4095 +adds w20, wsp, #0 +cmn x3, #1, lsl #12 +cmp sp, #20, lsl #12 +cmp x30, #4095 +subs x4, sp, #3822 +cmn w3, #291, lsl #12 +cmn wsp, #1365 +cmn sp, #1092, lsl #12 +mov sp, x30 +mov wsp, w20 +mov x11, sp +mov w24, wsp + +#------------------------------------------------------------------------------ +# Add-subtract (shifted register) +#------------------------------------------------------------------------------ + +add w3, w5, w7 +add wzr, w3, w5 +add w20, wzr, w4 +add w4, w6, wzr +add w11, w13, w15 +add w9, w3, wzr, lsl #10 +add w17, w29, w20, lsl #31 +add w21, w22, w23, lsr #0 +add w24, w25, w26, lsr #18 +add w27, w28, w29, lsr #31 +add w2, w3, w4, asr #0 +add w5, w6, w7, asr #21 +add w8, w9, w10, asr #31 +add x3, x5, x7 +add xzr, x3, x5 +add x20, xzr, x4 +add x4, x6, xzr +add x11, x13, x15 +add x9, x3, xzr, lsl #10 +add x17, x29, x20, lsl #63 +add x21, x22, x23, lsr #0 +add x24, x25, x26, lsr #18 +add x27, x28, x29, lsr #63 +add x2, x3, x4, asr #0 +add x5, x6, x7, asr #21 +add x8, x9, x10, asr #63 +adds w3, w5, w7 +cmn w3, w5 +adds w20, wzr, w4 +adds w4, w6, wzr +adds w11, w13, w15 +adds w9, w3, wzr, lsl #10 +adds w17, w29, w20, lsl #31 +adds w21, w22, w23, lsr #0 +adds w24, w25, w26, lsr #18 +adds w27, w28, w29, lsr #31 +adds w2, w3, w4, asr #0 +adds w5, w6, w7, asr #21 +adds w8, w9, w10, asr #31 +adds x3, x5, x7 +cmn x3, x5 +adds x20, xzr, x4 +adds x4, x6, xzr +adds x11, x13, x15 +adds x9, x3, xzr, lsl #10 +adds x17, x29, x20, lsl #63 +adds x21, x22, x23, lsr #0 +adds x24, x25, x26, lsr #18 +adds x27, x28, x29, lsr #63 +adds x2, x3, x4, asr #0 +adds x5, x6, x7, asr #21 +adds x8, x9, x10, asr #63 +sub w3, w5, w7 +sub wzr, w3, w5 +sub w4, w6, wzr +sub w11, w13, w15 +sub w9, w3, wzr, lsl #10 +sub w17, w29, w20, lsl #31 +sub w21, w22, w23, lsr #0 +sub w24, w25, w26, lsr #18 +sub w27, w28, w29, lsr #31 +sub w2, w3, w4, asr #0 +sub w5, w6, w7, asr #21 +sub w8, w9, w10, asr #31 +sub x3, x5, x7 +sub xzr, x3, x5 +sub x4, x6, xzr +sub x11, x13, x15 +sub x9, x3, xzr, lsl #10 +sub x17, x29, x20, lsl #63 +sub x21, x22, x23, lsr #0 +sub x24, x25, x26, lsr #18 +sub x27, x28, x29, lsr #63 +sub x2, x3, x4, asr #0 +sub x5, x6, x7, asr #21 +sub x8, x9, x10, asr #63 +subs w3, w5, w7 +cmp w3, w5 +subs w4, w6, wzr +subs w11, w13, w15 +subs w9, w3, wzr, lsl #10 +subs w17, w29, w20, lsl #31 +subs w21, w22, w23, lsr #0 +subs w24, w25, w26, lsr #18 +subs w27, w28, w29, lsr #31 +subs w2, w3, w4, asr #0 +subs w5, w6, w7, asr #21 +subs w8, w9, w10, asr #31 +subs x3, x5, x7 +cmp x3, x5 +subs x4, x6, xzr +subs x11, x13, x15 +subs x9, x3, xzr, lsl #10 +subs x17, x29, x20, lsl #63 +subs x21, x22, x23, lsr #0 +subs x24, x25, x26, lsr #18 +subs x27, x28, x29, lsr #63 +subs x2, x3, x4, asr #0 +subs x5, x6, x7, asr #21 +subs x8, x9, x10, asr #63 +cmn wzr, w4 +cmn w5, wzr +cmn w6, w7 +cmn w8, w9, lsl #15 +cmn w10, w11, lsl #31 +cmn w12, w13, lsr #0 +cmn w14, w15, lsr #21 +cmn w16, w17, lsr #31 +cmn w18, w19, asr #0 +cmn w20, w21, asr #22 +cmn w22, w23, asr #31 +cmn x0, x3 +cmn xzr, x4 +cmn x5, xzr +cmn x6, x7 +cmn x8, x9, lsl #15 +cmn x10, x11, lsl #63 +cmn x12, x13, lsr #0 +cmn x14, x15, lsr #41 +cmn x16, x17, lsr #63 +cmn x18, x19, asr #0 +cmn x20, x21, asr #55 +cmn x22, x23, asr #63 +cmp w0, w3 +cmp wzr, w4 +cmp w5, wzr +cmp w6, w7 +cmp w8, w9, lsl #15 +cmp w10, w11, lsl #31 +cmp w12, w13, lsr #0 +cmp w14, w15, lsr #21 +cmp w18, w19, asr #0 +cmp w20, w21, asr #22 +cmp w22, w23, asr #31 +cmp x0, x3 +cmp xzr, x4 +cmp x5, xzr +cmp x6, x7 +cmp x8, x9, lsl #15 +cmp x10, x11, lsl #63 +cmp x12, x13, lsr #0 +cmp x14, x15, lsr #41 +cmp x16, x17, lsr #63 +cmp x18, x19, asr #0 +cmp x20, x21, asr #55 +cmp x22, x23, asr #63 +cmp wzr, w0 +cmp xzr, x0 + +#------------------------------------------------------------------------------ +# Add-subtract (shifted register) +#------------------------------------------------------------------------------ + +adc w29, w27, w25 +adc wzr, w3, w4 +adc w9, wzr, w10 +adc w20, w0, wzr +adc x29, x27, x25 +adc xzr, x3, x4 +adc x9, xzr, x10 +adc x20, x0, xzr +adcs w29, w27, w25 +adcs wzr, w3, w4 +adcs w9, wzr, w10 +adcs w20, w0, wzr +adcs x29, x27, x25 +adcs xzr, x3, x4 +adcs x9, xzr, x10 +adcs x20, x0, xzr +sbc w29, w27, w25 +sbc wzr, w3, w4 +ngc w9, w10 +sbc w20, w0, wzr +sbc x29, x27, x25 +sbc xzr, x3, x4 +ngc x9, x10 +sbc x20, x0, xzr +sbcs w29, w27, w25 +sbcs wzr, w3, w4 +ngcs w9, w10 +sbcs w20, w0, wzr +sbcs x29, x27, x25 +sbcs xzr, x3, x4 +ngcs x9, x10 +sbcs x20, x0, xzr +ngc w3, w12 +ngc wzr, w9 +ngc w23, wzr +ngc x29, x30 +ngc xzr, x0 +ngc x0, xzr +ngcs w3, w12 +ngcs wzr, w9 +ngcs w23, wzr +ngcs x29, x30 +ngcs xzr, x0 +ngcs x0, xzr + +#------------------------------------------------------------------------------ +# Compare and branch (immediate) +#------------------------------------------------------------------------------ + +sbfx x1, x2, #3, #2 +asr x3, x4, #63 +asr wzr, wzr, #31 +sbfx w12, w9, #0, #1 +ubfiz x4, x5, #52, #11 +ubfx xzr, x4, #0, #1 +ubfiz x4, xzr, #1, #6 +lsr x5, x6, #12 +bfi x4, x5, #52, #11 +bfxil xzr, x4, #0, #1 +bfi x4, xzr, #1, #6 +bfxil x5, x6, #12, #52 +sxtb w1, w2 +sxtb xzr, w3 +sxth w9, w10 +sxth x0, w1 +sxtw x3, w30 +uxtb w1, w2 +uxth w9, w10 +ubfx x3, x30, #0, #32 +asr w3, w2, #0 +asr w9, w10, #31 +asr x20, x21, #63 +asr w1, wzr, #3 +lsr w3, w2, #0 +lsr w9, w10, #31 +lsr x20, x21, #63 +lsr wzr, wzr, #3 +lsr w3, w2, #0 +lsl w9, w10, #31 +lsl x20, x21, #63 +lsl w1, wzr, #3 +sbfx w9, w10, #0, #1 +sbfiz x2, x3, #63, #1 +asr x19, x20, #0 +sbfiz x9, x10, #5, #59 +asr w9, w10, #0 +sbfiz w11, w12, #31, #1 +sbfiz w13, w14, #29, #3 +sbfiz xzr, xzr, #10, #11 +sbfx w9, w10, #0, #1 +asr x2, x3, #63 +asr x19, x20, #0 +asr x9, x10, #5 +asr w9, w10, #0 +asr w11, w12, #31 +asr w13, w14, #29 +sbfx xzr, xzr, #10, #11 +bfxil w9, w10, #0, #1 +bfi x2, x3, #63, #1 +bfxil x19, x20, #0, #64 +bfi x9, x10, #5, #59 +bfxil w9, w10, #0, #32 +bfi w11, w12, #31, #1 +bfi w13, w14, #29, #3 +bfi xzr, xzr, #10, #11 +bfxil w9, w10, #0, #1 +bfxil x2, x3, #63, #1 +bfxil x19, x20, #0, #64 +bfxil x9, x10, #5, #59 +bfxil w9, w10, #0, #32 +bfxil w11, w12, #31, #1 +bfxil w13, w14, #29, #3 +bfxil xzr, xzr, #10, #11 +ubfx w9, w10, #0, #1 +lsl x2, x3, #63 +lsr x19, x20, #0 +lsl x9, x10, #5 +lsr w9, w10, #0 +lsl w11, w12, #31 +lsl w13, w14, #29 +ubfiz xzr, xzr, #10, #11 +ubfx w9, w10, #0, #1 +lsr x2, x3, #63 +lsr x19, x20, #0 +lsr x9, x10, #5 +lsr w9, w10, #0 +lsr w11, w12, #31 +lsr w13, w14, #29 +ubfx xzr, xzr, #10, #11 + +#------------------------------------------------------------------------------ +# Compare and branch (immediate) +#------------------------------------------------------------------------------ + +cbz w5, #4 +cbz x5, #0 +cbnz x2, #-4 +cbnz x26, #1048572 +cbz wzr, #0 +cbnz xzr, #0 + +#------------------------------------------------------------------------------ +# Conditional branch (immediate) +#------------------------------------------------------------------------------ + +b.ne #4 +b.ge #1048572 +b.ge #-4 + +#------------------------------------------------------------------------------ +# Conditional compare (immediate) +#------------------------------------------------------------------------------ + +ccmp w1, #31, #0, eq +ccmp w3, #0, #15, hs +ccmp wzr, #15, #13, hs +ccmp x9, #31, #0, le +ccmp x3, #0, #15, gt +ccmp xzr, #5, #7, ne +ccmn w1, #31, #0, eq +ccmn w3, #0, #15, hs +ccmn wzr, #15, #13, hs +ccmn x9, #31, #0, le +ccmn x3, #0, #15, gt +ccmn xzr, #5, #7, ne + +#------------------------------------------------------------------------------ +# Conditional compare (register) +#------------------------------------------------------------------------------ + +ccmp w1, wzr, #0, eq +ccmp w3, w0, #15, hs +ccmp wzr, w15, #13, hs +ccmp x9, xzr, #0, le +ccmp x3, x0, #15, gt +ccmp xzr, x5, #7, ne +ccmn w1, wzr, #0, eq +ccmn w3, w0, #15, hs +ccmn wzr, w15, #13, hs +ccmn x9, xzr, #0, le +ccmn x3, x0, #15, gt +ccmn xzr, x5, #7, ne + +#------------------------------------------------------------------------------ +# Conditional branch (immediate) +#------------------------------------------------------------------------------ + +csel w1, w0, w19, ne +csel wzr, w5, w9, eq +csel w9, wzr, w30, gt +csel w1, w28, wzr, mi +csel x19, x23, x29, lt +csel xzr, x3, x4, ge +csel x5, xzr, x6, hs +csel x7, x8, xzr, lo +csinc w1, w0, w19, ne +csinc wzr, w5, w9, eq +csinc w9, wzr, w30, gt +csinc w1, w28, wzr, mi +csinc x19, x23, x29, lt +csinc xzr, x3, x4, ge +csinc x5, xzr, x6, hs +csinc x7, x8, xzr, lo +csinv w1, w0, w19, ne +csinv wzr, w5, w9, eq +csinv w9, wzr, w30, gt +csinv w1, w28, wzr, mi +csinv x19, x23, x29, lt +csinv xzr, x3, x4, ge +csinv x5, xzr, x6, hs +csinv x7, x8, xzr, lo +csneg w1, w0, w19, ne +csneg wzr, w5, w9, eq +csneg w9, wzr, w30, gt +csneg w1, w28, wzr, mi +csneg x19, x23, x29, lt +csneg xzr, x3, x4, ge +csneg x5, xzr, x6, hs +csneg x7, x8, xzr, lo +cset w3, eq +cset x9, pl +csetm w20, ne +csetm x30, ge +csinc w2, wzr, wzr, al +csinv x3, xzr, xzr, nv +cinc w3, w5, gt +cinc wzr, w4, le +cset w9, lt +cinc x3, x5, gt +cinc xzr, x4, le +cset x9, lt +csinc w5, w6, w6, nv +csinc x1, x2, x2, al +cinv w3, w5, gt +cinv wzr, w4, le +csetm w9, lt +cinv x3, x5, gt +cinv xzr, x4, le +csetm x9, lt +csinv x1, x0, x0, al +csinv w9, w8, w8, nv +cneg w3, w5, gt +cneg wzr, w4, le +cneg w9, wzr, lt +cneg x3, x5, gt +cneg xzr, x4, le +cneg x9, xzr, lt +csneg x4, x8, x8, al +csinv w9, w8, w8, nv + +#------------------------------------------------------------------------------ +# Data-processing (1 source) +#------------------------------------------------------------------------------ + +rbit w0, w7 +rbit x18, x3 +rev16 w17, w1 +rev16 x5, x2 +rev w18, w0 +rev32 x20, x1 +rev x22, x2 +clz w24, w3 +clz x26, x4 +cls w3, w5 +cls x20, x5 + +#------------------------------------------------------------------------------ +# Data-processing (2 source) +#------------------------------------------------------------------------------ + +udiv w0, w7, w10 +udiv x9, x22, x4 +sdiv w12, w21, w0 +sdiv x13, x2, x1 +lsl w11, w12, w13 +lsl x14, x15, x16 +lsr w17, w18, w19 +lsr x20, x21, x22 +asr w23, w24, w25 +asr x26, x27, x28 +ror w0, w1, w2 +ror x3, x4, x5 +lsl w6, w7, w8 +lsl x9, x10, x11 +lsr w12, w13, w14 +lsr x15, x16, x17 +asr w18, w19, w20 +asr x21, x22, x23 +ror w24, w25, w26 +ror x27, x28, x29 + +#------------------------------------------------------------------------------ +# Data-processing (3 sources) +#------------------------------------------------------------------------------ + +smulh x30, x29, x28 +smulh xzr, x27, x26 +umulh x30, x29, x28 +umulh x23, x30, xzr +madd w1, w3, w7, w4 +madd wzr, w0, w9, w11 +madd w13, wzr, w4, w4 +madd w19, w30, wzr, w29 +mul w4, w5, w6 +madd x1, x3, x7, x4 +madd xzr, x0, x9, x11 +madd x13, xzr, x4, x4 +madd x19, x30, xzr, x29 +mul x4, x5, x6 +msub w1, w3, w7, w4 +msub wzr, w0, w9, w11 +msub w13, wzr, w4, w4 +msub w19, w30, wzr, w29 +mneg w4, w5, w6 +msub x1, x3, x7, x4 +msub xzr, x0, x9, x11 +msub x13, xzr, x4, x4 +msub x19, x30, xzr, x29 +mneg x4, x5, x6 +smaddl x3, w5, w2, x9 +smaddl xzr, w10, w11, x12 +smaddl x13, wzr, w14, x15 +smaddl x16, w17, wzr, x18 +smull x19, w20, w21 +smsubl x3, w5, w2, x9 +smsubl xzr, w10, w11, x12 +smsubl x13, wzr, w14, x15 +smsubl x16, w17, wzr, x18 +smnegl x19, w20, w21 +umaddl x3, w5, w2, x9 +umaddl xzr, w10, w11, x12 +umaddl x13, wzr, w14, x15 +umaddl x16, w17, wzr, x18 +umull x19, w20, w21 +umsubl x3, w5, w2, x9 +umsubl x16, w17, wzr, x18 +umnegl x19, w20, w21 +smulh x30, x29, x28 +smulh x23, x22, xzr +umulh x23, x22, xzr +mul x19, x20, xzr +mneg w21, w22, w23 +smull x11, w13, w17 +umull x11, w13, w17 +smnegl x11, w13, w17 +umnegl x11, w13, w17 + +#------------------------------------------------------------------------------ +# Extract (immediate) +#------------------------------------------------------------------------------ + +extr w3, w5, w7, #0 +extr w11, w13, w17, #31 +extr x3, x5, x7, #15 +extr x11, x13, x17, #63 +ror x19, x23, #24 +ror x29, xzr, #63 +ror w9, w13, #31 + +#------------------------------------------------------------------------------ +# Floating-point compare +#------------------------------------------------------------------------------ + +fcmp s3, s5 +fcmp s31, #0.0 +fcmp s31, #0.0 +fcmpe s29, s30 +fcmpe s15, #0.0 +fcmpe s15, #0.0 +fcmp d4, d12 +fcmp d23, #0.0 +fcmp d23, #0.0 +fcmpe d26, d22 +fcmpe d29, #0.0 +fcmpe d29, #0.0 + +#------------------------------------------------------------------------------ +# Floating-point conditional compare +#------------------------------------------------------------------------------ + +fccmp s1, s31, #0, eq +fccmp s3, s0, #15, hs +fccmp s31, s15, #13, hs +fccmp d9, d31, #0, le +fccmp d3, d0, #15, gt +fccmp d31, d5, #7, ne +fccmpe s1, s31, #0, eq +fccmpe s3, s0, #15, hs +fccmpe s31, s15, #13, hs +fccmpe d9, d31, #0, le +fccmpe d3, d0, #15, gt +fccmpe d31, d5, #7, ne + +#------------------------------------------------------------------------------- +# Floating-point conditional compare +#------------------------------------------------------------------------------- + +fcsel s3, s20, s9, pl +fcsel d9, d10, d11, mi + +#------------------------------------------------------------------------------ +# Floating-point data-processing (1 source) +#------------------------------------------------------------------------------ + +fmov s0, s1 +fabs s2, s3 +fneg s4, s5 +fsqrt s6, s7 +fcvt d8, s9 +fcvt h10, s11 +frintn s12, s13 +frintp s14, s15 +frintm s16, s17 +frintz s18, s19 +frinta s20, s21 +frintx s22, s23 +frinti s24, s25 +fmov d0, d1 +fabs d2, d3 +fneg d4, d5 +fsqrt d6, d7 +fcvt s8, d9 +fcvt h10, d11 +frintn d12, d13 +frintp d14, d15 +frintm d16, d17 +frintz d18, d19 +frinta d20, d21 +frintx d22, d23 +frinti d24, d25 +fcvt s26, h27 +fcvt d28, h29 + +#------------------------------------------------------------------------------ +# Floating-point data-processing (2 sources) +#------------------------------------------------------------------------------ + +fmul s20, s19, s17 +fdiv s1, s2, s3 +fadd s4, s5, s6 +fsub s7, s8, s9 +fmax s10, s11, s12 +fmin s13, s14, s15 +fmaxnm s16, s17, s18 +fminnm s19, s20, s21 +fnmul s22, s23, s2 +fmul d20, d19, d17 +fdiv d1, d2, d3 +fadd d4, d5, d6 +fsub d7, d8, d9 +fmax d10, d11, d12 +fmin d13, d14, d15 +fmaxnm d16, d17, d18 +fminnm d19, d20, d21 +fnmul d22, d23, d24 + +#------------------------------------------------------------------------------ +# Floating-point data-processing (1 source) +#------------------------------------------------------------------------------ + +fmadd s3, s5, s6, s31 +fmadd d3, d13, d0, d23 +fmsub s3, s5, s6, s31 +fmsub d3, d13, d0, d23 +fnmadd s3, s5, s6, s31 +fnmadd d3, d13, d0, d23 +fnmsub s3, s5, s6, s31 +fnmsub d3, d13, d0, d23 + +#------------------------------------------------------------------------------ +# Floating-point <-> fixed-point conversion +#------------------------------------------------------------------------------ + +fcvtzs w3, h5, #1 +fcvtzs wzr, h20, #13 +fcvtzs w19, h0, #32 +fcvtzs x3, h5, #1 +fcvtzs x12, h30, #45 +fcvtzs x19, h0, #64 +fcvtzs w3, s5, #1 +fcvtzs wzr, s20, #13 +fcvtzs w19, s0, #32 +fcvtzs x3, s5, #1 +fcvtzs x12, s30, #45 +fcvtzs x19, s0, #64 +fcvtzs w3, d5, #1 +fcvtzs wzr, d20, #13 +fcvtzs w19, d0, #32 +fcvtzs x3, d5, #1 +fcvtzs x12, d30, #45 +fcvtzs x19, d0, #64 +fcvtzu w3, h5, #1 +fcvtzu wzr, h20, #13 +fcvtzu w19, h0, #32 +fcvtzu x3, h5, #1 +fcvtzu x12, h30, #45 +fcvtzu x19, h0, #64 +fcvtzu w3, s5, #1 +fcvtzu wzr, s20, #13 +fcvtzu w19, s0, #32 +fcvtzu x3, s5, #1 +fcvtzu x12, s30, #45 +fcvtzu x19, s0, #64 +fcvtzu w3, d5, #1 +fcvtzu wzr, d20, #13 +fcvtzu w19, d0, #32 +fcvtzu x3, d5, #1 +fcvtzu x12, d30, #45 +fcvtzu x19, d0, #64 +scvtf h23, w19, #1 +scvtf h31, wzr, #20 +scvtf h14, w0, #32 +scvtf h23, x19, #1 +scvtf h31, xzr, #20 +scvtf h14, x0, #64 +scvtf s23, w19, #1 +scvtf s31, wzr, #20 +scvtf s14, w0, #32 +scvtf s23, x19, #1 +scvtf s31, xzr, #20 +scvtf s14, x0, #64 +scvtf d23, w19, #1 +scvtf d31, wzr, #20 +scvtf d14, w0, #32 +scvtf d23, x19, #1 +scvtf d31, xzr, #20 +scvtf d14, x0, #64 +ucvtf h23, w19, #1 +ucvtf h31, wzr, #20 +ucvtf h14, w0, #32 +ucvtf h23, x19, #1 +ucvtf h31, xzr, #20 +ucvtf h14, x0, #64 +ucvtf s23, w19, #1 +ucvtf s31, wzr, #20 +ucvtf s14, w0, #32 +ucvtf s23, x19, #1 +ucvtf s31, xzr, #20 +ucvtf s14, x0, #64 +ucvtf d23, w19, #1 +ucvtf d31, wzr, #20 +ucvtf d14, w0, #32 +ucvtf d23, x19, #1 +ucvtf d31, xzr, #20 +ucvtf d14, x0, #64 + +#------------------------------------------------------------------------------ +# Floating-point <-> integer conversion +#------------------------------------------------------------------------------ + +fcvtns w3, h31 +fcvtns xzr, h12 +fcvtnu wzr, h12 +fcvtnu x0, h0 +fcvtps wzr, h9 +fcvtps x12, h20 +fcvtpu w30, h23 +fcvtpu x29, h3 +fcvtms w2, h3 +fcvtms x4, h5 +fcvtmu w6, h7 +fcvtmu x8, h9 +fcvtzs w10, h11 +fcvtzs x12, h13 +fcvtzu w14, h15 +fcvtzu x15, h16 +scvtf h17, w18 +scvtf h19, x20 +ucvtf h21, w22 +scvtf h23, x24 +fcvtas w25, h26 +fcvtas x27, h28 +fcvtau w29, h30 +fcvtau xzr, h0 +fcvtns w3, s31 +fcvtns xzr, s12 +fcvtnu wzr, s12 +fcvtnu x0, s0 +fcvtps wzr, s9 +fcvtps x12, s20 +fcvtpu w30, s23 +fcvtpu x29, s3 +fcvtms w2, s3 +fcvtms x4, s5 +fcvtmu w6, s7 +fcvtmu x8, s9 +fcvtzs w10, s11 +fcvtzs x12, s13 +fcvtzu w14, s15 +fcvtzu x15, s16 +scvtf s17, w18 +scvtf s19, x20 +ucvtf s21, w22 +scvtf s23, x24 +fcvtas w25, s26 +fcvtas x27, s28 +fcvtau w29, s30 +fcvtau xzr, s0 +fcvtns w3, d31 +fcvtns xzr, d12 +fcvtnu wzr, d12 +fcvtnu x0, d0 +fcvtps wzr, d9 +fcvtps x12, d20 +fcvtpu w30, d23 +fcvtpu x29, d3 +fcvtms w2, d3 +fcvtms x4, d5 +fcvtmu w6, d7 +fcvtmu x8, d9 +fcvtzs w10, d11 +fcvtzs x12, d13 +fcvtzu w14, d15 +fcvtzu x15, d16 +scvtf d17, w18 +scvtf d19, x20 +ucvtf d21, w22 +ucvtf d23, x24 +fcvtas w25, d26 +fcvtas x27, d28 +fcvtau w29, d30 +fcvtau xzr, d0 +fmov w3, s9 +fmov s9, w3 +fmov x20, d31 +fmov d1, x15 +fmov x3, v12.d[1] +fmov v1.d[1], x19 + +#------------------------------------------------------------------------------ +# Floating-point immediate +#------------------------------------------------------------------------------ + +fmov s2, #0.12500000 +fmov s3, #1.00000000 +fmov d30, #16.00000000 +fmov s4, #1.06250000 +fmov d10, #1.93750000 +fmov s12, #-1.00000000 +fmov d16, #8.50000000 + +#------------------------------------------------------------------------------ +# Load-register (literal) +#------------------------------------------------------------------------------ + +ldr w3, #0 +ldr x29, #4 +ldrsw xzr, #-4 +ldr s0, #8 +ldr d0, #1048572 +ldr q0, #-1048576 +prfm pldl1strm, #0 +prfm #22, #0 + +#------------------------------------------------------------------------------ +# Load/store exclusive +#------------------------------------------------------------------------------ + +stxrb w18, w8, [sp] +stxrh w24, w15, [x16] +stxr w5, w6, [x17] +stxr w1, x10, [x21] +ldxrb w30, [x0] +ldxrh w17, [x4] +ldxr w22, [sp] +ldxr x11, [x29] +ldxr x11, [x29] +ldxr x11, [x29] +stxp w12, w11, w10, [sp] +stxp wzr, x27, x9, [x12] +ldxp w0, wzr, [sp] +ldxp x17, x0, [x18] +ldxp x17, x0, [x18] +stlxrb w12, w22, [x0] +stlxrh w10, w1, [x1] +stlxr w9, w2, [x2] +stlxr w9, x3, [sp] +ldaxrb w8, [x4] +ldaxrh w7, [x5] +ldaxr w6, [sp] +ldaxr x5, [x6] +ldaxr x5, [x6] +ldaxr x5, [x6] +stlxp w4, w5, w6, [sp] +stlxp wzr, x6, x7, [x1] +ldaxp w5, w18, [sp] +ldaxp x6, x19, [x22] +ldaxp x6, x19, [x22] +stlrb w24, [sp] +stlrh w25, [x30] +stlr w26, [x29] +stlr x27, [x28] +stlr x27, [x28] +stlr x27, [x28] +ldarb w23, [sp] +ldarh w22, [x30] +ldar wzr, [x29] +ldar x21, [x28] +ldar x21, [x28] +ldar x21, [x28] + +#------------------------------------------------------------------------------ +# Load/store (unscaled immediate) +#------------------------------------------------------------------------------ + +sturb w9, [sp] +sturh wzr, [x12, #255] +stur w16, [x0, #-256] +stur x28, [x14, #1] +ldurb w1, [x20, #255] +ldurh w20, [x1, #255] +ldur w12, [sp, #255] +ldur xzr, [x12, #255] +ldursb x9, [x7, #-256] +ldursh x17, [x19, #-256] +ldursw x20, [x15, #-256] +prfum pldl2keep, [sp, #-256] +ldursb w19, [x1, #-256] +ldursh w15, [x21, #-256] +stur b0, [sp, #1] +stur h12, [x12, #-1] +stur s15, [x0, #255] +stur d31, [x5, #25] +stur q9, [x5] +ldur b3, [sp] +ldur h5, [x4, #-256] +ldur s7, [x12, #-1] +ldur d11, [x19, #4] +ldur q13, [x1, #2] + +#------------------------------------------------------------------------------ +# Load/store (immediate post-indexed) +#------------------------------------------------------------------------------ + +strb w9, [x2], #255 +strb w10, [x3], #1 +strb w10, [x3], #-256 +strh w9, [x2], #255 +strh w9, [x2], #1 +strh w10, [x3], #-256 +str w19, [sp], #255 +str w20, [x30], #1 +str w21, [x12], #-256 +str xzr, [x9], #255 +str x2, [x3], #1 +str x19, [x12], #-256 +ldrb w9, [x2], #255 +ldrb w10, [x3], #1 +ldrb w10, [x3], #-256 +ldrh w9, [x2], #255 +ldrh w9, [x2], #1 +ldrh w10, [x3], #-256 +ldr w19, [sp], #255 +ldr w20, [x30], #1 +ldr w21, [x12], #-256 +ldr xzr, [x9], #255 +ldr x2, [x3], #1 +ldr x19, [x12], #-256 +ldrsb xzr, [x9], #255 +ldrsb x2, [x3], #1 +ldrsb x19, [x12], #-256 +ldrsh xzr, [x9], #255 +ldrsh x2, [x3], #1 +ldrsh x19, [x12], #-256 +ldrsw xzr, [x9], #255 +ldrsw x2, [x3], #1 +ldrsw x19, [x12], #-256 +ldrsb wzr, [x9], #255 +ldrsb w2, [x3], #1 +ldrsb w19, [x12], #-256 +ldrsh wzr, [x9], #255 +ldrsh w2, [x3], #1 +ldrsh w19, [x12], #-256 +str b0, [x0], #255 +str b3, [x3], #1 +str b5, [sp], #-256 +str h10, [x10], #255 +str h13, [x23], #1 +str h15, [sp], #-256 +str s20, [x20], #255 +str s23, [x23], #1 +str s25, [x0], #-256 +str d20, [x20], #255 +str d23, [x23], #1 +str d25, [x0], #-256 +ldr b0, [x0], #255 +ldr b3, [x3], #1 +ldr b5, [sp], #-256 +ldr h10, [x10], #255 +ldr h13, [x23], #1 +ldr h15, [sp], #-256 +ldr s20, [x20], #255 +ldr s23, [x23], #1 +ldr s25, [x0], #-256 +ldr d20, [x20], #255 +ldr d23, [x23], #1 +ldr d25, [x0], #-256 +ldr q20, [x1], #255 +ldr q23, [x9], #1 +ldr q25, [x20], #-256 +str q10, [x1], #255 +str q22, [sp], #1 +str q21, [x20], #-256 + +#------------------------------------------------------------------------------- +# Load-store register (immediate pre-indexed) +#------------------------------------------------------------------------------- + +ldr x3, [x4, #0]! +strb w9, [x2, #255]! +strb w10, [x3, #1]! +strb w10, [x3, #-256]! +strh w9, [x2, #255]! +strh w9, [x2, #1]! +strh w10, [x3, #-256]! +str w19, [sp, #255]! +str w20, [x30, #1]! +str w21, [x12, #-256]! +str xzr, [x9, #255]! +str x2, [x3, #1]! +str x19, [x12, #-256]! +ldrb w9, [x2, #255]! +ldrb w10, [x3, #1]! +ldrb w10, [x3, #-256]! +ldrh w9, [x2, #255]! +ldrh w9, [x2, #1]! +ldrh w10, [x3, #-256]! +ldr w19, [sp, #255]! +ldr w20, [x30, #1]! +ldr w21, [x12, #-256]! +ldr xzr, [x9, #255]! +ldr x2, [x3, #1]! +ldr x19, [x12, #-256]! +ldrsb xzr, [x9, #255]! +ldrsb x2, [x3, #1]! +ldrsb x19, [x12, #-256]! +ldrsh xzr, [x9, #255]! +ldrsh x2, [x3, #1]! +ldrsh x19, [x12, #-256]! +ldrsw xzr, [x9, #255]! +ldrsw x2, [x3, #1]! +ldrsw x19, [x12, #-256]! +ldrsb wzr, [x9, #255]! +ldrsb w2, [x3, #1]! +ldrsb w19, [x12, #-256]! +ldrsh wzr, [x9, #255]! +ldrsh w2, [x3, #1]! +ldrsh w19, [x12, #-256]! +str b0, [x0, #255]! +str b3, [x3, #1]! +str b5, [sp, #-256]! +str h10, [x10, #255]! +str h13, [x23, #1]! +str h15, [sp, #-256]! +str s20, [x20, #255]! +str s23, [x23, #1]! +str s25, [x0, #-256]! +str d20, [x20, #255]! +str d23, [x23, #1]! +str d25, [x0, #-256]! +ldr b0, [x0, #255]! +ldr b3, [x3, #1]! +ldr b5, [sp, #-256]! +ldr h10, [x10, #255]! +ldr h13, [x23, #1]! +ldr h15, [sp, #-256]! +ldr s20, [x20, #255]! +ldr s23, [x23, #1]! +ldr s25, [x0, #-256]! +ldr d20, [x20, #255]! +ldr d23, [x23, #1]! +ldr d25, [x0, #-256]! +ldr q20, [x1, #255]! +ldr q23, [x9, #1]! +ldr q25, [x20, #-256]! +str q10, [x1, #255]! +str q22, [sp, #1]! +str q21, [x20, #-256]! + +#------------------------------------------------------------------------------ +# Load/store (unprivileged) +#------------------------------------------------------------------------------ + +sttrb w9, [sp] +sttrh wzr, [x12, #255] +sttr w16, [x0, #-256] +sttr x28, [x14, #1] +ldtrb w1, [x20, #255] +ldtrh w20, [x1, #255] +ldtr w12, [sp, #255] +ldtr xzr, [x12, #255] +ldtrsb x9, [x7, #-256] +ldtrsh x17, [x19, #-256] +ldtrsw x20, [x15, #-256] +ldtrsb w19, [x1, #-256] +ldtrsh w15, [x21, #-256] + +#------------------------------------------------------------------------------ +# Load/store (unsigned immediate) +#------------------------------------------------------------------------------ + +ldr x4, [x29] +ldr x30, [x12, #32760] +ldr x20, [sp, #8] +ldr xzr, [sp] +ldr w2, [sp] +ldr w17, [sp, #16380] +ldr w13, [x2, #4] +ldrsw x2, [x5, #4] +ldrsw x23, [sp, #16380] +ldrh w2, [x4] +ldrsh w23, [x6, #8190] +ldrsh wzr, [sp, #2] +ldrsh x29, [x2, #2] +ldrb w26, [x3, #121] +ldrb w12, [x2] +ldrsb w27, [sp, #4095] +ldrsb xzr, [x15] +str x30, [sp] +str w20, [x4, #16380] +strh w17, [sp, #8190] +strb w23, [x3, #4095] +strb wzr, [x2] +ldr b31, [sp, #4095] +ldr h20, [x2, #8190] +ldr s10, [x19, #16380] +ldr d3, [x10, #32760] +str q12, [sp, #65520] + +#------------------------------------------------------------------------------ +# Load/store (register offset) +#------------------------------------------------------------------------------ + +ldrb w3, [sp, x5] +ldrb w9, [x27, x6] +ldrsb w10, [x30, x7] +ldrb w11, [x29, x3, sxtx] +strb w12, [x28, xzr, sxtx] +ldrb w14, [x26, w6, uxtw] +ldrsb w15, [x25, w7, uxtw] +ldrb w17, [x23, w9, sxtw] +ldrsb x18, [x22, w10, sxtw] +ldrsh w3, [sp, x5] +ldrsh w9, [x27, x6] +ldrh w10, [x30, x7, lsl #1] +strh w11, [x29, x3, sxtx] +ldrh w12, [x28, xzr, sxtx] +ldrsh x13, [x27, x5, sxtx #1] +ldrh w14, [x26, w6, uxtw] +ldrh w15, [x25, w7, uxtw] +ldrsh w16, [x24, w8, uxtw #1] +ldrh w17, [x23, w9, sxtw] +ldrh w18, [x22, w10, sxtw] +strh w19, [x21, wzr, sxtw #1] +ldr w3, [sp, x5] +ldr s9, [x27, x6] +ldr w10, [x30, x7, lsl #2] +ldr w11, [x29, x3, sxtx] +str s12, [x28, xzr, sxtx] +str w13, [x27, x5, sxtx #2] +str w14, [x26, w6, uxtw] +ldr w15, [x25, w7, uxtw] +ldr w16, [x24, w8, uxtw #2] +ldrsw x17, [x23, w9, sxtw] +ldr w18, [x22, w10, sxtw] +ldrsw x19, [x21, wzr, sxtw #2] +ldr x3, [sp, x5] +str x9, [x27, x6] +ldr d10, [x30, x7, lsl #3] +str x11, [x29, x3, sxtx] +ldr x12, [x28, xzr, sxtx] +ldr x13, [x27, x5, sxtx #3] +prfm pldl1keep, [x26, w6, uxtw] +ldr x15, [x25, w7, uxtw] +ldr x16, [x24, w8, uxtw #3] +ldr x17, [x23, w9, sxtw] +ldr x18, [x22, w10, sxtw] +str d19, [x21, wzr, sxtw #3] +ldr q3, [sp, x5] +ldr q9, [x27, x6] +ldr q10, [x30, x7, lsl #4] +str q11, [x29, x3, sxtx] +str q12, [x28, xzr, sxtx] +str q13, [x27, x5, sxtx #4] +ldr q14, [x26, w6, uxtw] +ldr q15, [x25, w7, uxtw] +ldr q16, [x24, w8, uxtw #4] +ldr q17, [x23, w9, sxtw] +str q18, [x22, w10, sxtw] +ldr q19, [x21, wzr, sxtw #4] + +#------------------------------------------------------------------------------ +# Load/store register pair (offset) +#------------------------------------------------------------------------------ + +ldp w3, w5, [sp] +stp wzr, w9, [sp, #252] +ldp w2, wzr, [sp, #-256] +ldp w9, w10, [sp, #4] +ldpsw x9, x10, [sp, #4] +ldpsw x9, x10, [x2, #-256] +ldpsw x20, x30, [sp, #252] +ldp x21, x29, [x2, #504] +ldp x22, x23, [x3, #-512] +ldp x24, x25, [x4, #8] +ldp s29, s28, [sp, #252] +stp s27, s26, [sp, #-256] +ldp s1, s2, [x3, #44] +stp d3, d5, [x9, #504] +stp d7, d11, [x10, #-512] +ldp d2, d3, [x30, #-8] +stp q3, q5, [sp] +stp q17, q19, [sp, #1008] +ldp q23, q29, [x1, #-1024] + +#------------------------------------------------------------------------------ +# Load/store register pair (post-indexed) +#------------------------------------------------------------------------------ + +ldp w3, w5, [sp], #0 +stp wzr, w9, [sp], #252 +ldp w2, wzr, [sp], #-256 +ldp w9, w10, [sp], #4 +ldpsw x9, x10, [sp], #4 +ldpsw x9, x10, [x2], #-256 +ldpsw x20, x30, [sp], #252 +ldp x21, x29, [x2], #504 +ldp x22, x23, [x3], #-512 +ldp x24, x25, [x4], #8 +ldp s29, s28, [sp], #252 +stp s27, s26, [sp], #-256 +ldp s1, s2, [x3], #44 +stp d3, d5, [x9], #504 +stp d7, d11, [x10], #-512 +ldp d2, d3, [x30], #-8 +stp q3, q5, [sp], #0 +stp q17, q19, [sp], #1008 +ldp q23, q29, [x1], #-1024 + +#------------------------------------------------------------------------------ +# Load/store register pair (pre-indexed) +#------------------------------------------------------------------------------ + +ldp w3, w5, [sp, #0]! +stp wzr, w9, [sp, #252]! +ldp w2, wzr, [sp, #-256]! +ldp w9, w10, [sp, #4]! +ldpsw x9, x10, [sp, #4]! +ldpsw x9, x10, [x2, #-256]! +ldpsw x20, x30, [sp, #252]! +ldp x21, x29, [x2, #504]! +ldp x22, x23, [x3, #-512]! +ldp x24, x25, [x4, #8]! +ldp s29, s28, [sp, #252]! +stp s27, s26, [sp, #-256]! +ldp s1, s2, [x3, #44]! +stp d3, d5, [x9, #504]! +stp d7, d11, [x10, #-512]! +ldp d2, d3, [x30, #-8]! +stp q3, q5, [sp, #0]! +stp q17, q19, [sp, #1008]! +ldp q23, q29, [x1, #-1024]! + +#------------------------------------------------------------------------------ +# Load/store register pair (offset) +#------------------------------------------------------------------------------ + +ldnp w3, w5, [sp] +stnp wzr, w9, [sp, #252] +ldnp w2, wzr, [sp, #-256] +ldnp w9, w10, [sp, #4] +ldnp x21, x29, [x2, #504] +ldnp x22, x23, [x3, #-512] +ldnp x24, x25, [x4, #8] +ldnp s29, s28, [sp, #252] +stnp s27, s26, [sp, #-256] +ldnp s1, s2, [x3, #44] +stnp d3, d5, [x9, #504] +stnp d7, d11, [x10, #-512] +ldnp d2, d3, [x30, #-8] +stnp q3, q5, [sp] +stnp q17, q19, [sp, #1008] +ldnp q23, q29, [x1, #-1024] + +#------------------------------------------------------------------------------ +# Logical (immediate) +#------------------------------------------------------------------------------ + +mov w3, #983055 +mov x10, #-6148914691236517206 + +#------------------------------------------------------------------------------ +# Logical (shifted register) +#------------------------------------------------------------------------------ + +and w12, w23, w21 +and w16, w15, w1, lsl #1 +and w9, w4, w10, lsl #31 +and w3, w30, w11 +and x3, x5, x7, lsl #63 +and x5, x14, x19, asr #4 +and w3, w17, w19, ror #31 +and w0, w2, wzr, lsr #17 +and w3, w30, w11, asr #2 +and xzr, x4, x26 +and w3, wzr, w20, ror #2 +and x7, x20, xzr, asr #63 +bic x13, x20, x14, lsl #47 +bic w2, w7, w9 +orr w2, w7, w0, asr #31 +orr x8, x9, x10, lsl #12 +orn x3, x5, x7, asr #2 +orn w2, w5, w29 +ands w7, wzr, w9, lsl #1 +ands x3, x5, x20, ror #63 +bics w3, w5, w7 +bics x3, xzr, x3, lsl #1 +tst w3, w7, lsl #31 +tst x2, x20, asr #2 +mov x3, x6 +mov x3, xzr +mov wzr, w2 +mov w3, w5 + +#------------------------------------------------------------------------------ +# Move wide (immediate) +#------------------------------------------------------------------------------ + +movz w2, #0, lsl #16 +mov w2, #-1235 +mov x2, #5299989643264 +mov x2, #0 +movk w3, #0 +movz x4, #0, lsl #16 +movk w5, #0, lsl #16 +movz x6, #0, lsl #32 +movk x7, #0, lsl #32 +movz x8, #0, lsl #48 +movk x9, #0, lsl #48 + +#------------------------------------------------------------------------------ +# PC-relative addressing +#------------------------------------------------------------------------------ + +adr x2, #1600 +adrp x21, #6553600 +adr x0, #262144 + +#------------------------------------------------------------------------------ +# Test and branch (immediate) +#------------------------------------------------------------------------------ + +tbz x12, #62, #0 +tbz x12, #62, #4 +tbz x12, #62, #-32768 +tbnz x12, #60, #32764 + +#------------------------------------------------------------------------------ +# Unconditional branch (immediate) +#------------------------------------------------------------------------------ + +b #4 +b #-4 +b #134217724 + +#------------------------------------------------------------------------------ +# Unconditional branch (register) +#------------------------------------------------------------------------------ + +br x20 +blr xzr +ret x10 +ret +eret +drps + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.33 add w2, w3, #4095 +# CHECK-NEXT: 1 1 0.33 add w30, w29, #1, lsl #12 +# CHECK-NEXT: 1 1 0.33 add w13, w5, #4095, lsl #12 +# CHECK-NEXT: 1 1 0.33 add x5, x7, #1638 +# CHECK-NEXT: 1 1 0.33 add w20, wsp, #801 +# CHECK-NEXT: 1 1 0.33 add wsp, wsp, #1104 +# CHECK-NEXT: 1 1 0.33 add wsp, w30, #4084 +# CHECK-NEXT: 1 1 0.33 add x0, x24, #291 +# CHECK-NEXT: 1 1 0.33 add x3, x24, #4095, lsl #12 +# CHECK-NEXT: 1 1 0.33 add x8, sp, #1074 +# CHECK-NEXT: 1 1 0.33 add sp, x29, #3816 +# CHECK-NEXT: 1 1 0.33 sub w0, wsp, #4077 +# CHECK-NEXT: 1 1 0.33 sub w4, w20, #546, lsl #12 +# CHECK-NEXT: 1 1 0.33 sub sp, sp, #288 +# CHECK-NEXT: 1 1 0.33 sub wsp, w19, #16 +# CHECK-NEXT: 1 1 0.33 adds w13, w23, #291, lsl #12 +# CHECK-NEXT: 1 1 0.33 cmn w2, #4095 +# CHECK-NEXT: 1 1 0.33 adds w20, wsp, #0 +# CHECK-NEXT: 1 1 0.33 cmn x3, #1, lsl #12 +# CHECK-NEXT: 1 1 0.33 cmp sp, #20, lsl #12 +# CHECK-NEXT: 1 1 0.33 cmp x30, #4095 +# CHECK-NEXT: 1 1 0.33 subs x4, sp, #3822 +# CHECK-NEXT: 1 1 0.33 cmn w3, #291, lsl #12 +# CHECK-NEXT: 1 1 0.33 cmn wsp, #1365 +# CHECK-NEXT: 1 1 0.33 cmn sp, #1092, lsl #12 +# CHECK-NEXT: 1 1 0.33 mov sp, x30 +# CHECK-NEXT: 1 1 0.33 mov wsp, w20 +# CHECK-NEXT: 1 1 0.33 mov x11, sp +# CHECK-NEXT: 1 1 0.33 mov w24, wsp +# CHECK-NEXT: 1 1 0.33 add w3, w5, w7 +# CHECK-NEXT: 1 1 0.33 add wzr, w3, w5 +# CHECK-NEXT: 1 1 0.33 add w20, wzr, w4 +# CHECK-NEXT: 1 1 0.33 add w4, w6, wzr +# CHECK-NEXT: 1 1 0.33 add w11, w13, w15 +# CHECK-NEXT: 1 2 1.00 add w9, w3, wzr, lsl #10 +# CHECK-NEXT: 1 2 1.00 add w17, w29, w20, lsl #31 +# CHECK-NEXT: 1 2 1.00 add w21, w22, w23, lsr #0 +# CHECK-NEXT: 1 2 1.00 add w24, w25, w26, lsr #18 +# CHECK-NEXT: 1 2 1.00 add w27, w28, w29, lsr #31 +# CHECK-NEXT: 1 2 1.00 add w2, w3, w4, asr #0 +# CHECK-NEXT: 1 2 1.00 add w5, w6, w7, asr #21 +# CHECK-NEXT: 1 2 1.00 add w8, w9, w10, asr #31 +# CHECK-NEXT: 1 1 0.33 add x3, x5, x7 +# CHECK-NEXT: 1 1 0.33 add xzr, x3, x5 +# CHECK-NEXT: 1 1 0.33 add x20, xzr, x4 +# CHECK-NEXT: 1 1 0.33 add x4, x6, xzr +# CHECK-NEXT: 1 1 0.33 add x11, x13, x15 +# CHECK-NEXT: 1 2 1.00 add x9, x3, xzr, lsl #10 +# CHECK-NEXT: 1 2 1.00 add x17, x29, x20, lsl #63 +# CHECK-NEXT: 1 2 1.00 add x21, x22, x23, lsr #0 +# CHECK-NEXT: 1 2 1.00 add x24, x25, x26, lsr #18 +# CHECK-NEXT: 1 2 1.00 add x27, x28, x29, lsr #63 +# CHECK-NEXT: 1 2 1.00 add x2, x3, x4, asr #0 +# CHECK-NEXT: 1 2 1.00 add x5, x6, x7, asr #21 +# CHECK-NEXT: 1 2 1.00 add x8, x9, x10, asr #63 +# CHECK-NEXT: 1 1 0.33 adds w3, w5, w7 +# CHECK-NEXT: 1 1 0.33 cmn w3, w5 +# CHECK-NEXT: 1 1 0.33 adds w20, wzr, w4 +# CHECK-NEXT: 1 1 0.33 adds w4, w6, wzr +# CHECK-NEXT: 1 1 0.33 adds w11, w13, w15 +# CHECK-NEXT: 1 2 1.00 adds w9, w3, wzr, lsl #10 +# CHECK-NEXT: 1 2 1.00 adds w17, w29, w20, lsl #31 +# CHECK-NEXT: 1 2 1.00 adds w21, w22, w23, lsr #0 +# CHECK-NEXT: 1 2 1.00 adds w24, w25, w26, lsr #18 +# CHECK-NEXT: 1 2 1.00 adds w27, w28, w29, lsr #31 +# CHECK-NEXT: 1 2 1.00 adds w2, w3, w4, asr #0 +# CHECK-NEXT: 1 2 1.00 adds w5, w6, w7, asr #21 +# CHECK-NEXT: 1 2 1.00 adds w8, w9, w10, asr #31 +# CHECK-NEXT: 1 1 0.33 adds x3, x5, x7 +# CHECK-NEXT: 1 1 0.33 cmn x3, x5 +# CHECK-NEXT: 1 1 0.33 adds x20, xzr, x4 +# CHECK-NEXT: 1 1 0.33 adds x4, x6, xzr +# CHECK-NEXT: 1 1 0.33 adds x11, x13, x15 +# CHECK-NEXT: 1 2 1.00 adds x9, x3, xzr, lsl #10 +# CHECK-NEXT: 1 2 1.00 adds x17, x29, x20, lsl #63 +# CHECK-NEXT: 1 2 1.00 adds x21, x22, x23, lsr #0 +# CHECK-NEXT: 1 2 1.00 adds x24, x25, x26, lsr #18 +# CHECK-NEXT: 1 2 1.00 adds x27, x28, x29, lsr #63 +# CHECK-NEXT: 1 2 1.00 adds x2, x3, x4, asr #0 +# CHECK-NEXT: 1 2 1.00 adds x5, x6, x7, asr #21 +# CHECK-NEXT: 1 2 1.00 adds x8, x9, x10, asr #63 +# CHECK-NEXT: 1 1 0.33 sub w3, w5, w7 +# CHECK-NEXT: 1 1 0.33 sub wzr, w3, w5 +# CHECK-NEXT: 1 1 0.33 sub w4, w6, wzr +# CHECK-NEXT: 1 1 0.33 sub w11, w13, w15 +# CHECK-NEXT: 1 2 1.00 sub w9, w3, wzr, lsl #10 +# CHECK-NEXT: 1 2 1.00 sub w17, w29, w20, lsl #31 +# CHECK-NEXT: 1 2 1.00 sub w21, w22, w23, lsr #0 +# CHECK-NEXT: 1 2 1.00 sub w24, w25, w26, lsr #18 +# CHECK-NEXT: 1 2 1.00 sub w27, w28, w29, lsr #31 +# CHECK-NEXT: 1 2 1.00 sub w2, w3, w4, asr #0 +# CHECK-NEXT: 1 2 1.00 sub w5, w6, w7, asr #21 +# CHECK-NEXT: 1 2 1.00 sub w8, w9, w10, asr #31 +# CHECK-NEXT: 1 1 0.33 sub x3, x5, x7 +# CHECK-NEXT: 1 1 0.33 sub xzr, x3, x5 +# CHECK-NEXT: 1 1 0.33 sub x4, x6, xzr +# CHECK-NEXT: 1 1 0.33 sub x11, x13, x15 +# CHECK-NEXT: 1 2 1.00 sub x9, x3, xzr, lsl #10 +# CHECK-NEXT: 1 2 1.00 sub x17, x29, x20, lsl #63 +# CHECK-NEXT: 1 2 1.00 sub x21, x22, x23, lsr #0 +# CHECK-NEXT: 1 2 1.00 sub x24, x25, x26, lsr #18 +# CHECK-NEXT: 1 2 1.00 sub x27, x28, x29, lsr #63 +# CHECK-NEXT: 1 2 1.00 sub x2, x3, x4, asr #0 +# CHECK-NEXT: 1 2 1.00 sub x5, x6, x7, asr #21 +# CHECK-NEXT: 1 2 1.00 sub x8, x9, x10, asr #63 +# CHECK-NEXT: 1 1 0.33 subs w3, w5, w7 +# CHECK-NEXT: 1 1 0.33 cmp w3, w5 +# CHECK-NEXT: 1 1 0.33 subs w4, w6, wzr +# CHECK-NEXT: 1 1 0.33 subs w11, w13, w15 +# CHECK-NEXT: 1 2 1.00 subs w9, w3, wzr, lsl #10 +# CHECK-NEXT: 1 2 1.00 subs w17, w29, w20, lsl #31 +# CHECK-NEXT: 1 2 1.00 subs w21, w22, w23, lsr #0 +# CHECK-NEXT: 1 2 1.00 subs w24, w25, w26, lsr #18 +# CHECK-NEXT: 1 2 1.00 subs w27, w28, w29, lsr #31 +# CHECK-NEXT: 1 2 1.00 subs w2, w3, w4, asr #0 +# CHECK-NEXT: 1 2 1.00 subs w5, w6, w7, asr #21 +# CHECK-NEXT: 1 2 1.00 subs w8, w9, w10, asr #31 +# CHECK-NEXT: 1 1 0.33 subs x3, x5, x7 +# CHECK-NEXT: 1 1 0.33 cmp x3, x5 +# CHECK-NEXT: 1 1 0.33 subs x4, x6, xzr +# CHECK-NEXT: 1 1 0.33 subs x11, x13, x15 +# CHECK-NEXT: 1 2 1.00 subs x9, x3, xzr, lsl #10 +# CHECK-NEXT: 1 2 1.00 subs x17, x29, x20, lsl #63 +# CHECK-NEXT: 1 2 1.00 subs x21, x22, x23, lsr #0 +# CHECK-NEXT: 1 2 1.00 subs x24, x25, x26, lsr #18 +# CHECK-NEXT: 1 2 1.00 subs x27, x28, x29, lsr #63 +# CHECK-NEXT: 1 2 1.00 subs x2, x3, x4, asr #0 +# CHECK-NEXT: 1 2 1.00 subs x5, x6, x7, asr #21 +# CHECK-NEXT: 1 2 1.00 subs x8, x9, x10, asr #63 +# CHECK-NEXT: 1 1 0.33 cmn wzr, w4 +# CHECK-NEXT: 1 1 0.33 cmn w5, wzr +# CHECK-NEXT: 1 1 0.33 cmn w6, w7 +# CHECK-NEXT: 1 2 1.00 cmn w8, w9, lsl #15 +# CHECK-NEXT: 1 2 1.00 cmn w10, w11, lsl #31 +# CHECK-NEXT: 1 2 1.00 cmn w12, w13, lsr #0 +# CHECK-NEXT: 1 2 1.00 cmn w14, w15, lsr #21 +# CHECK-NEXT: 1 2 1.00 cmn w16, w17, lsr #31 +# CHECK-NEXT: 1 2 1.00 cmn w18, w19, asr #0 +# CHECK-NEXT: 1 2 1.00 cmn w20, w21, asr #22 +# CHECK-NEXT: 1 2 1.00 cmn w22, w23, asr #31 +# CHECK-NEXT: 1 1 0.33 cmn x0, x3 +# CHECK-NEXT: 1 1 0.33 cmn xzr, x4 +# CHECK-NEXT: 1 1 0.33 cmn x5, xzr +# CHECK-NEXT: 1 1 0.33 cmn x6, x7 +# CHECK-NEXT: 1 2 1.00 cmn x8, x9, lsl #15 +# CHECK-NEXT: 1 2 1.00 cmn x10, x11, lsl #63 +# CHECK-NEXT: 1 2 1.00 cmn x12, x13, lsr #0 +# CHECK-NEXT: 1 2 1.00 cmn x14, x15, lsr #41 +# CHECK-NEXT: 1 2 1.00 cmn x16, x17, lsr #63 +# CHECK-NEXT: 1 2 1.00 cmn x18, x19, asr #0 +# CHECK-NEXT: 1 2 1.00 cmn x20, x21, asr #55 +# CHECK-NEXT: 1 2 1.00 cmn x22, x23, asr #63 +# CHECK-NEXT: 1 1 0.33 cmp w0, w3 +# CHECK-NEXT: 1 1 0.33 cmp wzr, w4 +# CHECK-NEXT: 1 1 0.33 cmp w5, wzr +# CHECK-NEXT: 1 1 0.33 cmp w6, w7 +# CHECK-NEXT: 1 2 1.00 cmp w8, w9, lsl #15 +# CHECK-NEXT: 1 2 1.00 cmp w10, w11, lsl #31 +# CHECK-NEXT: 1 2 1.00 cmp w12, w13, lsr #0 +# CHECK-NEXT: 1 2 1.00 cmp w14, w15, lsr #21 +# CHECK-NEXT: 1 2 1.00 cmp w18, w19, asr #0 +# CHECK-NEXT: 1 2 1.00 cmp w20, w21, asr #22 +# CHECK-NEXT: 1 2 1.00 cmp w22, w23, asr #31 +# CHECK-NEXT: 1 1 0.33 cmp x0, x3 +# CHECK-NEXT: 1 1 0.33 cmp xzr, x4 +# CHECK-NEXT: 1 1 0.33 cmp x5, xzr +# CHECK-NEXT: 1 1 0.33 cmp x6, x7 +# CHECK-NEXT: 1 2 1.00 cmp x8, x9, lsl #15 +# CHECK-NEXT: 1 2 1.00 cmp x10, x11, lsl #63 +# CHECK-NEXT: 1 2 1.00 cmp x12, x13, lsr #0 +# CHECK-NEXT: 1 2 1.00 cmp x14, x15, lsr #41 +# CHECK-NEXT: 1 2 1.00 cmp x16, x17, lsr #63 +# CHECK-NEXT: 1 2 1.00 cmp x18, x19, asr #0 +# CHECK-NEXT: 1 2 1.00 cmp x20, x21, asr #55 +# CHECK-NEXT: 1 2 1.00 cmp x22, x23, asr #63 +# CHECK-NEXT: 1 1 0.33 cmp wzr, w0 +# CHECK-NEXT: 1 1 0.33 cmp xzr, x0 +# CHECK-NEXT: 1 1 0.33 adc w29, w27, w25 +# CHECK-NEXT: 1 1 0.33 adc wzr, w3, w4 +# CHECK-NEXT: 1 1 0.33 adc w9, wzr, w10 +# CHECK-NEXT: 1 1 0.33 adc w20, w0, wzr +# CHECK-NEXT: 1 1 0.33 adc x29, x27, x25 +# CHECK-NEXT: 1 1 0.33 adc xzr, x3, x4 +# CHECK-NEXT: 1 1 0.33 adc x9, xzr, x10 +# CHECK-NEXT: 1 1 0.33 adc x20, x0, xzr +# CHECK-NEXT: 1 1 0.33 adcs w29, w27, w25 +# CHECK-NEXT: 1 1 0.33 adcs wzr, w3, w4 +# CHECK-NEXT: 1 1 0.33 adcs w9, wzr, w10 +# CHECK-NEXT: 1 1 0.33 adcs w20, w0, wzr +# CHECK-NEXT: 1 1 0.33 adcs x29, x27, x25 +# CHECK-NEXT: 1 1 0.33 adcs xzr, x3, x4 +# CHECK-NEXT: 1 1 0.33 adcs x9, xzr, x10 +# CHECK-NEXT: 1 1 0.33 adcs x20, x0, xzr +# CHECK-NEXT: 1 1 0.33 sbc w29, w27, w25 +# CHECK-NEXT: 1 1 0.33 sbc wzr, w3, w4 +# CHECK-NEXT: 1 1 0.33 ngc w9, w10 +# CHECK-NEXT: 1 1 0.33 sbc w20, w0, wzr +# CHECK-NEXT: 1 1 0.33 sbc x29, x27, x25 +# CHECK-NEXT: 1 1 0.33 sbc xzr, x3, x4 +# CHECK-NEXT: 1 1 0.33 ngc x9, x10 +# CHECK-NEXT: 1 1 0.33 sbc x20, x0, xzr +# CHECK-NEXT: 1 1 0.33 sbcs w29, w27, w25 +# CHECK-NEXT: 1 1 0.33 sbcs wzr, w3, w4 +# CHECK-NEXT: 1 1 0.33 ngcs w9, w10 +# CHECK-NEXT: 1 1 0.33 sbcs w20, w0, wzr +# CHECK-NEXT: 1 1 0.33 sbcs x29, x27, x25 +# CHECK-NEXT: 1 1 0.33 sbcs xzr, x3, x4 +# CHECK-NEXT: 1 1 0.33 ngcs x9, x10 +# CHECK-NEXT: 1 1 0.33 sbcs x20, x0, xzr +# CHECK-NEXT: 1 1 0.33 ngc w3, w12 +# CHECK-NEXT: 1 1 0.33 ngc wzr, w9 +# CHECK-NEXT: 1 1 0.33 ngc w23, wzr +# CHECK-NEXT: 1 1 0.33 ngc x29, x30 +# CHECK-NEXT: 1 1 0.33 ngc xzr, x0 +# CHECK-NEXT: 1 1 0.33 ngc x0, xzr +# CHECK-NEXT: 1 1 0.33 ngcs w3, w12 +# CHECK-NEXT: 1 1 0.33 ngcs wzr, w9 +# CHECK-NEXT: 1 1 0.33 ngcs w23, wzr +# CHECK-NEXT: 1 1 0.33 ngcs x29, x30 +# CHECK-NEXT: 1 1 0.33 ngcs xzr, x0 +# CHECK-NEXT: 1 1 0.33 ngcs x0, xzr +# CHECK-NEXT: 1 1 0.33 sbfx x1, x2, #3, #2 +# CHECK-NEXT: 1 1 0.33 asr x3, x4, #63 +# CHECK-NEXT: 1 1 0.33 asr wzr, wzr, #31 +# CHECK-NEXT: 1 1 0.33 sbfx w12, w9, #0, #1 +# CHECK-NEXT: 1 1 0.33 ubfiz x4, x5, #52, #11 +# CHECK-NEXT: 1 1 0.33 ubfx xzr, x4, #0, #1 +# CHECK-NEXT: 1 1 0.33 ubfiz x4, xzr, #1, #6 +# CHECK-NEXT: 1 1 0.33 lsr x5, x6, #12 +# CHECK-NEXT: 1 2 1.00 bfi x4, x5, #52, #11 +# CHECK-NEXT: 1 2 1.00 bfxil xzr, x4, #0, #1 +# CHECK-NEXT: 1 2 1.00 bfc x4, #1, #6 +# CHECK-NEXT: 1 2 1.00 bfxil x5, x6, #12, #52 +# CHECK-NEXT: 1 1 0.33 sxtb w1, w2 +# CHECK-NEXT: 1 1 0.33 sxtb xzr, w3 +# CHECK-NEXT: 1 1 0.33 sxth w9, w10 +# CHECK-NEXT: 1 1 0.33 sxth x0, w1 +# CHECK-NEXT: 1 1 0.33 sxtw x3, w30 +# CHECK-NEXT: 1 1 0.33 uxtb w1, w2 +# CHECK-NEXT: 1 1 0.33 uxth w9, w10 +# CHECK-NEXT: 1 1 0.33 ubfx x3, x30, #0, #32 +# CHECK-NEXT: 1 1 0.33 asr w3, w2, #0 +# CHECK-NEXT: 1 1 0.33 asr w9, w10, #31 +# CHECK-NEXT: 1 1 0.33 asr x20, x21, #63 +# CHECK-NEXT: 1 1 0.33 asr w1, wzr, #3 +# CHECK-NEXT: 1 1 0.33 lsr w3, w2, #0 +# CHECK-NEXT: 1 1 0.33 lsr w9, w10, #31 +# CHECK-NEXT: 1 1 0.33 lsr x20, x21, #63 +# CHECK-NEXT: 1 1 0.33 lsr wzr, wzr, #3 +# CHECK-NEXT: 1 1 0.33 lsr w3, w2, #0 +# CHECK-NEXT: 1 1 0.33 lsl w9, w10, #31 +# CHECK-NEXT: 1 1 0.33 lsl x20, x21, #63 +# CHECK-NEXT: 1 1 0.33 lsl w1, wzr, #3 +# CHECK-NEXT: 1 1 0.33 sbfx w9, w10, #0, #1 +# CHECK-NEXT: 1 1 0.33 sbfiz x2, x3, #63, #1 +# CHECK-NEXT: 1 1 0.33 asr x19, x20, #0 +# CHECK-NEXT: 1 1 0.33 sbfiz x9, x10, #5, #59 +# CHECK-NEXT: 1 1 0.33 asr w9, w10, #0 +# CHECK-NEXT: 1 1 0.33 sbfiz w11, w12, #31, #1 +# CHECK-NEXT: 1 1 0.33 sbfiz w13, w14, #29, #3 +# CHECK-NEXT: 1 1 0.33 sbfiz xzr, xzr, #10, #11 +# CHECK-NEXT: 1 1 0.33 sbfx w9, w10, #0, #1 +# CHECK-NEXT: 1 1 0.33 asr x2, x3, #63 +# CHECK-NEXT: 1 1 0.33 asr x19, x20, #0 +# CHECK-NEXT: 1 1 0.33 asr x9, x10, #5 +# CHECK-NEXT: 1 1 0.33 asr w9, w10, #0 +# CHECK-NEXT: 1 1 0.33 asr w11, w12, #31 +# CHECK-NEXT: 1 1 0.33 asr w13, w14, #29 +# CHECK-NEXT: 1 1 0.33 sbfx xzr, xzr, #10, #11 +# CHECK-NEXT: 1 2 1.00 bfxil w9, w10, #0, #1 +# CHECK-NEXT: 1 2 1.00 bfi x2, x3, #63, #1 +# CHECK-NEXT: 1 2 1.00 bfxil x19, x20, #0, #64 +# CHECK-NEXT: 1 2 1.00 bfi x9, x10, #5, #59 +# CHECK-NEXT: 1 2 1.00 bfxil w9, w10, #0, #32 +# CHECK-NEXT: 1 2 1.00 bfi w11, w12, #31, #1 +# CHECK-NEXT: 1 2 1.00 bfi w13, w14, #29, #3 +# CHECK-NEXT: 1 2 1.00 bfc xzr, #10, #11 +# CHECK-NEXT: 1 2 1.00 bfxil w9, w10, #0, #1 +# CHECK-NEXT: 1 2 1.00 bfxil x2, x3, #63, #1 +# CHECK-NEXT: 1 2 1.00 bfxil x19, x20, #0, #64 +# CHECK-NEXT: 1 2 1.00 bfxil x9, x10, #5, #59 +# CHECK-NEXT: 1 2 1.00 bfxil w9, w10, #0, #32 +# CHECK-NEXT: 1 2 1.00 bfxil w11, w12, #31, #1 +# CHECK-NEXT: 1 2 1.00 bfxil w13, w14, #29, #3 +# CHECK-NEXT: 1 2 1.00 bfxil xzr, xzr, #10, #11 +# CHECK-NEXT: 1 1 0.33 ubfx w9, w10, #0, #1 +# CHECK-NEXT: 1 1 0.33 lsl x2, x3, #63 +# CHECK-NEXT: 1 1 0.33 lsr x19, x20, #0 +# CHECK-NEXT: 1 1 0.33 lsl x9, x10, #5 +# CHECK-NEXT: 1 1 0.33 lsr w9, w10, #0 +# CHECK-NEXT: 1 1 0.33 lsl w11, w12, #31 +# CHECK-NEXT: 1 1 0.33 lsl w13, w14, #29 +# CHECK-NEXT: 1 1 0.33 ubfiz xzr, xzr, #10, #11 +# CHECK-NEXT: 1 1 0.33 ubfx w9, w10, #0, #1 +# CHECK-NEXT: 1 1 0.33 lsr x2, x3, #63 +# CHECK-NEXT: 1 1 0.33 lsr x19, x20, #0 +# CHECK-NEXT: 1 1 0.33 lsr x9, x10, #5 +# CHECK-NEXT: 1 1 0.33 lsr w9, w10, #0 +# CHECK-NEXT: 1 1 0.33 lsr w11, w12, #31 +# CHECK-NEXT: 1 1 0.33 lsr w13, w14, #29 +# CHECK-NEXT: 1 1 0.33 ubfx xzr, xzr, #10, #11 +# CHECK-NEXT: 1 1 1.00 cbz w5, #4 +# CHECK-NEXT: 1 1 1.00 cbz x5, #0 +# CHECK-NEXT: 1 1 1.00 cbnz x2, #-4 +# CHECK-NEXT: 1 1 1.00 cbnz x26, #1048572 +# CHECK-NEXT: 1 1 1.00 cbz wzr, #0 +# CHECK-NEXT: 1 1 1.00 cbnz xzr, #0 +# CHECK-NEXT: 1 1 1.00 b.ne #4 +# CHECK-NEXT: 1 1 1.00 b.ge #1048572 +# CHECK-NEXT: 1 1 1.00 b.ge #-4 +# CHECK-NEXT: 1 1 0.33 ccmp w1, #31, #0, eq +# CHECK-NEXT: 1 1 0.33 ccmp w3, #0, #15, hs +# CHECK-NEXT: 1 1 0.33 ccmp wzr, #15, #13, hs +# CHECK-NEXT: 1 1 0.33 ccmp x9, #31, #0, le +# CHECK-NEXT: 1 1 0.33 ccmp x3, #0, #15, gt +# CHECK-NEXT: 1 1 0.33 ccmp xzr, #5, #7, ne +# CHECK-NEXT: 1 1 0.33 ccmn w1, #31, #0, eq +# CHECK-NEXT: 1 1 0.33 ccmn w3, #0, #15, hs +# CHECK-NEXT: 1 1 0.33 ccmn wzr, #15, #13, hs +# CHECK-NEXT: 1 1 0.33 ccmn x9, #31, #0, le +# CHECK-NEXT: 1 1 0.33 ccmn x3, #0, #15, gt +# CHECK-NEXT: 1 1 0.33 ccmn xzr, #5, #7, ne +# CHECK-NEXT: 1 1 0.33 ccmp w1, wzr, #0, eq +# CHECK-NEXT: 1 1 0.33 ccmp w3, w0, #15, hs +# CHECK-NEXT: 1 1 0.33 ccmp wzr, w15, #13, hs +# CHECK-NEXT: 1 1 0.33 ccmp x9, xzr, #0, le +# CHECK-NEXT: 1 1 0.33 ccmp x3, x0, #15, gt +# CHECK-NEXT: 1 1 0.33 ccmp xzr, x5, #7, ne +# CHECK-NEXT: 1 1 0.33 ccmn w1, wzr, #0, eq +# CHECK-NEXT: 1 1 0.33 ccmn w3, w0, #15, hs +# CHECK-NEXT: 1 1 0.33 ccmn wzr, w15, #13, hs +# CHECK-NEXT: 1 1 0.33 ccmn x9, xzr, #0, le +# CHECK-NEXT: 1 1 0.33 ccmn x3, x0, #15, gt +# CHECK-NEXT: 1 1 0.33 ccmn xzr, x5, #7, ne +# CHECK-NEXT: 1 1 0.33 csel w1, w0, w19, ne +# CHECK-NEXT: 1 1 0.33 csel wzr, w5, w9, eq +# CHECK-NEXT: 1 1 0.33 csel w9, wzr, w30, gt +# CHECK-NEXT: 1 1 0.33 csel w1, w28, wzr, mi +# CHECK-NEXT: 1 1 0.33 csel x19, x23, x29, lt +# CHECK-NEXT: 1 1 0.33 csel xzr, x3, x4, ge +# CHECK-NEXT: 1 1 0.33 csel x5, xzr, x6, hs +# CHECK-NEXT: 1 1 0.33 csel x7, x8, xzr, lo +# CHECK-NEXT: 1 1 0.33 csinc w1, w0, w19, ne +# CHECK-NEXT: 1 1 0.33 csinc wzr, w5, w9, eq +# CHECK-NEXT: 1 1 0.33 csinc w9, wzr, w30, gt +# CHECK-NEXT: 1 1 0.33 csinc w1, w28, wzr, mi +# CHECK-NEXT: 1 1 0.33 csinc x19, x23, x29, lt +# CHECK-NEXT: 1 1 0.33 csinc xzr, x3, x4, ge +# CHECK-NEXT: 1 1 0.33 csinc x5, xzr, x6, hs +# CHECK-NEXT: 1 1 0.33 csinc x7, x8, xzr, lo +# CHECK-NEXT: 1 1 0.33 csinv w1, w0, w19, ne +# CHECK-NEXT: 1 1 0.33 csinv wzr, w5, w9, eq +# CHECK-NEXT: 1 1 0.33 csinv w9, wzr, w30, gt +# CHECK-NEXT: 1 1 0.33 csinv w1, w28, wzr, mi +# CHECK-NEXT: 1 1 0.33 csinv x19, x23, x29, lt +# CHECK-NEXT: 1 1 0.33 csinv xzr, x3, x4, ge +# CHECK-NEXT: 1 1 0.33 csinv x5, xzr, x6, hs +# CHECK-NEXT: 1 1 0.33 csinv x7, x8, xzr, lo +# CHECK-NEXT: 1 1 0.33 csneg w1, w0, w19, ne +# CHECK-NEXT: 1 1 0.33 csneg wzr, w5, w9, eq +# CHECK-NEXT: 1 1 0.33 csneg w9, wzr, w30, gt +# CHECK-NEXT: 1 1 0.33 csneg w1, w28, wzr, mi +# CHECK-NEXT: 1 1 0.33 csneg x19, x23, x29, lt +# CHECK-NEXT: 1 1 0.33 csneg xzr, x3, x4, ge +# CHECK-NEXT: 1 1 0.33 csneg x5, xzr, x6, hs +# CHECK-NEXT: 1 1 0.33 csneg x7, x8, xzr, lo +# CHECK-NEXT: 1 1 0.33 cset w3, eq +# CHECK-NEXT: 1 1 0.33 cset x9, pl +# CHECK-NEXT: 1 1 0.33 csetm w20, ne +# CHECK-NEXT: 1 1 0.33 csetm x30, ge +# CHECK-NEXT: 1 1 0.33 csinc w2, wzr, wzr, al +# CHECK-NEXT: 1 1 0.33 csinv x3, xzr, xzr, nv +# CHECK-NEXT: 1 1 0.33 cinc w3, w5, gt +# CHECK-NEXT: 1 1 0.33 cinc wzr, w4, le +# CHECK-NEXT: 1 1 0.33 cset w9, lt +# CHECK-NEXT: 1 1 0.33 cinc x3, x5, gt +# CHECK-NEXT: 1 1 0.33 cinc xzr, x4, le +# CHECK-NEXT: 1 1 0.33 cset x9, lt +# CHECK-NEXT: 1 1 0.33 csinc w5, w6, w6, nv +# CHECK-NEXT: 1 1 0.33 csinc x1, x2, x2, al +# CHECK-NEXT: 1 1 0.33 cinv w3, w5, gt +# CHECK-NEXT: 1 1 0.33 cinv wzr, w4, le +# CHECK-NEXT: 1 1 0.33 csetm w9, lt +# CHECK-NEXT: 1 1 0.33 cinv x3, x5, gt +# CHECK-NEXT: 1 1 0.33 cinv xzr, x4, le +# CHECK-NEXT: 1 1 0.33 csetm x9, lt +# CHECK-NEXT: 1 1 0.33 csinv x1, x0, x0, al +# CHECK-NEXT: 1 1 0.33 csinv w9, w8, w8, nv +# CHECK-NEXT: 1 1 0.33 cneg w3, w5, gt +# CHECK-NEXT: 1 1 0.33 cneg wzr, w4, le +# CHECK-NEXT: 1 1 0.33 cneg w9, wzr, lt +# CHECK-NEXT: 1 1 0.33 cneg x3, x5, gt +# CHECK-NEXT: 1 1 0.33 cneg xzr, x4, le +# CHECK-NEXT: 1 1 0.33 cneg x9, xzr, lt +# CHECK-NEXT: 1 1 0.33 csneg x4, x8, x8, al +# CHECK-NEXT: 1 1 0.33 csinv w9, w8, w8, nv +# CHECK-NEXT: 1 1 0.33 rbit w0, w7 +# CHECK-NEXT: 1 1 0.33 rbit x18, x3 +# CHECK-NEXT: 1 1 0.33 rev16 w17, w1 +# CHECK-NEXT: 1 1 0.33 rev16 x5, x2 +# CHECK-NEXT: 1 1 0.33 rev w18, w0 +# CHECK-NEXT: 1 1 0.33 rev32 x20, x1 +# CHECK-NEXT: 1 1 0.33 rev x22, x2 +# CHECK-NEXT: 1 1 0.33 clz w24, w3 +# CHECK-NEXT: 1 1 0.33 clz x26, x4 +# CHECK-NEXT: 1 1 0.33 cls w3, w5 +# CHECK-NEXT: 1 1 0.33 cls x20, x5 +# CHECK-NEXT: 1 12 5.00 udiv w0, w7, w10 +# CHECK-NEXT: 1 20 5.00 udiv x9, x22, x4 +# CHECK-NEXT: 1 12 5.00 sdiv w12, w21, w0 +# CHECK-NEXT: 1 20 5.00 sdiv x13, x2, x1 +# CHECK-NEXT: 1 1 0.33 lsl w11, w12, w13 +# CHECK-NEXT: 1 1 0.33 lsl x14, x15, x16 +# CHECK-NEXT: 1 1 0.33 lsr w17, w18, w19 +# CHECK-NEXT: 1 1 0.33 lsr x20, x21, x22 +# CHECK-NEXT: 1 1 0.33 asr w23, w24, w25 +# CHECK-NEXT: 1 1 0.33 asr x26, x27, x28 +# CHECK-NEXT: 1 1 0.33 ror w0, w1, w2 +# CHECK-NEXT: 1 1 0.33 ror x3, x4, x5 +# CHECK-NEXT: 1 1 0.33 lsl w6, w7, w8 +# CHECK-NEXT: 1 1 0.33 lsl x9, x10, x11 +# CHECK-NEXT: 1 1 0.33 lsr w12, w13, w14 +# CHECK-NEXT: 1 1 0.33 lsr x15, x16, x17 +# CHECK-NEXT: 1 1 0.33 asr w18, w19, w20 +# CHECK-NEXT: 1 1 0.33 asr x21, x22, x23 +# CHECK-NEXT: 1 1 0.33 ror w24, w25, w26 +# CHECK-NEXT: 1 1 0.33 ror x27, x28, x29 +# CHECK-NEXT: 1 5 3.00 smulh x30, x29, x28 +# CHECK-NEXT: 1 5 3.00 smulh xzr, x27, x26 +# CHECK-NEXT: 1 5 3.00 umulh x30, x29, x28 +# CHECK-NEXT: 1 5 3.00 umulh x23, x30, xzr +# CHECK-NEXT: 1 2 1.00 madd w1, w3, w7, w4 +# CHECK-NEXT: 1 2 1.00 madd wzr, w0, w9, w11 +# CHECK-NEXT: 1 2 1.00 madd w13, wzr, w4, w4 +# CHECK-NEXT: 1 2 1.00 madd w19, w30, wzr, w29 +# CHECK-NEXT: 1 2 1.00 mul w4, w5, w6 +# CHECK-NEXT: 1 4 3.00 madd x1, x3, x7, x4 +# CHECK-NEXT: 1 4 3.00 madd xzr, x0, x9, x11 +# CHECK-NEXT: 1 4 3.00 madd x13, xzr, x4, x4 +# CHECK-NEXT: 1 4 3.00 madd x19, x30, xzr, x29 +# CHECK-NEXT: 1 4 3.00 mul x4, x5, x6 +# CHECK-NEXT: 1 2 1.00 msub w1, w3, w7, w4 +# CHECK-NEXT: 1 2 1.00 msub wzr, w0, w9, w11 +# CHECK-NEXT: 1 2 1.00 msub w13, wzr, w4, w4 +# CHECK-NEXT: 1 2 1.00 msub w19, w30, wzr, w29 +# CHECK-NEXT: 1 2 1.00 mneg w4, w5, w6 +# CHECK-NEXT: 1 4 3.00 msub x1, x3, x7, x4 +# CHECK-NEXT: 1 4 3.00 msub xzr, x0, x9, x11 +# CHECK-NEXT: 1 4 3.00 msub x13, xzr, x4, x4 +# CHECK-NEXT: 1 4 3.00 msub x19, x30, xzr, x29 +# CHECK-NEXT: 1 4 3.00 mneg x4, x5, x6 +# CHECK-NEXT: 1 2 1.00 smaddl x3, w5, w2, x9 +# CHECK-NEXT: 1 2 1.00 smaddl xzr, w10, w11, x12 +# CHECK-NEXT: 1 2 1.00 smaddl x13, wzr, w14, x15 +# CHECK-NEXT: 1 2 1.00 smaddl x16, w17, wzr, x18 +# CHECK-NEXT: 1 2 1.00 smull x19, w20, w21 +# CHECK-NEXT: 1 2 1.00 smsubl x3, w5, w2, x9 +# CHECK-NEXT: 1 2 1.00 smsubl xzr, w10, w11, x12 +# CHECK-NEXT: 1 2 1.00 smsubl x13, wzr, w14, x15 +# CHECK-NEXT: 1 2 1.00 smsubl x16, w17, wzr, x18 +# CHECK-NEXT: 1 2 1.00 smnegl x19, w20, w21 +# CHECK-NEXT: 1 2 1.00 umaddl x3, w5, w2, x9 +# CHECK-NEXT: 1 2 1.00 umaddl xzr, w10, w11, x12 +# CHECK-NEXT: 1 2 1.00 umaddl x13, wzr, w14, x15 +# CHECK-NEXT: 1 2 1.00 umaddl x16, w17, wzr, x18 +# CHECK-NEXT: 1 2 1.00 umull x19, w20, w21 +# CHECK-NEXT: 1 2 1.00 umsubl x3, w5, w2, x9 +# CHECK-NEXT: 1 2 1.00 umsubl x16, w17, wzr, x18 +# CHECK-NEXT: 1 2 1.00 umnegl x19, w20, w21 +# CHECK-NEXT: 1 5 3.00 smulh x30, x29, x28 +# CHECK-NEXT: 1 5 3.00 smulh x23, x22, xzr +# CHECK-NEXT: 1 5 3.00 umulh x23, x22, xzr +# CHECK-NEXT: 1 4 3.00 mul x19, x20, xzr +# CHECK-NEXT: 1 2 1.00 mneg w21, w22, w23 +# CHECK-NEXT: 1 2 1.00 smull x11, w13, w17 +# CHECK-NEXT: 1 2 1.00 umull x11, w13, w17 +# CHECK-NEXT: 1 2 1.00 smnegl x11, w13, w17 +# CHECK-NEXT: 1 2 1.00 umnegl x11, w13, w17 +# CHECK-NEXT: 2 3 1.00 extr w3, w5, w7, #0 +# CHECK-NEXT: 2 3 1.00 extr w11, w13, w17, #31 +# CHECK-NEXT: 2 3 1.00 extr x3, x5, x7, #15 +# CHECK-NEXT: 2 3 1.00 extr x11, x13, x17, #63 +# CHECK-NEXT: 1 1 0.33 ror x19, x23, #24 +# CHECK-NEXT: 1 1 0.33 ror x29, xzr, #63 +# CHECK-NEXT: 1 1 0.33 ror w9, w13, #31 +# CHECK-NEXT: 1 2 1.00 fcmp s3, s5 +# CHECK-NEXT: 1 2 1.00 fcmp s31, #0.0 +# CHECK-NEXT: 1 2 1.00 fcmp s31, #0.0 +# CHECK-NEXT: 1 2 1.00 fcmpe s29, s30 +# CHECK-NEXT: 1 2 1.00 fcmpe s15, #0.0 +# CHECK-NEXT: 1 2 1.00 fcmpe s15, #0.0 +# CHECK-NEXT: 1 2 1.00 fcmp d4, d12 +# CHECK-NEXT: 1 2 1.00 fcmp d23, #0.0 +# CHECK-NEXT: 1 2 1.00 fcmp d23, #0.0 +# CHECK-NEXT: 1 2 1.00 fcmpe d26, d22 +# CHECK-NEXT: 1 2 1.00 fcmpe d29, #0.0 +# CHECK-NEXT: 1 2 1.00 fcmpe d29, #0.0 +# CHECK-NEXT: 1 2 1.00 fccmp s1, s31, #0, eq +# CHECK-NEXT: 1 2 1.00 fccmp s3, s0, #15, hs +# CHECK-NEXT: 1 2 1.00 fccmp s31, s15, #13, hs +# CHECK-NEXT: 1 2 1.00 fccmp d9, d31, #0, le +# CHECK-NEXT: 1 2 1.00 fccmp d3, d0, #15, gt +# CHECK-NEXT: 1 2 1.00 fccmp d31, d5, #7, ne +# CHECK-NEXT: 1 2 1.00 fccmpe s1, s31, #0, eq +# CHECK-NEXT: 1 2 1.00 fccmpe s3, s0, #15, hs +# CHECK-NEXT: 1 2 1.00 fccmpe s31, s15, #13, hs +# CHECK-NEXT: 1 2 1.00 fccmpe d9, d31, #0, le +# CHECK-NEXT: 1 2 1.00 fccmpe d3, d0, #15, gt +# CHECK-NEXT: 1 2 1.00 fccmpe d31, d5, #7, ne +# CHECK-NEXT: 1 2 0.50 fcsel s3, s20, s9, pl +# CHECK-NEXT: 1 2 0.50 fcsel d9, d10, d11, mi +# CHECK-NEXT: 1 2 0.50 fmov s0, s1 +# CHECK-NEXT: 1 2 0.50 fabs s2, s3 +# CHECK-NEXT: 1 2 0.50 fneg s4, s5 +# CHECK-NEXT: 1 10 7.00 fsqrt s6, s7 +# CHECK-NEXT: 1 3 0.50 fcvt d8, s9 +# CHECK-NEXT: 1 3 0.50 fcvt h10, s11 +# CHECK-NEXT: 1 3 1.00 frintn s12, s13 +# CHECK-NEXT: 1 3 1.00 frintp s14, s15 +# CHECK-NEXT: 1 3 1.00 frintm s16, s17 +# CHECK-NEXT: 1 3 1.00 frintz s18, s19 +# CHECK-NEXT: 1 3 1.00 frinta s20, s21 +# CHECK-NEXT: 1 3 1.00 frintx s22, s23 +# CHECK-NEXT: 1 3 1.00 frinti s24, s25 +# CHECK-NEXT: 1 2 0.50 fmov d0, d1 +# CHECK-NEXT: 1 2 0.50 fabs d2, d3 +# CHECK-NEXT: 1 2 0.50 fneg d4, d5 +# CHECK-NEXT: 1 17 7.00 fsqrt d6, d7 +# CHECK-NEXT: 1 3 0.50 fcvt s8, d9 +# CHECK-NEXT: 1 3 0.50 fcvt h10, d11 +# CHECK-NEXT: 1 3 1.00 frintn d12, d13 +# CHECK-NEXT: 1 3 1.00 frintp d14, d15 +# CHECK-NEXT: 1 3 1.00 frintm d16, d17 +# CHECK-NEXT: 1 3 1.00 frintz d18, d19 +# CHECK-NEXT: 1 3 1.00 frinta d20, d21 +# CHECK-NEXT: 1 3 1.00 frintx d22, d23 +# CHECK-NEXT: 1 3 1.00 frinti d24, d25 +# CHECK-NEXT: 1 3 0.50 fcvt s26, h27 +# CHECK-NEXT: 1 3 0.50 fcvt d28, h29 +# CHECK-NEXT: 1 3 0.50 fmul s20, s19, s17 +# CHECK-NEXT: 1 10 7.00 fdiv s1, s2, s3 +# CHECK-NEXT: 1 2 0.50 fadd s4, s5, s6 +# CHECK-NEXT: 1 2 0.50 fsub s7, s8, s9 +# CHECK-NEXT: 1 2 0.50 fmax s10, s11, s12 +# CHECK-NEXT: 1 2 0.50 fmin s13, s14, s15 +# CHECK-NEXT: 1 2 0.50 fmaxnm s16, s17, s18 +# CHECK-NEXT: 1 2 0.50 fminnm s19, s20, s21 +# CHECK-NEXT: 1 3 0.50 fnmul s22, s23, s2 +# CHECK-NEXT: 1 3 0.50 fmul d20, d19, d17 +# CHECK-NEXT: 1 15 7.00 fdiv d1, d2, d3 +# CHECK-NEXT: 1 2 0.50 fadd d4, d5, d6 +# CHECK-NEXT: 1 2 0.50 fsub d7, d8, d9 +# CHECK-NEXT: 1 2 0.50 fmax d10, d11, d12 +# CHECK-NEXT: 1 2 0.50 fmin d13, d14, d15 +# CHECK-NEXT: 1 2 0.50 fmaxnm d16, d17, d18 +# CHECK-NEXT: 1 2 0.50 fminnm d19, d20, d21 +# CHECK-NEXT: 1 3 0.50 fnmul d22, d23, d24 +# CHECK-NEXT: 1 4 0.50 fmadd s3, s5, s6, s31 +# CHECK-NEXT: 1 4 0.50 fmadd d3, d13, d0, d23 +# CHECK-NEXT: 1 4 0.50 fmsub s3, s5, s6, s31 +# CHECK-NEXT: 1 4 0.50 fmsub d3, d13, d0, d23 +# CHECK-NEXT: 1 4 0.50 fnmadd s3, s5, s6, s31 +# CHECK-NEXT: 1 4 0.50 fnmadd d3, d13, d0, d23 +# CHECK-NEXT: 1 4 0.50 fnmsub s3, s5, s6, s31 +# CHECK-NEXT: 1 4 0.50 fnmsub d3, d13, d0, d23 +# CHECK-NEXT: 1 3 0.50 fcvtzs w3, h5, #1 +# CHECK-NEXT: 1 3 0.50 fcvtzs wzr, h20, #13 +# CHECK-NEXT: 1 3 0.50 fcvtzs w19, h0, #32 +# CHECK-NEXT: 1 3 0.50 fcvtzs x3, h5, #1 +# CHECK-NEXT: 1 3 0.50 fcvtzs x12, h30, #45 +# CHECK-NEXT: 1 3 0.50 fcvtzs x19, h0, #64 +# CHECK-NEXT: 1 3 0.50 fcvtzs w3, s5, #1 +# CHECK-NEXT: 1 3 0.50 fcvtzs wzr, s20, #13 +# CHECK-NEXT: 1 3 0.50 fcvtzs w19, s0, #32 +# CHECK-NEXT: 1 3 0.50 fcvtzs x3, s5, #1 +# CHECK-NEXT: 1 3 0.50 fcvtzs x12, s30, #45 +# CHECK-NEXT: 1 3 0.50 fcvtzs x19, s0, #64 +# CHECK-NEXT: 1 3 0.50 fcvtzs w3, d5, #1 +# CHECK-NEXT: 1 3 0.50 fcvtzs wzr, d20, #13 +# CHECK-NEXT: 1 3 0.50 fcvtzs w19, d0, #32 +# CHECK-NEXT: 1 3 0.50 fcvtzs x3, d5, #1 +# CHECK-NEXT: 1 3 0.50 fcvtzs x12, d30, #45 +# CHECK-NEXT: 1 3 0.50 fcvtzs x19, d0, #64 +# CHECK-NEXT: 1 3 0.50 fcvtzu w3, h5, #1 +# CHECK-NEXT: 1 3 0.50 fcvtzu wzr, h20, #13 +# CHECK-NEXT: 1 3 0.50 fcvtzu w19, h0, #32 +# CHECK-NEXT: 1 3 0.50 fcvtzu x3, h5, #1 +# CHECK-NEXT: 1 3 0.50 fcvtzu x12, h30, #45 +# CHECK-NEXT: 1 3 0.50 fcvtzu x19, h0, #64 +# CHECK-NEXT: 1 3 0.50 fcvtzu w3, s5, #1 +# CHECK-NEXT: 1 3 0.50 fcvtzu wzr, s20, #13 +# CHECK-NEXT: 1 3 0.50 fcvtzu w19, s0, #32 +# CHECK-NEXT: 1 3 0.50 fcvtzu x3, s5, #1 +# CHECK-NEXT: 1 3 0.50 fcvtzu x12, s30, #45 +# CHECK-NEXT: 1 3 0.50 fcvtzu x19, s0, #64 +# CHECK-NEXT: 1 3 0.50 fcvtzu w3, d5, #1 +# CHECK-NEXT: 1 3 0.50 fcvtzu wzr, d20, #13 +# CHECK-NEXT: 1 3 0.50 fcvtzu w19, d0, #32 +# CHECK-NEXT: 1 3 0.50 fcvtzu x3, d5, #1 +# CHECK-NEXT: 1 3 0.50 fcvtzu x12, d30, #45 +# CHECK-NEXT: 1 3 0.50 fcvtzu x19, d0, #64 +# CHECK-NEXT: 2 6 1.00 scvtf h23, w19, #1 +# CHECK-NEXT: 2 6 1.00 scvtf h31, wzr, #20 +# CHECK-NEXT: 2 6 1.00 scvtf h14, w0, #32 +# CHECK-NEXT: 2 6 1.00 scvtf h23, x19, #1 +# CHECK-NEXT: 2 6 1.00 scvtf h31, xzr, #20 +# CHECK-NEXT: 2 6 1.00 scvtf h14, x0, #64 +# CHECK-NEXT: 2 6 1.00 scvtf s23, w19, #1 +# CHECK-NEXT: 2 6 1.00 scvtf s31, wzr, #20 +# CHECK-NEXT: 2 6 1.00 scvtf s14, w0, #32 +# CHECK-NEXT: 2 6 1.00 scvtf s23, x19, #1 +# CHECK-NEXT: 2 6 1.00 scvtf s31, xzr, #20 +# CHECK-NEXT: 2 6 1.00 scvtf s14, x0, #64 +# CHECK-NEXT: 2 6 1.00 scvtf d23, w19, #1 +# CHECK-NEXT: 2 6 1.00 scvtf d31, wzr, #20 +# CHECK-NEXT: 2 6 1.00 scvtf d14, w0, #32 +# CHECK-NEXT: 2 6 1.00 scvtf d23, x19, #1 +# CHECK-NEXT: 2 6 1.00 scvtf d31, xzr, #20 +# CHECK-NEXT: 2 6 1.00 scvtf d14, x0, #64 +# CHECK-NEXT: 2 6 1.00 ucvtf h23, w19, #1 +# CHECK-NEXT: 2 6 1.00 ucvtf h31, wzr, #20 +# CHECK-NEXT: 2 6 1.00 ucvtf h14, w0, #32 +# CHECK-NEXT: 2 6 1.00 ucvtf h23, x19, #1 +# CHECK-NEXT: 2 6 1.00 ucvtf h31, xzr, #20 +# CHECK-NEXT: 2 6 1.00 ucvtf h14, x0, #64 +# CHECK-NEXT: 2 6 1.00 ucvtf s23, w19, #1 +# CHECK-NEXT: 2 6 1.00 ucvtf s31, wzr, #20 +# CHECK-NEXT: 2 6 1.00 ucvtf s14, w0, #32 +# CHECK-NEXT: 2 6 1.00 ucvtf s23, x19, #1 +# CHECK-NEXT: 2 6 1.00 ucvtf s31, xzr, #20 +# CHECK-NEXT: 2 6 1.00 ucvtf s14, x0, #64 +# CHECK-NEXT: 2 6 1.00 ucvtf d23, w19, #1 +# CHECK-NEXT: 2 6 1.00 ucvtf d31, wzr, #20 +# CHECK-NEXT: 2 6 1.00 ucvtf d14, w0, #32 +# CHECK-NEXT: 2 6 1.00 ucvtf d23, x19, #1 +# CHECK-NEXT: 2 6 1.00 ucvtf d31, xzr, #20 +# CHECK-NEXT: 2 6 1.00 ucvtf d14, x0, #64 +# CHECK-NEXT: 2 4 1.00 fcvtns w3, h31 +# CHECK-NEXT: 2 4 1.00 fcvtns xzr, h12 +# CHECK-NEXT: 2 4 1.00 fcvtnu wzr, h12 +# CHECK-NEXT: 2 4 1.00 fcvtnu x0, h0 +# CHECK-NEXT: 2 4 1.00 fcvtps wzr, h9 +# CHECK-NEXT: 2 4 1.00 fcvtps x12, h20 +# CHECK-NEXT: 2 4 1.00 fcvtpu w30, h23 +# CHECK-NEXT: 2 4 1.00 fcvtpu x29, h3 +# CHECK-NEXT: 2 4 1.00 fcvtms w2, h3 +# CHECK-NEXT: 2 4 1.00 fcvtms x4, h5 +# CHECK-NEXT: 2 4 1.00 fcvtmu w6, h7 +# CHECK-NEXT: 2 4 1.00 fcvtmu x8, h9 +# CHECK-NEXT: 2 4 1.00 fcvtzs w10, h11 +# CHECK-NEXT: 2 4 1.00 fcvtzs x12, h13 +# CHECK-NEXT: 2 4 1.00 fcvtzu w14, h15 +# CHECK-NEXT: 2 4 1.00 fcvtzu x15, h16 +# CHECK-NEXT: 2 6 1.00 scvtf h17, w18 +# CHECK-NEXT: 2 6 1.00 scvtf h19, x20 +# CHECK-NEXT: 2 6 1.00 ucvtf h21, w22 +# CHECK-NEXT: 2 6 1.00 scvtf h23, x24 +# CHECK-NEXT: 2 4 1.00 fcvtas w25, h26 +# CHECK-NEXT: 2 4 1.00 fcvtas x27, h28 +# CHECK-NEXT: 2 4 1.00 fcvtau w29, h30 +# CHECK-NEXT: 2 4 1.00 fcvtau xzr, h0 +# CHECK-NEXT: 2 4 1.00 fcvtns w3, s31 +# CHECK-NEXT: 2 4 1.00 fcvtns xzr, s12 +# CHECK-NEXT: 2 4 1.00 fcvtnu wzr, s12 +# CHECK-NEXT: 2 4 1.00 fcvtnu x0, s0 +# CHECK-NEXT: 2 4 1.00 fcvtps wzr, s9 +# CHECK-NEXT: 2 4 1.00 fcvtps x12, s20 +# CHECK-NEXT: 2 4 1.00 fcvtpu w30, s23 +# CHECK-NEXT: 2 4 1.00 fcvtpu x29, s3 +# CHECK-NEXT: 2 4 1.00 fcvtms w2, s3 +# CHECK-NEXT: 2 4 1.00 fcvtms x4, s5 +# CHECK-NEXT: 2 4 1.00 fcvtmu w6, s7 +# CHECK-NEXT: 2 4 1.00 fcvtmu x8, s9 +# CHECK-NEXT: 2 4 1.00 fcvtzs w10, s11 +# CHECK-NEXT: 2 4 1.00 fcvtzs x12, s13 +# CHECK-NEXT: 2 4 1.00 fcvtzu w14, s15 +# CHECK-NEXT: 2 4 1.00 fcvtzu x15, s16 +# CHECK-NEXT: 2 6 1.00 scvtf s17, w18 +# CHECK-NEXT: 2 6 1.00 scvtf s19, x20 +# CHECK-NEXT: 2 6 1.00 ucvtf s21, w22 +# CHECK-NEXT: 2 6 1.00 scvtf s23, x24 +# CHECK-NEXT: 2 4 1.00 fcvtas w25, s26 +# CHECK-NEXT: 2 4 1.00 fcvtas x27, s28 +# CHECK-NEXT: 2 4 1.00 fcvtau w29, s30 +# CHECK-NEXT: 2 4 1.00 fcvtau xzr, s0 +# CHECK-NEXT: 2 4 1.00 fcvtns w3, d31 +# CHECK-NEXT: 2 4 1.00 fcvtns xzr, d12 +# CHECK-NEXT: 2 4 1.00 fcvtnu wzr, d12 +# CHECK-NEXT: 2 4 1.00 fcvtnu x0, d0 +# CHECK-NEXT: 2 4 1.00 fcvtps wzr, d9 +# CHECK-NEXT: 2 4 1.00 fcvtps x12, d20 +# CHECK-NEXT: 2 4 1.00 fcvtpu w30, d23 +# CHECK-NEXT: 2 4 1.00 fcvtpu x29, d3 +# CHECK-NEXT: 2 4 1.00 fcvtms w2, d3 +# CHECK-NEXT: 2 4 1.00 fcvtms x4, d5 +# CHECK-NEXT: 2 4 1.00 fcvtmu w6, d7 +# CHECK-NEXT: 2 4 1.00 fcvtmu x8, d9 +# CHECK-NEXT: 2 4 1.00 fcvtzs w10, d11 +# CHECK-NEXT: 2 4 1.00 fcvtzs x12, d13 +# CHECK-NEXT: 2 4 1.00 fcvtzu w14, d15 +# CHECK-NEXT: 2 4 1.00 fcvtzu x15, d16 +# CHECK-NEXT: 2 6 1.00 scvtf d17, w18 +# CHECK-NEXT: 2 6 1.00 scvtf d19, x20 +# CHECK-NEXT: 2 6 1.00 ucvtf d21, w22 +# CHECK-NEXT: 2 6 1.00 ucvtf d23, x24 +# CHECK-NEXT: 2 4 1.00 fcvtas w25, d26 +# CHECK-NEXT: 2 4 1.00 fcvtas x27, d28 +# CHECK-NEXT: 2 4 1.00 fcvtau w29, d30 +# CHECK-NEXT: 2 4 1.00 fcvtau xzr, d0 +# CHECK-NEXT: 1 2 1.00 fmov w3, s9 +# CHECK-NEXT: 1 3 1.00 fmov s9, w3 +# CHECK-NEXT: 1 2 1.00 fmov x20, d31 +# CHECK-NEXT: 1 3 1.00 fmov d1, x15 +# CHECK-NEXT: 1 2 1.00 fmov x3, v12.d[1] +# CHECK-NEXT: 1 3 1.00 fmov v1.d[1], x19 +# CHECK-NEXT: 1 2 0.50 fmov s2, #0.12500000 +# CHECK-NEXT: 1 2 0.50 fmov s3, #1.00000000 +# CHECK-NEXT: 1 2 0.50 fmov d30, #16.00000000 +# CHECK-NEXT: 1 2 0.50 fmov s4, #1.06250000 +# CHECK-NEXT: 1 2 0.50 fmov d10, #1.93750000 +# CHECK-NEXT: 1 2 0.50 fmov s12, #-1.00000000 +# CHECK-NEXT: 1 2 0.50 fmov d16, #8.50000000 +# CHECK-NEXT: 1 4 0.50 * ldr w3, #0 +# CHECK-NEXT: 1 4 0.50 * ldr x29, #4 +# CHECK-NEXT: 1 4 0.50 * ldrsw xzr, #-4 +# CHECK-NEXT: 1 5 0.50 * ldr s0, #8 +# CHECK-NEXT: 1 5 0.50 * ldr d0, #1048572 +# CHECK-NEXT: 1 5 0.50 * ldr q0, #-1048576 +# CHECK-NEXT: 1 4 0.50 U prfm pldl1strm, #0 +# CHECK-NEXT: 1 4 0.50 U prfm #22, #0 +# CHECK-NEXT: 3 5 1.00 * * U stxrb w18, w8, [sp] +# CHECK-NEXT: 3 5 1.00 * * U stxrh w24, w15, [x16] +# CHECK-NEXT: 3 5 1.00 * * U stxr w5, w6, [x17] +# CHECK-NEXT: 3 5 1.00 * * U stxr w1, x10, [x21] +# CHECK-NEXT: 1 4 0.50 * * U ldxrb w30, [x0] +# CHECK-NEXT: 1 4 0.50 * * U ldxrh w17, [x4] +# CHECK-NEXT: 1 4 0.50 * * U ldxr w22, [sp] +# CHECK-NEXT: 1 4 0.50 * * U ldxr x11, [x29] +# CHECK-NEXT: 1 4 0.50 * * U ldxr x11, [x29] +# CHECK-NEXT: 1 4 0.50 * * U ldxr x11, [x29] +# CHECK-NEXT: 3 5 1.00 * * U stxp w12, w11, w10, [sp] +# CHECK-NEXT: 3 5 1.00 * * U stxp wzr, x27, x9, [x12] +# CHECK-NEXT: 2 4 1.00 * * U ldxp w0, wzr, [sp] +# CHECK-NEXT: 2 4 1.00 * * U ldxp x17, x0, [x18] +# CHECK-NEXT: 2 4 1.00 * * U ldxp x17, x0, [x18] +# CHECK-NEXT: 3 5 1.00 * * U stlxrb w12, w22, [x0] +# CHECK-NEXT: 3 5 1.00 * * U stlxrh w10, w1, [x1] +# CHECK-NEXT: 3 5 1.00 * * U stlxr w9, w2, [x2] +# CHECK-NEXT: 3 5 1.00 * * U stlxr w9, x3, [sp] +# CHECK-NEXT: 1 4 0.50 * * U ldaxrb w8, [x4] +# CHECK-NEXT: 1 4 0.50 * * U ldaxrh w7, [x5] +# CHECK-NEXT: 1 4 0.50 * * U ldaxr w6, [sp] +# CHECK-NEXT: 1 4 0.50 * * U ldaxr x5, [x6] +# CHECK-NEXT: 1 4 0.50 * * U ldaxr x5, [x6] +# CHECK-NEXT: 1 4 0.50 * * U ldaxr x5, [x6] +# CHECK-NEXT: 3 5 1.00 * * U stlxp w4, w5, w6, [sp] +# CHECK-NEXT: 3 5 1.00 * * U stlxp wzr, x6, x7, [x1] +# CHECK-NEXT: 2 4 1.00 * * U ldaxp w5, w18, [sp] +# CHECK-NEXT: 2 4 1.00 * * U ldaxp x6, x19, [x22] +# CHECK-NEXT: 2 4 1.00 * * U ldaxp x6, x19, [x22] +# CHECK-NEXT: 2 1 0.50 * U stlrb w24, [sp] +# CHECK-NEXT: 2 1 0.50 * U stlrh w25, [x30] +# CHECK-NEXT: 2 1 0.50 * U stlr w26, [x29] +# CHECK-NEXT: 2 1 0.50 * U stlr x27, [x28] +# CHECK-NEXT: 2 1 0.50 * U stlr x27, [x28] +# CHECK-NEXT: 2 1 0.50 * U stlr x27, [x28] +# CHECK-NEXT: 1 4 0.50 * U ldarb w23, [sp] +# CHECK-NEXT: 1 4 0.50 * U ldarh w22, [x30] +# CHECK-NEXT: 1 4 0.50 * U ldar wzr, [x29] +# CHECK-NEXT: 1 4 0.50 * U ldar x21, [x28] +# CHECK-NEXT: 1 4 0.50 * U ldar x21, [x28] +# CHECK-NEXT: 1 4 0.50 * U ldar x21, [x28] +# CHECK-NEXT: 2 1 0.50 * sturb w9, [sp] +# CHECK-NEXT: 2 1 0.50 * sturh wzr, [x12, #255] +# CHECK-NEXT: 2 1 0.50 * stur w16, [x0, #-256] +# CHECK-NEXT: 2 1 0.50 * stur x28, [x14, #1] +# CHECK-NEXT: 1 4 0.50 * ldurb w1, [x20, #255] +# CHECK-NEXT: 1 4 0.50 * ldurh w20, [x1, #255] +# CHECK-NEXT: 1 4 0.50 * ldur w12, [sp, #255] +# CHECK-NEXT: 1 4 0.50 * ldur xzr, [x12, #255] +# CHECK-NEXT: 1 4 0.50 * ldursb x9, [x7, #-256] +# CHECK-NEXT: 1 4 0.50 * ldursh x17, [x19, #-256] +# CHECK-NEXT: 1 4 0.50 * ldursw x20, [x15, #-256] +# CHECK-NEXT: 1 4 0.50 U prfum pldl2keep, [sp, #-256] +# CHECK-NEXT: 1 4 0.50 * ldursb w19, [x1, #-256] +# CHECK-NEXT: 1 4 0.50 * ldursh w15, [x21, #-256] +# CHECK-NEXT: 2 2 0.50 * stur b0, [sp, #1] +# CHECK-NEXT: 2 2 0.50 * stur h12, [x12, #-1] +# CHECK-NEXT: 2 2 0.50 * stur s15, [x0, #255] +# CHECK-NEXT: 2 2 0.50 * stur d31, [x5, #25] +# CHECK-NEXT: 4 2 1.00 * stur q9, [x5] +# CHECK-NEXT: 1 5 0.50 * ldur b3, [sp] +# CHECK-NEXT: 1 5 0.50 * ldur h5, [x4, #-256] +# CHECK-NEXT: 1 5 0.50 * ldur s7, [x12, #-1] +# CHECK-NEXT: 1 5 0.50 * ldur d11, [x19, #4] +# CHECK-NEXT: 1 5 0.50 * ldur q13, [x1, #2] +# CHECK-NEXT: 3 1 0.50 * strb w9, [x2], #255 +# CHECK-NEXT: 3 1 0.50 * strb w10, [x3], #1 +# CHECK-NEXT: 3 1 0.50 * strb w10, [x3], #-256 +# CHECK-NEXT: 3 1 0.50 * strh w9, [x2], #255 +# CHECK-NEXT: 3 1 0.50 * strh w9, [x2], #1 +# CHECK-NEXT: 3 1 0.50 * strh w10, [x3], #-256 +# CHECK-NEXT: 3 1 0.50 * str w19, [sp], #255 +# CHECK-NEXT: 3 1 0.50 * str w20, [x30], #1 +# CHECK-NEXT: 3 1 0.50 * str w21, [x12], #-256 +# CHECK-NEXT: 3 1 0.50 * str xzr, [x9], #255 +# CHECK-NEXT: 3 1 0.50 * str x2, [x3], #1 +# CHECK-NEXT: 3 1 0.50 * str x19, [x12], #-256 +# CHECK-NEXT: 2 4 0.50 * ldrb w9, [x2], #255 +# CHECK-NEXT: 2 4 0.50 * ldrb w10, [x3], #1 +# CHECK-NEXT: 2 4 0.50 * ldrb w10, [x3], #-256 +# CHECK-NEXT: 2 4 0.50 * ldrh w9, [x2], #255 +# CHECK-NEXT: 2 4 0.50 * ldrh w9, [x2], #1 +# CHECK-NEXT: 2 4 0.50 * ldrh w10, [x3], #-256 +# CHECK-NEXT: 2 4 0.50 * ldr w19, [sp], #255 +# CHECK-NEXT: 2 4 0.50 * ldr w20, [x30], #1 +# CHECK-NEXT: 2 4 0.50 * ldr w21, [x12], #-256 +# CHECK-NEXT: 2 4 0.50 * ldr xzr, [x9], #255 +# CHECK-NEXT: 2 4 0.50 * ldr x2, [x3], #1 +# CHECK-NEXT: 2 4 0.50 * ldr x19, [x12], #-256 +# CHECK-NEXT: 2 4 0.50 * ldrsb xzr, [x9], #255 +# CHECK-NEXT: 2 4 0.50 * ldrsb x2, [x3], #1 +# CHECK-NEXT: 2 4 0.50 * ldrsb x19, [x12], #-256 +# CHECK-NEXT: 2 4 0.50 * ldrsh xzr, [x9], #255 +# CHECK-NEXT: 2 4 0.50 * ldrsh x2, [x3], #1 +# CHECK-NEXT: 2 4 0.50 * ldrsh x19, [x12], #-256 +# CHECK-NEXT: 2 4 0.50 * ldrsw xzr, [x9], #255 +# CHECK-NEXT: 2 4 0.50 * ldrsw x2, [x3], #1 +# CHECK-NEXT: 2 4 0.50 * ldrsw x19, [x12], #-256 +# CHECK-NEXT: 2 4 0.50 * ldrsb wzr, [x9], #255 +# CHECK-NEXT: 2 4 0.50 * ldrsb w2, [x3], #1 +# CHECK-NEXT: 2 4 0.50 * ldrsb w19, [x12], #-256 +# CHECK-NEXT: 2 4 0.50 * ldrsh wzr, [x9], #255 +# CHECK-NEXT: 2 4 0.50 * ldrsh w2, [x3], #1 +# CHECK-NEXT: 2 4 0.50 * ldrsh w19, [x12], #-256 +# CHECK-NEXT: 3 2 0.50 * str b0, [x0], #255 +# CHECK-NEXT: 3 2 0.50 * str b3, [x3], #1 +# CHECK-NEXT: 3 2 0.50 * str b5, [sp], #-256 +# CHECK-NEXT: 3 2 0.50 * str h10, [x10], #255 +# CHECK-NEXT: 3 2 0.50 * str h13, [x23], #1 +# CHECK-NEXT: 3 2 0.50 * str h15, [sp], #-256 +# CHECK-NEXT: 3 2 0.50 * str s20, [x20], #255 +# CHECK-NEXT: 3 2 0.50 * str s23, [x23], #1 +# CHECK-NEXT: 3 2 0.50 * str s25, [x0], #-256 +# CHECK-NEXT: 3 2 0.50 * str d20, [x20], #255 +# CHECK-NEXT: 3 2 0.50 * str d23, [x23], #1 +# CHECK-NEXT: 3 2 0.50 * str d25, [x0], #-256 +# CHECK-NEXT: 2 5 0.50 * ldr b0, [x0], #255 +# CHECK-NEXT: 2 5 0.50 * ldr b3, [x3], #1 +# CHECK-NEXT: 2 5 0.50 * ldr b5, [sp], #-256 +# CHECK-NEXT: 2 5 0.50 * ldr h10, [x10], #255 +# CHECK-NEXT: 2 5 0.50 * ldr h13, [x23], #1 +# CHECK-NEXT: 2 5 0.50 * ldr h15, [sp], #-256 +# CHECK-NEXT: 2 5 0.50 * ldr s20, [x20], #255 +# CHECK-NEXT: 2 5 0.50 * ldr s23, [x23], #1 +# CHECK-NEXT: 2 5 0.50 * ldr s25, [x0], #-256 +# CHECK-NEXT: 2 5 0.50 * ldr d20, [x20], #255 +# CHECK-NEXT: 2 5 0.50 * ldr d23, [x23], #1 +# CHECK-NEXT: 2 5 0.50 * ldr d25, [x0], #-256 +# CHECK-NEXT: 2 5 0.50 * ldr q20, [x1], #255 +# CHECK-NEXT: 2 5 0.50 * ldr q23, [x9], #1 +# CHECK-NEXT: 2 5 0.50 * ldr q25, [x20], #-256 +# CHECK-NEXT: 5 2 1.00 * str q10, [x1], #255 +# CHECK-NEXT: 5 2 1.00 * str q22, [sp], #1 +# CHECK-NEXT: 5 2 1.00 * str q21, [x20], #-256 +# CHECK-NEXT: 2 4 0.50 * ldr x3, [x4, #0]! +# CHECK-NEXT: 3 1 0.50 * strb w9, [x2, #255]! +# CHECK-NEXT: 3 1 0.50 * strb w10, [x3, #1]! +# CHECK-NEXT: 3 1 0.50 * strb w10, [x3, #-256]! +# CHECK-NEXT: 3 1 0.50 * strh w9, [x2, #255]! +# CHECK-NEXT: 3 1 0.50 * strh w9, [x2, #1]! +# CHECK-NEXT: 3 1 0.50 * strh w10, [x3, #-256]! +# CHECK-NEXT: 3 1 0.50 * str w19, [sp, #255]! +# CHECK-NEXT: 3 1 0.50 * str w20, [x30, #1]! +# CHECK-NEXT: 3 1 0.50 * str w21, [x12, #-256]! +# CHECK-NEXT: 3 1 0.50 * str xzr, [x9, #255]! +# CHECK-NEXT: 3 1 0.50 * str x2, [x3, #1]! +# CHECK-NEXT: 3 1 0.50 * str x19, [x12, #-256]! +# CHECK-NEXT: 2 4 0.50 * ldrb w9, [x2, #255]! +# CHECK-NEXT: 2 4 0.50 * ldrb w10, [x3, #1]! +# CHECK-NEXT: 2 4 0.50 * ldrb w10, [x3, #-256]! +# CHECK-NEXT: 2 4 0.50 * ldrh w9, [x2, #255]! +# CHECK-NEXT: 2 4 0.50 * ldrh w9, [x2, #1]! +# CHECK-NEXT: 2 4 0.50 * ldrh w10, [x3, #-256]! +# CHECK-NEXT: 2 4 0.50 * ldr w19, [sp, #255]! +# CHECK-NEXT: 2 4 0.50 * ldr w20, [x30, #1]! +# CHECK-NEXT: 2 4 0.50 * ldr w21, [x12, #-256]! +# CHECK-NEXT: 2 4 0.50 * ldr xzr, [x9, #255]! +# CHECK-NEXT: 2 4 0.50 * ldr x2, [x3, #1]! +# CHECK-NEXT: 2 4 0.50 * ldr x19, [x12, #-256]! +# CHECK-NEXT: 2 4 0.50 * ldrsb xzr, [x9, #255]! +# CHECK-NEXT: 2 4 0.50 * ldrsb x2, [x3, #1]! +# CHECK-NEXT: 2 4 0.50 * ldrsb x19, [x12, #-256]! +# CHECK-NEXT: 2 4 0.50 * ldrsh xzr, [x9, #255]! +# CHECK-NEXT: 2 4 0.50 * ldrsh x2, [x3, #1]! +# CHECK-NEXT: 2 4 0.50 * ldrsh x19, [x12, #-256]! +# CHECK-NEXT: 2 4 0.50 * ldrsw xzr, [x9, #255]! +# CHECK-NEXT: 2 4 0.50 * ldrsw x2, [x3, #1]! +# CHECK-NEXT: 2 4 0.50 * ldrsw x19, [x12, #-256]! +# CHECK-NEXT: 2 4 0.50 * ldrsb wzr, [x9, #255]! +# CHECK-NEXT: 2 4 0.50 * ldrsb w2, [x3, #1]! +# CHECK-NEXT: 2 4 0.50 * ldrsb w19, [x12, #-256]! +# CHECK-NEXT: 2 4 0.50 * ldrsh wzr, [x9, #255]! +# CHECK-NEXT: 2 4 0.50 * ldrsh w2, [x3, #1]! +# CHECK-NEXT: 2 4 0.50 * ldrsh w19, [x12, #-256]! +# CHECK-NEXT: 3 2 0.50 * str b0, [x0, #255]! +# CHECK-NEXT: 3 2 0.50 * str b3, [x3, #1]! +# CHECK-NEXT: 3 2 0.50 * str b5, [sp, #-256]! +# CHECK-NEXT: 3 2 0.50 * str h10, [x10, #255]! +# CHECK-NEXT: 3 2 0.50 * str h13, [x23, #1]! +# CHECK-NEXT: 3 2 0.50 * str h15, [sp, #-256]! +# CHECK-NEXT: 3 2 0.50 * str s20, [x20, #255]! +# CHECK-NEXT: 3 2 0.50 * str s23, [x23, #1]! +# CHECK-NEXT: 3 2 0.50 * str s25, [x0, #-256]! +# CHECK-NEXT: 3 2 0.50 * str d20, [x20, #255]! +# CHECK-NEXT: 3 2 0.50 * str d23, [x23, #1]! +# CHECK-NEXT: 3 2 0.50 * str d25, [x0, #-256]! +# CHECK-NEXT: 2 5 0.50 * ldr b0, [x0, #255]! +# CHECK-NEXT: 2 5 0.50 * ldr b3, [x3, #1]! +# CHECK-NEXT: 2 5 0.50 * ldr b5, [sp, #-256]! +# CHECK-NEXT: 2 5 0.50 * ldr h10, [x10, #255]! +# CHECK-NEXT: 2 5 0.50 * ldr h13, [x23, #1]! +# CHECK-NEXT: 2 5 0.50 * ldr h15, [sp, #-256]! +# CHECK-NEXT: 2 5 0.50 * ldr s20, [x20, #255]! +# CHECK-NEXT: 2 5 0.50 * ldr s23, [x23, #1]! +# CHECK-NEXT: 2 5 0.50 * ldr s25, [x0, #-256]! +# CHECK-NEXT: 2 5 0.50 * ldr d20, [x20, #255]! +# CHECK-NEXT: 2 5 0.50 * ldr d23, [x23, #1]! +# CHECK-NEXT: 2 5 0.50 * ldr d25, [x0, #-256]! +# CHECK-NEXT: 2 5 0.50 * ldr q20, [x1, #255]! +# CHECK-NEXT: 2 5 0.50 * ldr q23, [x9, #1]! +# CHECK-NEXT: 2 5 0.50 * ldr q25, [x20, #-256]! +# CHECK-NEXT: 5 2 1.00 * str q10, [x1, #255]! +# CHECK-NEXT: 5 2 1.00 * str q22, [sp, #1]! +# CHECK-NEXT: 5 2 1.00 * str q21, [x20, #-256]! +# CHECK-NEXT: 2 1 0.50 * sttrb w9, [sp] +# CHECK-NEXT: 2 1 0.50 * sttrh wzr, [x12, #255] +# CHECK-NEXT: 2 1 0.50 * sttr w16, [x0, #-256] +# CHECK-NEXT: 2 1 0.50 * sttr x28, [x14, #1] +# CHECK-NEXT: 1 4 0.50 * ldtrb w1, [x20, #255] +# CHECK-NEXT: 1 4 0.50 * ldtrh w20, [x1, #255] +# CHECK-NEXT: 1 4 0.50 * ldtr w12, [sp, #255] +# CHECK-NEXT: 1 4 0.50 * ldtr xzr, [x12, #255] +# CHECK-NEXT: 1 4 0.50 * ldtrsb x9, [x7, #-256] +# CHECK-NEXT: 1 4 0.50 * ldtrsh x17, [x19, #-256] +# CHECK-NEXT: 1 4 0.50 * ldtrsw x20, [x15, #-256] +# CHECK-NEXT: 1 4 0.50 * ldtrsb w19, [x1, #-256] +# CHECK-NEXT: 1 4 0.50 * ldtrsh w15, [x21, #-256] +# CHECK-NEXT: 1 4 0.50 * ldr x4, [x29] +# CHECK-NEXT: 1 4 0.50 * ldr x30, [x12, #32760] +# CHECK-NEXT: 1 4 0.50 * ldr x20, [sp, #8] +# CHECK-NEXT: 1 4 0.50 * ldr xzr, [sp] +# CHECK-NEXT: 1 4 0.50 * ldr w2, [sp] +# CHECK-NEXT: 1 4 0.50 * ldr w17, [sp, #16380] +# CHECK-NEXT: 1 4 0.50 * ldr w13, [x2, #4] +# CHECK-NEXT: 1 4 0.50 * ldrsw x2, [x5, #4] +# CHECK-NEXT: 1 4 0.50 * ldrsw x23, [sp, #16380] +# CHECK-NEXT: 1 4 0.50 * ldrh w2, [x4] +# CHECK-NEXT: 1 4 0.50 * ldrsh w23, [x6, #8190] +# CHECK-NEXT: 1 4 0.50 * ldrsh wzr, [sp, #2] +# CHECK-NEXT: 1 4 0.50 * ldrsh x29, [x2, #2] +# CHECK-NEXT: 1 4 0.50 * ldrb w26, [x3, #121] +# CHECK-NEXT: 1 4 0.50 * ldrb w12, [x2] +# CHECK-NEXT: 1 4 0.50 * ldrsb w27, [sp, #4095] +# CHECK-NEXT: 1 4 0.50 * ldrsb xzr, [x15] +# CHECK-NEXT: 2 1 0.50 * str x30, [sp] +# CHECK-NEXT: 2 1 0.50 * str w20, [x4, #16380] +# CHECK-NEXT: 2 1 0.50 * strh w17, [sp, #8190] +# CHECK-NEXT: 2 1 0.50 * strb w23, [x3, #4095] +# CHECK-NEXT: 2 1 0.50 * strb wzr, [x2] +# CHECK-NEXT: 2 5 0.50 * ldr b31, [sp, #4095] +# CHECK-NEXT: 2 5 0.50 * ldr h20, [x2, #8190] +# CHECK-NEXT: 2 5 0.50 * ldr s10, [x19, #16380] +# CHECK-NEXT: 2 5 0.50 * ldr d3, [x10, #32760] +# CHECK-NEXT: 4 2 1.00 * str q12, [sp, #65520] +# CHECK-NEXT: 1 4 0.50 * ldrb w3, [sp, x5] +# CHECK-NEXT: 1 4 0.50 * ldrb w9, [x27, x6] +# CHECK-NEXT: 1 4 0.50 * ldrsb w10, [x30, x7] +# CHECK-NEXT: 1 4 0.50 * ldrb w11, [x29, x3, sxtx] +# CHECK-NEXT: 2 1 0.50 * strb w12, [x28, xzr, sxtx] +# CHECK-NEXT: 1 4 0.50 * ldrb w14, [x26, w6, uxtw] +# CHECK-NEXT: 1 4 0.50 * ldrsb w15, [x25, w7, uxtw] +# CHECK-NEXT: 1 4 0.50 * ldrb w17, [x23, w9, sxtw] +# CHECK-NEXT: 1 4 0.50 * ldrsb x18, [x22, w10, sxtw] +# CHECK-NEXT: 1 4 0.50 * ldrsh w3, [sp, x5] +# CHECK-NEXT: 1 4 0.50 * ldrsh w9, [x27, x6] +# CHECK-NEXT: 1 4 0.50 * ldrh w10, [x30, x7, lsl #1] +# CHECK-NEXT: 2 1 0.50 * strh w11, [x29, x3, sxtx] +# CHECK-NEXT: 1 4 0.50 * ldrh w12, [x28, xzr, sxtx] +# CHECK-NEXT: 1 4 0.50 * ldrsh x13, [x27, x5, sxtx #1] +# CHECK-NEXT: 1 4 0.50 * ldrh w14, [x26, w6, uxtw] +# CHECK-NEXT: 1 4 0.50 * ldrh w15, [x25, w7, uxtw] +# CHECK-NEXT: 1 4 0.50 * ldrsh w16, [x24, w8, uxtw #1] +# CHECK-NEXT: 1 4 0.50 * ldrh w17, [x23, w9, sxtw] +# CHECK-NEXT: 1 4 0.50 * ldrh w18, [x22, w10, sxtw] +# CHECK-NEXT: 2 1 0.50 * strh w19, [x21, wzr, sxtw #1] +# CHECK-NEXT: 1 4 0.50 * ldr w3, [sp, x5] +# CHECK-NEXT: 2 5 0.50 * ldr s9, [x27, x6] +# CHECK-NEXT: 1 4 0.50 * ldr w10, [x30, x7, lsl #2] +# CHECK-NEXT: 1 4 0.50 * ldr w11, [x29, x3, sxtx] +# CHECK-NEXT: 2 2 0.50 * str s12, [x28, xzr, sxtx] +# CHECK-NEXT: 2 1 0.50 * str w13, [x27, x5, sxtx #2] +# CHECK-NEXT: 2 1 0.50 * str w14, [x26, w6, uxtw] +# CHECK-NEXT: 1 4 0.50 * ldr w15, [x25, w7, uxtw] +# CHECK-NEXT: 1 4 0.50 * ldr w16, [x24, w8, uxtw #2] +# CHECK-NEXT: 1 4 0.50 * ldrsw x17, [x23, w9, sxtw] +# CHECK-NEXT: 1 4 0.50 * ldr w18, [x22, w10, sxtw] +# CHECK-NEXT: 1 4 0.50 * ldrsw x19, [x21, wzr, sxtw #2] +# CHECK-NEXT: 1 4 0.50 * ldr x3, [sp, x5] +# CHECK-NEXT: 2 1 0.50 * str x9, [x27, x6] +# CHECK-NEXT: 2 5 0.50 * ldr d10, [x30, x7, lsl #3] +# CHECK-NEXT: 2 1 0.50 * str x11, [x29, x3, sxtx] +# CHECK-NEXT: 1 4 0.50 * ldr x12, [x28, xzr, sxtx] +# CHECK-NEXT: 1 4 0.50 * ldr x13, [x27, x5, sxtx #3] +# CHECK-NEXT: 1 4 0.50 U prfm pldl1keep, [x26, w6, uxtw] +# CHECK-NEXT: 1 4 0.50 * ldr x15, [x25, w7, uxtw] +# CHECK-NEXT: 1 4 0.50 * ldr x16, [x24, w8, uxtw #3] +# CHECK-NEXT: 1 4 0.50 * ldr x17, [x23, w9, sxtw] +# CHECK-NEXT: 1 4 0.50 * ldr x18, [x22, w10, sxtw] +# CHECK-NEXT: 2 2 0.50 * str d19, [x21, wzr, sxtw #3] +# CHECK-NEXT: 2 6 0.50 * ldr q3, [sp, x5] +# CHECK-NEXT: 2 6 0.50 * ldr q9, [x27, x6] +# CHECK-NEXT: 2 6 0.50 * ldr q10, [x30, x7, lsl #4] +# CHECK-NEXT: 4 2 1.00 * str q11, [x29, x3, sxtx] +# CHECK-NEXT: 4 2 1.00 * str q12, [x28, xzr, sxtx] +# CHECK-NEXT: 4 2 1.00 * str q13, [x27, x5, sxtx #4] +# CHECK-NEXT: 2 6 0.50 * ldr q14, [x26, w6, uxtw] +# CHECK-NEXT: 2 6 0.50 * ldr q15, [x25, w7, uxtw] +# CHECK-NEXT: 2 6 0.50 * ldr q16, [x24, w8, uxtw #4] +# CHECK-NEXT: 2 6 0.50 * ldr q17, [x23, w9, sxtw] +# CHECK-NEXT: 4 2 1.00 * str q18, [x22, w10, sxtw] +# CHECK-NEXT: 2 6 0.50 * ldr q19, [x21, wzr, sxtw #4] +# CHECK-NEXT: 1 4 0.50 * ldp w3, w5, [sp] +# CHECK-NEXT: 2 1 0.50 * stp wzr, w9, [sp, #252] +# CHECK-NEXT: 1 4 0.50 * ldp w2, wzr, [sp, #-256] +# CHECK-NEXT: 1 4 0.50 * ldp w9, w10, [sp, #4] +# CHECK-NEXT: 2 5 0.50 * ldpsw x9, x10, [sp, #4] +# CHECK-NEXT: 2 5 0.50 * ldpsw x9, x10, [x2, #-256] +# CHECK-NEXT: 2 5 0.50 * ldpsw x20, x30, [sp, #252] +# CHECK-NEXT: 2 4 1.00 * ldp x21, x29, [x2, #504] +# CHECK-NEXT: 2 4 1.00 * ldp x22, x23, [x3, #-512] +# CHECK-NEXT: 2 4 1.00 * ldp x24, x25, [x4, #8] +# CHECK-NEXT: 3 5 1.00 * ldp s29, s28, [sp, #252] +# CHECK-NEXT: 2 2 0.50 * stp s27, s26, [sp, #-256] +# CHECK-NEXT: 3 5 1.00 * ldp s1, s2, [x3, #44] +# CHECK-NEXT: 4 2 1.00 * stp d3, d5, [x9, #504] +# CHECK-NEXT: 4 2 1.00 * stp d7, d11, [x10, #-512] +# CHECK-NEXT: 3 5 1.00 * ldp d2, d3, [x30, #-8] +# CHECK-NEXT: 6 3 2.00 * stp q3, q5, [sp] +# CHECK-NEXT: 6 3 2.00 * stp q17, q19, [sp, #1008] +# CHECK-NEXT: 3 7 1.00 * ldp q23, q29, [x1, #-1024] +# CHECK-NEXT: 3 4 1.00 * ldp w3, w5, [sp], #0 +# CHECK-NEXT: 4 1 1.00 * stp wzr, w9, [sp], #252 +# CHECK-NEXT: 3 4 1.00 * ldp w2, wzr, [sp], #-256 +# CHECK-NEXT: 3 4 1.00 * ldp w9, w10, [sp], #4 +# CHECK-NEXT: 3 5 0.67 * ldpsw x9, x10, [sp], #4 +# CHECK-NEXT: 3 5 0.67 * ldpsw x9, x10, [x2], #-256 +# CHECK-NEXT: 3 5 0.67 * ldpsw x20, x30, [sp], #252 +# CHECK-NEXT: 3 4 1.00 * ldp x21, x29, [x2], #504 +# CHECK-NEXT: 3 4 1.00 * ldp x22, x23, [x3], #-512 +# CHECK-NEXT: 3 4 1.00 * ldp x24, x25, [x4], #8 +# CHECK-NEXT: 3 5 1.00 * ldp s29, s28, [sp], #252 +# CHECK-NEXT: 3 2 0.50 * stp s27, s26, [sp], #-256 +# CHECK-NEXT: 3 5 1.00 * ldp s1, s2, [x3], #44 +# CHECK-NEXT: 5 2 1.00 * stp d3, d5, [x9], #504 +# CHECK-NEXT: 5 2 1.00 * stp d7, d11, [x10], #-512 +# CHECK-NEXT: 3 5 1.00 * ldp d2, d3, [x30], #-8 +# CHECK-NEXT: 7 3 2.00 * stp q3, q5, [sp], #0 +# CHECK-NEXT: 7 3 2.00 * stp q17, q19, [sp], #1008 +# CHECK-NEXT: 3 7 1.00 * ldp q23, q29, [x1], #-1024 +# CHECK-NEXT: 3 4 1.00 * ldp w3, w5, [sp, #0]! +# CHECK-NEXT: 4 1 1.00 * stp wzr, w9, [sp, #252]! +# CHECK-NEXT: 3 4 1.00 * ldp w2, wzr, [sp, #-256]! +# CHECK-NEXT: 3 4 1.00 * ldp w9, w10, [sp, #4]! +# CHECK-NEXT: 3 5 0.67 * ldpsw x9, x10, [sp, #4]! +# CHECK-NEXT: 3 5 0.67 * ldpsw x9, x10, [x2, #-256]! +# CHECK-NEXT: 3 5 0.67 * ldpsw x20, x30, [sp, #252]! +# CHECK-NEXT: 3 4 1.00 * ldp x21, x29, [x2, #504]! +# CHECK-NEXT: 3 4 1.00 * ldp x22, x23, [x3, #-512]! +# CHECK-NEXT: 3 4 1.00 * ldp x24, x25, [x4, #8]! +# CHECK-NEXT: 3 5 1.00 * ldp s29, s28, [sp, #252]! +# CHECK-NEXT: 3 2 0.50 * stp s27, s26, [sp, #-256]! +# CHECK-NEXT: 3 5 1.00 * ldp s1, s2, [x3, #44]! +# CHECK-NEXT: 5 2 1.00 * stp d3, d5, [x9, #504]! +# CHECK-NEXT: 5 2 1.00 * stp d7, d11, [x10, #-512]! +# CHECK-NEXT: 3 5 1.00 * ldp d2, d3, [x30, #-8]! +# CHECK-NEXT: 7 3 2.00 * stp q3, q5, [sp, #0]! +# CHECK-NEXT: 7 3 2.00 * stp q17, q19, [sp, #1008]! +# CHECK-NEXT: 3 7 1.00 * ldp q23, q29, [x1, #-1024]! +# CHECK-NEXT: 1 4 0.50 * ldnp w3, w5, [sp] +# CHECK-NEXT: 3 1 1.00 * stnp wzr, w9, [sp, #252] +# CHECK-NEXT: 1 4 0.50 * ldnp w2, wzr, [sp, #-256] +# CHECK-NEXT: 1 4 0.50 * ldnp w9, w10, [sp, #4] +# CHECK-NEXT: 2 4 1.00 * ldnp x21, x29, [x2, #504] +# CHECK-NEXT: 2 4 1.00 * ldnp x22, x23, [x3, #-512] +# CHECK-NEXT: 2 4 1.00 * ldnp x24, x25, [x4, #8] +# CHECK-NEXT: 3 5 1.00 * ldnp s29, s28, [sp, #252] +# CHECK-NEXT: 2 2 0.50 * stnp s27, s26, [sp, #-256] +# CHECK-NEXT: 3 5 1.00 * ldnp s1, s2, [x3, #44] +# CHECK-NEXT: 4 2 1.00 * stnp d3, d5, [x9, #504] +# CHECK-NEXT: 4 2 1.00 * stnp d7, d11, [x10, #-512] +# CHECK-NEXT: 3 5 1.00 * ldnp d2, d3, [x30, #-8] +# CHECK-NEXT: 6 3 2.00 * stnp q3, q5, [sp] +# CHECK-NEXT: 6 3 2.00 * stnp q17, q19, [sp, #1008] +# CHECK-NEXT: 2 4 1.00 * ldnp q23, q29, [x1, #-1024] +# CHECK-NEXT: 1 1 0.33 mov w3, #983055 +# CHECK-NEXT: 1 1 0.33 mov x10, #-6148914691236517206 +# CHECK-NEXT: 1 1 0.33 and w12, w23, w21 +# CHECK-NEXT: 1 1 0.33 and w16, w15, w1, lsl #1 +# CHECK-NEXT: 1 1 0.33 and w9, w4, w10, lsl #31 +# CHECK-NEXT: 1 1 0.33 and w3, w30, w11 +# CHECK-NEXT: 1 1 0.33 and x3, x5, x7, lsl #63 +# CHECK-NEXT: 1 1 0.33 and x5, x14, x19, asr #4 +# CHECK-NEXT: 1 1 0.33 and w3, w17, w19, ror #31 +# CHECK-NEXT: 1 1 0.33 and w0, w2, wzr, lsr #17 +# CHECK-NEXT: 1 1 0.33 and w3, w30, w11, asr #2 +# CHECK-NEXT: 1 1 0.33 and xzr, x4, x26 +# CHECK-NEXT: 1 1 0.33 and w3, wzr, w20, ror #2 +# CHECK-NEXT: 1 1 0.33 and x7, x20, xzr, asr #63 +# CHECK-NEXT: 1 1 0.33 bic x13, x20, x14, lsl #47 +# CHECK-NEXT: 1 1 0.33 bic w2, w7, w9 +# CHECK-NEXT: 1 1 0.33 orr w2, w7, w0, asr #31 +# CHECK-NEXT: 1 1 0.33 orr x8, x9, x10, lsl #12 +# CHECK-NEXT: 1 1 0.33 orn x3, x5, x7, asr #2 +# CHECK-NEXT: 1 1 0.33 orn w2, w5, w29 +# CHECK-NEXT: 1 2 1.00 ands w7, wzr, w9, lsl #1 +# CHECK-NEXT: 1 2 1.00 ands x3, x5, x20, ror #63 +# CHECK-NEXT: 1 2 1.00 bics w3, w5, w7 +# CHECK-NEXT: 1 2 1.00 bics x3, xzr, x3, lsl #1 +# CHECK-NEXT: 1 2 1.00 tst w3, w7, lsl #31 +# CHECK-NEXT: 1 2 1.00 tst x2, x20, asr #2 +# CHECK-NEXT: 1 1 0.33 mov x3, x6 +# CHECK-NEXT: 1 1 0.33 mov x3, xzr +# CHECK-NEXT: 1 1 0.33 mov wzr, w2 +# CHECK-NEXT: 1 1 0.33 mov w3, w5 +# CHECK-NEXT: 1 1 0.33 movz w2, #0, lsl #16 +# CHECK-NEXT: 1 1 0.33 mov w2, #-1235 +# CHECK-NEXT: 1 1 0.33 mov x2, #5299989643264 +# CHECK-NEXT: 1 1 0.33 mov x2, #0 +# CHECK-NEXT: 1 1 0.33 movk w3, #0 +# CHECK-NEXT: 1 1 0.33 movz x4, #0, lsl #16 +# CHECK-NEXT: 1 1 0.33 movk w5, #0, lsl #16 +# CHECK-NEXT: 1 1 0.33 movz x6, #0, lsl #32 +# CHECK-NEXT: 1 1 0.33 movk x7, #0, lsl #32 +# CHECK-NEXT: 1 1 0.33 movz x8, #0, lsl #48 +# CHECK-NEXT: 1 1 0.33 movk x9, #0, lsl #48 +# CHECK-NEXT: 1 1 0.33 adr x2, #1600 +# CHECK-NEXT: 1 1 0.33 adrp x21, #6553600 +# CHECK-NEXT: 1 1 0.33 adr x0, #262144 +# CHECK-NEXT: 1 1 1.00 tbz x12, #62, #0 +# CHECK-NEXT: 1 1 1.00 tbz x12, #62, #4 +# CHECK-NEXT: 1 1 1.00 tbz x12, #62, #-32768 +# CHECK-NEXT: 1 1 1.00 tbnz x12, #60, #32764 +# CHECK-NEXT: 1 1 1.00 b #4 +# CHECK-NEXT: 1 1 1.00 b #-4 +# CHECK-NEXT: 1 1 1.00 b #134217724 +# CHECK-NEXT: 1 1 1.00 br x20 +# CHECK-NEXT: 2 1 1.00 blr xzr +# CHECK-NEXT: 1 1 1.00 U ret x10 +# CHECK-NEXT: 1 1 1.00 U ret +# CHECK-NEXT: 1 1 1.00 U eret +# CHECK-NEXT: 1 1 1.00 U drps + +# CHECK: Resources: +# CHECK-NEXT: [0] - N1UnitB +# CHECK-NEXT: [1.0] - N1UnitD +# CHECK-NEXT: [1.1] - N1UnitD +# CHECK-NEXT: [2.0] - N1UnitL +# CHECK-NEXT: [2.1] - N1UnitL +# CHECK-NEXT: [3] - N1UnitM +# CHECK-NEXT: [4.0] - N1UnitS +# CHECK-NEXT: [4.1] - N1UnitS +# CHECK-NEXT: [5] - N1UnitV0 +# CHECK-NEXT: [6] - N1UnitV1 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1.0] [1.1] [2.0] [2.1] [3] [4.0] [4.1] [5] [6] +# CHECK-NEXT: 22.00 33.00 33.00 241.00 241.00 469.00 186.00 186.00 256.50 145.50 + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1.0] [1.1] [2.0] [2.1] [3] [4.0] [4.1] [5] [6] Instructions: +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add w2, w3, #4095 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add w30, w29, #1, lsl #12 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add w13, w5, #4095, lsl #12 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add x5, x7, #1638 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add w20, wsp, #801 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add wsp, wsp, #1104 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add wsp, w30, #4084 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add x0, x24, #291 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add x3, x24, #4095, lsl #12 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add x8, sp, #1074 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add sp, x29, #3816 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sub w0, wsp, #4077 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sub w4, w20, #546, lsl #12 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sub sp, sp, #288 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sub wsp, w19, #16 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adds w13, w23, #291, lsl #12 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmn w2, #4095 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adds w20, wsp, #0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmn x3, #1, lsl #12 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmp sp, #20, lsl #12 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmp x30, #4095 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - subs x4, sp, #3822 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmn w3, #291, lsl #12 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmn wsp, #1365 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmn sp, #1092, lsl #12 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - mov sp, x30 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - mov wsp, w20 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - mov x11, sp +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - mov w24, wsp +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add w3, w5, w7 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add wzr, w3, w5 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add w20, wzr, w4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add w4, w6, wzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add w11, w13, w15 +# CHECK-NEXT: - - - - - 1.00 - - - - add w9, w3, wzr, lsl #10 +# CHECK-NEXT: - - - - - 1.00 - - - - add w17, w29, w20, lsl #31 +# CHECK-NEXT: - - - - - 1.00 - - - - add w21, w22, w23, lsr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - add w24, w25, w26, lsr #18 +# CHECK-NEXT: - - - - - 1.00 - - - - add w27, w28, w29, lsr #31 +# CHECK-NEXT: - - - - - 1.00 - - - - add w2, w3, w4, asr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - add w5, w6, w7, asr #21 +# CHECK-NEXT: - - - - - 1.00 - - - - add w8, w9, w10, asr #31 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add x3, x5, x7 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add xzr, x3, x5 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add x20, xzr, x4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add x4, x6, xzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - add x11, x13, x15 +# CHECK-NEXT: - - - - - 1.00 - - - - add x9, x3, xzr, lsl #10 +# CHECK-NEXT: - - - - - 1.00 - - - - add x17, x29, x20, lsl #63 +# CHECK-NEXT: - - - - - 1.00 - - - - add x21, x22, x23, lsr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - add x24, x25, x26, lsr #18 +# CHECK-NEXT: - - - - - 1.00 - - - - add x27, x28, x29, lsr #63 +# CHECK-NEXT: - - - - - 1.00 - - - - add x2, x3, x4, asr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - add x5, x6, x7, asr #21 +# CHECK-NEXT: - - - - - 1.00 - - - - add x8, x9, x10, asr #63 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adds w3, w5, w7 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmn w3, w5 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adds w20, wzr, w4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adds w4, w6, wzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adds w11, w13, w15 +# CHECK-NEXT: - - - - - 1.00 - - - - adds w9, w3, wzr, lsl #10 +# CHECK-NEXT: - - - - - 1.00 - - - - adds w17, w29, w20, lsl #31 +# CHECK-NEXT: - - - - - 1.00 - - - - adds w21, w22, w23, lsr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - adds w24, w25, w26, lsr #18 +# CHECK-NEXT: - - - - - 1.00 - - - - adds w27, w28, w29, lsr #31 +# CHECK-NEXT: - - - - - 1.00 - - - - adds w2, w3, w4, asr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - adds w5, w6, w7, asr #21 +# CHECK-NEXT: - - - - - 1.00 - - - - adds w8, w9, w10, asr #31 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adds x3, x5, x7 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmn x3, x5 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adds x20, xzr, x4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adds x4, x6, xzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adds x11, x13, x15 +# CHECK-NEXT: - - - - - 1.00 - - - - adds x9, x3, xzr, lsl #10 +# CHECK-NEXT: - - - - - 1.00 - - - - adds x17, x29, x20, lsl #63 +# CHECK-NEXT: - - - - - 1.00 - - - - adds x21, x22, x23, lsr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - adds x24, x25, x26, lsr #18 +# CHECK-NEXT: - - - - - 1.00 - - - - adds x27, x28, x29, lsr #63 +# CHECK-NEXT: - - - - - 1.00 - - - - adds x2, x3, x4, asr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - adds x5, x6, x7, asr #21 +# CHECK-NEXT: - - - - - 1.00 - - - - adds x8, x9, x10, asr #63 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sub w3, w5, w7 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sub wzr, w3, w5 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sub w4, w6, wzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sub w11, w13, w15 +# CHECK-NEXT: - - - - - 1.00 - - - - sub w9, w3, wzr, lsl #10 +# CHECK-NEXT: - - - - - 1.00 - - - - sub w17, w29, w20, lsl #31 +# CHECK-NEXT: - - - - - 1.00 - - - - sub w21, w22, w23, lsr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - sub w24, w25, w26, lsr #18 +# CHECK-NEXT: - - - - - 1.00 - - - - sub w27, w28, w29, lsr #31 +# CHECK-NEXT: - - - - - 1.00 - - - - sub w2, w3, w4, asr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - sub w5, w6, w7, asr #21 +# CHECK-NEXT: - - - - - 1.00 - - - - sub w8, w9, w10, asr #31 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sub x3, x5, x7 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sub xzr, x3, x5 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sub x4, x6, xzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sub x11, x13, x15 +# CHECK-NEXT: - - - - - 1.00 - - - - sub x9, x3, xzr, lsl #10 +# CHECK-NEXT: - - - - - 1.00 - - - - sub x17, x29, x20, lsl #63 +# CHECK-NEXT: - - - - - 1.00 - - - - sub x21, x22, x23, lsr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - sub x24, x25, x26, lsr #18 +# CHECK-NEXT: - - - - - 1.00 - - - - sub x27, x28, x29, lsr #63 +# CHECK-NEXT: - - - - - 1.00 - - - - sub x2, x3, x4, asr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - sub x5, x6, x7, asr #21 +# CHECK-NEXT: - - - - - 1.00 - - - - sub x8, x9, x10, asr #63 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - subs w3, w5, w7 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmp w3, w5 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - subs w4, w6, wzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - subs w11, w13, w15 +# CHECK-NEXT: - - - - - 1.00 - - - - subs w9, w3, wzr, lsl #10 +# CHECK-NEXT: - - - - - 1.00 - - - - subs w17, w29, w20, lsl #31 +# CHECK-NEXT: - - - - - 1.00 - - - - subs w21, w22, w23, lsr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - subs w24, w25, w26, lsr #18 +# CHECK-NEXT: - - - - - 1.00 - - - - subs w27, w28, w29, lsr #31 +# CHECK-NEXT: - - - - - 1.00 - - - - subs w2, w3, w4, asr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - subs w5, w6, w7, asr #21 +# CHECK-NEXT: - - - - - 1.00 - - - - subs w8, w9, w10, asr #31 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - subs x3, x5, x7 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmp x3, x5 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - subs x4, x6, xzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - subs x11, x13, x15 +# CHECK-NEXT: - - - - - 1.00 - - - - subs x9, x3, xzr, lsl #10 +# CHECK-NEXT: - - - - - 1.00 - - - - subs x17, x29, x20, lsl #63 +# CHECK-NEXT: - - - - - 1.00 - - - - subs x21, x22, x23, lsr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - subs x24, x25, x26, lsr #18 +# CHECK-NEXT: - - - - - 1.00 - - - - subs x27, x28, x29, lsr #63 +# CHECK-NEXT: - - - - - 1.00 - - - - subs x2, x3, x4, asr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - subs x5, x6, x7, asr #21 +# CHECK-NEXT: - - - - - 1.00 - - - - subs x8, x9, x10, asr #63 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmn wzr, w4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmn w5, wzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmn w6, w7 +# CHECK-NEXT: - - - - - 1.00 - - - - cmn w8, w9, lsl #15 +# CHECK-NEXT: - - - - - 1.00 - - - - cmn w10, w11, lsl #31 +# CHECK-NEXT: - - - - - 1.00 - - - - cmn w12, w13, lsr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - cmn w14, w15, lsr #21 +# CHECK-NEXT: - - - - - 1.00 - - - - cmn w16, w17, lsr #31 +# CHECK-NEXT: - - - - - 1.00 - - - - cmn w18, w19, asr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - cmn w20, w21, asr #22 +# CHECK-NEXT: - - - - - 1.00 - - - - cmn w22, w23, asr #31 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmn x0, x3 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmn xzr, x4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmn x5, xzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmn x6, x7 +# CHECK-NEXT: - - - - - 1.00 - - - - cmn x8, x9, lsl #15 +# CHECK-NEXT: - - - - - 1.00 - - - - cmn x10, x11, lsl #63 +# CHECK-NEXT: - - - - - 1.00 - - - - cmn x12, x13, lsr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - cmn x14, x15, lsr #41 +# CHECK-NEXT: - - - - - 1.00 - - - - cmn x16, x17, lsr #63 +# CHECK-NEXT: - - - - - 1.00 - - - - cmn x18, x19, asr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - cmn x20, x21, asr #55 +# CHECK-NEXT: - - - - - 1.00 - - - - cmn x22, x23, asr #63 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmp w0, w3 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmp wzr, w4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmp w5, wzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmp w6, w7 +# CHECK-NEXT: - - - - - 1.00 - - - - cmp w8, w9, lsl #15 +# CHECK-NEXT: - - - - - 1.00 - - - - cmp w10, w11, lsl #31 +# CHECK-NEXT: - - - - - 1.00 - - - - cmp w12, w13, lsr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - cmp w14, w15, lsr #21 +# CHECK-NEXT: - - - - - 1.00 - - - - cmp w18, w19, asr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - cmp w20, w21, asr #22 +# CHECK-NEXT: - - - - - 1.00 - - - - cmp w22, w23, asr #31 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmp x0, x3 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmp xzr, x4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmp x5, xzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmp x6, x7 +# CHECK-NEXT: - - - - - 1.00 - - - - cmp x8, x9, lsl #15 +# CHECK-NEXT: - - - - - 1.00 - - - - cmp x10, x11, lsl #63 +# CHECK-NEXT: - - - - - 1.00 - - - - cmp x12, x13, lsr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - cmp x14, x15, lsr #41 +# CHECK-NEXT: - - - - - 1.00 - - - - cmp x16, x17, lsr #63 +# CHECK-NEXT: - - - - - 1.00 - - - - cmp x18, x19, asr #0 +# CHECK-NEXT: - - - - - 1.00 - - - - cmp x20, x21, asr #55 +# CHECK-NEXT: - - - - - 1.00 - - - - cmp x22, x23, asr #63 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmp wzr, w0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cmp xzr, x0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adc w29, w27, w25 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adc wzr, w3, w4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adc w9, wzr, w10 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adc w20, w0, wzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adc x29, x27, x25 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adc xzr, x3, x4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adc x9, xzr, x10 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adc x20, x0, xzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adcs w29, w27, w25 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adcs wzr, w3, w4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adcs w9, wzr, w10 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adcs w20, w0, wzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adcs x29, x27, x25 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adcs xzr, x3, x4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adcs x9, xzr, x10 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adcs x20, x0, xzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbc w29, w27, w25 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbc wzr, w3, w4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ngc w9, w10 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbc w20, w0, wzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbc x29, x27, x25 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbc xzr, x3, x4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ngc x9, x10 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbc x20, x0, xzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbcs w29, w27, w25 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbcs wzr, w3, w4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ngcs w9, w10 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbcs w20, w0, wzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbcs x29, x27, x25 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbcs xzr, x3, x4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ngcs x9, x10 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbcs x20, x0, xzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ngc w3, w12 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ngc wzr, w9 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ngc w23, wzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ngc x29, x30 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ngc xzr, x0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ngc x0, xzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ngcs w3, w12 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ngcs wzr, w9 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ngcs w23, wzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ngcs x29, x30 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ngcs xzr, x0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ngcs x0, xzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbfx x1, x2, #3, #2 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - asr x3, x4, #63 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - asr wzr, wzr, #31 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbfx w12, w9, #0, #1 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ubfiz x4, x5, #52, #11 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ubfx xzr, x4, #0, #1 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ubfiz x4, xzr, #1, #6 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsr x5, x6, #12 +# CHECK-NEXT: - - - - - 1.00 - - - - bfi x4, x5, #52, #11 +# CHECK-NEXT: - - - - - 1.00 - - - - bfxil xzr, x4, #0, #1 +# CHECK-NEXT: - - - - - 1.00 - - - - bfc x4, #1, #6 +# CHECK-NEXT: - - - - - 1.00 - - - - bfxil x5, x6, #12, #52 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sxtb w1, w2 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sxtb xzr, w3 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sxth w9, w10 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sxth x0, w1 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sxtw x3, w30 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - uxtb w1, w2 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - uxth w9, w10 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ubfx x3, x30, #0, #32 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - asr w3, w2, #0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - asr w9, w10, #31 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - asr x20, x21, #63 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - asr w1, wzr, #3 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsr w3, w2, #0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsr w9, w10, #31 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsr x20, x21, #63 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsr wzr, wzr, #3 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsr w3, w2, #0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsl w9, w10, #31 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsl x20, x21, #63 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsl w1, wzr, #3 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbfx w9, w10, #0, #1 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbfiz x2, x3, #63, #1 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - asr x19, x20, #0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbfiz x9, x10, #5, #59 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - asr w9, w10, #0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbfiz w11, w12, #31, #1 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbfiz w13, w14, #29, #3 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbfiz xzr, xzr, #10, #11 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbfx w9, w10, #0, #1 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - asr x2, x3, #63 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - asr x19, x20, #0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - asr x9, x10, #5 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - asr w9, w10, #0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - asr w11, w12, #31 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - asr w13, w14, #29 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - sbfx xzr, xzr, #10, #11 +# CHECK-NEXT: - - - - - 1.00 - - - - bfxil w9, w10, #0, #1 +# CHECK-NEXT: - - - - - 1.00 - - - - bfi x2, x3, #63, #1 +# CHECK-NEXT: - - - - - 1.00 - - - - bfxil x19, x20, #0, #64 +# CHECK-NEXT: - - - - - 1.00 - - - - bfi x9, x10, #5, #59 +# CHECK-NEXT: - - - - - 1.00 - - - - bfxil w9, w10, #0, #32 +# CHECK-NEXT: - - - - - 1.00 - - - - bfi w11, w12, #31, #1 +# CHECK-NEXT: - - - - - 1.00 - - - - bfi w13, w14, #29, #3 +# CHECK-NEXT: - - - - - 1.00 - - - - bfc xzr, #10, #11 +# CHECK-NEXT: - - - - - 1.00 - - - - bfxil w9, w10, #0, #1 +# CHECK-NEXT: - - - - - 1.00 - - - - bfxil x2, x3, #63, #1 +# CHECK-NEXT: - - - - - 1.00 - - - - bfxil x19, x20, #0, #64 +# CHECK-NEXT: - - - - - 1.00 - - - - bfxil x9, x10, #5, #59 +# CHECK-NEXT: - - - - - 1.00 - - - - bfxil w9, w10, #0, #32 +# CHECK-NEXT: - - - - - 1.00 - - - - bfxil w11, w12, #31, #1 +# CHECK-NEXT: - - - - - 1.00 - - - - bfxil w13, w14, #29, #3 +# CHECK-NEXT: - - - - - 1.00 - - - - bfxil xzr, xzr, #10, #11 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ubfx w9, w10, #0, #1 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsl x2, x3, #63 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsr x19, x20, #0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsl x9, x10, #5 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsr w9, w10, #0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsl w11, w12, #31 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsl w13, w14, #29 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ubfiz xzr, xzr, #10, #11 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ubfx w9, w10, #0, #1 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsr x2, x3, #63 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsr x19, x20, #0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsr x9, x10, #5 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsr w9, w10, #0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsr w11, w12, #31 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsr w13, w14, #29 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ubfx xzr, xzr, #10, #11 +# CHECK-NEXT: 1.00 - - - - - - - - - cbz w5, #4 +# CHECK-NEXT: 1.00 - - - - - - - - - cbz x5, #0 +# CHECK-NEXT: 1.00 - - - - - - - - - cbnz x2, #-4 +# CHECK-NEXT: 1.00 - - - - - - - - - cbnz x26, #1048572 +# CHECK-NEXT: 1.00 - - - - - - - - - cbz wzr, #0 +# CHECK-NEXT: 1.00 - - - - - - - - - cbnz xzr, #0 +# CHECK-NEXT: 1.00 - - - - - - - - - b.ne #4 +# CHECK-NEXT: 1.00 - - - - - - - - - b.ge #1048572 +# CHECK-NEXT: 1.00 - - - - - - - - - b.ge #-4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmp w1, #31, #0, eq +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmp w3, #0, #15, hs +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmp wzr, #15, #13, hs +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmp x9, #31, #0, le +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmp x3, #0, #15, gt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmp xzr, #5, #7, ne +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmn w1, #31, #0, eq +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmn w3, #0, #15, hs +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmn wzr, #15, #13, hs +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmn x9, #31, #0, le +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmn x3, #0, #15, gt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmn xzr, #5, #7, ne +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmp w1, wzr, #0, eq +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmp w3, w0, #15, hs +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmp wzr, w15, #13, hs +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmp x9, xzr, #0, le +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmp x3, x0, #15, gt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmp xzr, x5, #7, ne +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmn w1, wzr, #0, eq +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmn w3, w0, #15, hs +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmn wzr, w15, #13, hs +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmn x9, xzr, #0, le +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmn x3, x0, #15, gt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ccmn xzr, x5, #7, ne +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csel w1, w0, w19, ne +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csel wzr, w5, w9, eq +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csel w9, wzr, w30, gt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csel w1, w28, wzr, mi +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csel x19, x23, x29, lt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csel xzr, x3, x4, ge +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csel x5, xzr, x6, hs +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csel x7, x8, xzr, lo +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinc w1, w0, w19, ne +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinc wzr, w5, w9, eq +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinc w9, wzr, w30, gt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinc w1, w28, wzr, mi +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinc x19, x23, x29, lt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinc xzr, x3, x4, ge +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinc x5, xzr, x6, hs +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinc x7, x8, xzr, lo +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinv w1, w0, w19, ne +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinv wzr, w5, w9, eq +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinv w9, wzr, w30, gt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinv w1, w28, wzr, mi +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinv x19, x23, x29, lt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinv xzr, x3, x4, ge +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinv x5, xzr, x6, hs +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinv x7, x8, xzr, lo +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csneg w1, w0, w19, ne +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csneg wzr, w5, w9, eq +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csneg w9, wzr, w30, gt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csneg w1, w28, wzr, mi +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csneg x19, x23, x29, lt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csneg xzr, x3, x4, ge +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csneg x5, xzr, x6, hs +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csneg x7, x8, xzr, lo +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cset w3, eq +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cset x9, pl +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csetm w20, ne +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csetm x30, ge +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinc w2, wzr, wzr, al +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinv x3, xzr, xzr, nv +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cinc w3, w5, gt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cinc wzr, w4, le +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cset w9, lt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cinc x3, x5, gt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cinc xzr, x4, le +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cset x9, lt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinc w5, w6, w6, nv +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinc x1, x2, x2, al +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cinv w3, w5, gt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cinv wzr, w4, le +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csetm w9, lt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cinv x3, x5, gt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cinv xzr, x4, le +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csetm x9, lt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinv x1, x0, x0, al +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinv w9, w8, w8, nv +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cneg w3, w5, gt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cneg wzr, w4, le +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cneg w9, wzr, lt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cneg x3, x5, gt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cneg xzr, x4, le +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cneg x9, xzr, lt +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csneg x4, x8, x8, al +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - csinv w9, w8, w8, nv +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - rbit w0, w7 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - rbit x18, x3 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - rev16 w17, w1 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - rev16 x5, x2 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - rev w18, w0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - rev32 x20, x1 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - rev x22, x2 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - clz w24, w3 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - clz x26, x4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cls w3, w5 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - cls x20, x5 +# CHECK-NEXT: - - - - - 5.00 - - - - udiv w0, w7, w10 +# CHECK-NEXT: - - - - - 5.00 - - - - udiv x9, x22, x4 +# CHECK-NEXT: - - - - - 5.00 - - - - sdiv w12, w21, w0 +# CHECK-NEXT: - - - - - 5.00 - - - - sdiv x13, x2, x1 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsl w11, w12, w13 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsl x14, x15, x16 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsr w17, w18, w19 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsr x20, x21, x22 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - asr w23, w24, w25 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - asr x26, x27, x28 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ror w0, w1, w2 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ror x3, x4, x5 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsl w6, w7, w8 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsl x9, x10, x11 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsr w12, w13, w14 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - lsr x15, x16, x17 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - asr w18, w19, w20 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - asr x21, x22, x23 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ror w24, w25, w26 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ror x27, x28, x29 +# CHECK-NEXT: - - - - - 3.00 - - - - smulh x30, x29, x28 +# CHECK-NEXT: - - - - - 3.00 - - - - smulh xzr, x27, x26 +# CHECK-NEXT: - - - - - 3.00 - - - - umulh x30, x29, x28 +# CHECK-NEXT: - - - - - 3.00 - - - - umulh x23, x30, xzr +# CHECK-NEXT: - - - - - 1.00 - - - - madd w1, w3, w7, w4 +# CHECK-NEXT: - - - - - 1.00 - - - - madd wzr, w0, w9, w11 +# CHECK-NEXT: - - - - - 1.00 - - - - madd w13, wzr, w4, w4 +# CHECK-NEXT: - - - - - 1.00 - - - - madd w19, w30, wzr, w29 +# CHECK-NEXT: - - - - - 1.00 - - - - mul w4, w5, w6 +# CHECK-NEXT: - - - - - 3.00 - - - - madd x1, x3, x7, x4 +# CHECK-NEXT: - - - - - 3.00 - - - - madd xzr, x0, x9, x11 +# CHECK-NEXT: - - - - - 3.00 - - - - madd x13, xzr, x4, x4 +# CHECK-NEXT: - - - - - 3.00 - - - - madd x19, x30, xzr, x29 +# CHECK-NEXT: - - - - - 3.00 - - - - mul x4, x5, x6 +# CHECK-NEXT: - - - - - 1.00 - - - - msub w1, w3, w7, w4 +# CHECK-NEXT: - - - - - 1.00 - - - - msub wzr, w0, w9, w11 +# CHECK-NEXT: - - - - - 1.00 - - - - msub w13, wzr, w4, w4 +# CHECK-NEXT: - - - - - 1.00 - - - - msub w19, w30, wzr, w29 +# CHECK-NEXT: - - - - - 1.00 - - - - mneg w4, w5, w6 +# CHECK-NEXT: - - - - - 3.00 - - - - msub x1, x3, x7, x4 +# CHECK-NEXT: - - - - - 3.00 - - - - msub xzr, x0, x9, x11 +# CHECK-NEXT: - - - - - 3.00 - - - - msub x13, xzr, x4, x4 +# CHECK-NEXT: - - - - - 3.00 - - - - msub x19, x30, xzr, x29 +# CHECK-NEXT: - - - - - 3.00 - - - - mneg x4, x5, x6 +# CHECK-NEXT: - - - - - 1.00 - - - - smaddl x3, w5, w2, x9 +# CHECK-NEXT: - - - - - 1.00 - - - - smaddl xzr, w10, w11, x12 +# CHECK-NEXT: - - - - - 1.00 - - - - smaddl x13, wzr, w14, x15 +# CHECK-NEXT: - - - - - 1.00 - - - - smaddl x16, w17, wzr, x18 +# CHECK-NEXT: - - - - - 1.00 - - - - smull x19, w20, w21 +# CHECK-NEXT: - - - - - 1.00 - - - - smsubl x3, w5, w2, x9 +# CHECK-NEXT: - - - - - 1.00 - - - - smsubl xzr, w10, w11, x12 +# CHECK-NEXT: - - - - - 1.00 - - - - smsubl x13, wzr, w14, x15 +# CHECK-NEXT: - - - - - 1.00 - - - - smsubl x16, w17, wzr, x18 +# CHECK-NEXT: - - - - - 1.00 - - - - smnegl x19, w20, w21 +# CHECK-NEXT: - - - - - 1.00 - - - - umaddl x3, w5, w2, x9 +# CHECK-NEXT: - - - - - 1.00 - - - - umaddl xzr, w10, w11, x12 +# CHECK-NEXT: - - - - - 1.00 - - - - umaddl x13, wzr, w14, x15 +# CHECK-NEXT: - - - - - 1.00 - - - - umaddl x16, w17, wzr, x18 +# CHECK-NEXT: - - - - - 1.00 - - - - umull x19, w20, w21 +# CHECK-NEXT: - - - - - 1.00 - - - - umsubl x3, w5, w2, x9 +# CHECK-NEXT: - - - - - 1.00 - - - - umsubl x16, w17, wzr, x18 +# CHECK-NEXT: - - - - - 1.00 - - - - umnegl x19, w20, w21 +# CHECK-NEXT: - - - - - 3.00 - - - - smulh x30, x29, x28 +# CHECK-NEXT: - - - - - 3.00 - - - - smulh x23, x22, xzr +# CHECK-NEXT: - - - - - 3.00 - - - - umulh x23, x22, xzr +# CHECK-NEXT: - - - - - 3.00 - - - - mul x19, x20, xzr +# CHECK-NEXT: - - - - - 1.00 - - - - mneg w21, w22, w23 +# CHECK-NEXT: - - - - - 1.00 - - - - smull x11, w13, w17 +# CHECK-NEXT: - - - - - 1.00 - - - - umull x11, w13, w17 +# CHECK-NEXT: - - - - - 1.00 - - - - smnegl x11, w13, w17 +# CHECK-NEXT: - - - - - 1.00 - - - - umnegl x11, w13, w17 +# CHECK-NEXT: - - - - - 1.33 0.33 0.33 - - extr w3, w5, w7, #0 +# CHECK-NEXT: - - - - - 1.33 0.33 0.33 - - extr w11, w13, w17, #31 +# CHECK-NEXT: - - - - - 1.33 0.33 0.33 - - extr x3, x5, x7, #15 +# CHECK-NEXT: - - - - - 1.33 0.33 0.33 - - extr x11, x13, x17, #63 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ror x19, x23, #24 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ror x29, xzr, #63 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - ror w9, w13, #31 +# CHECK-NEXT: - - - - - - - - 1.00 - fcmp s3, s5 +# CHECK-NEXT: - - - - - - - - 1.00 - fcmp s31, #0.0 +# CHECK-NEXT: - - - - - - - - 1.00 - fcmp s31, #0.0 +# CHECK-NEXT: - - - - - - - - 1.00 - fcmpe s29, s30 +# CHECK-NEXT: - - - - - - - - 1.00 - fcmpe s15, #0.0 +# CHECK-NEXT: - - - - - - - - 1.00 - fcmpe s15, #0.0 +# CHECK-NEXT: - - - - - - - - 1.00 - fcmp d4, d12 +# CHECK-NEXT: - - - - - - - - 1.00 - fcmp d23, #0.0 +# CHECK-NEXT: - - - - - - - - 1.00 - fcmp d23, #0.0 +# CHECK-NEXT: - - - - - - - - 1.00 - fcmpe d26, d22 +# CHECK-NEXT: - - - - - - - - 1.00 - fcmpe d29, #0.0 +# CHECK-NEXT: - - - - - - - - 1.00 - fcmpe d29, #0.0 +# CHECK-NEXT: - - - - - - - - 1.00 - fccmp s1, s31, #0, eq +# CHECK-NEXT: - - - - - - - - 1.00 - fccmp s3, s0, #15, hs +# CHECK-NEXT: - - - - - - - - 1.00 - fccmp s31, s15, #13, hs +# CHECK-NEXT: - - - - - - - - 1.00 - fccmp d9, d31, #0, le +# CHECK-NEXT: - - - - - - - - 1.00 - fccmp d3, d0, #15, gt +# CHECK-NEXT: - - - - - - - - 1.00 - fccmp d31, d5, #7, ne +# CHECK-NEXT: - - - - - - - - 1.00 - fccmpe s1, s31, #0, eq +# CHECK-NEXT: - - - - - - - - 1.00 - fccmpe s3, s0, #15, hs +# CHECK-NEXT: - - - - - - - - 1.00 - fccmpe s31, s15, #13, hs +# CHECK-NEXT: - - - - - - - - 1.00 - fccmpe d9, d31, #0, le +# CHECK-NEXT: - - - - - - - - 1.00 - fccmpe d3, d0, #15, gt +# CHECK-NEXT: - - - - - - - - 1.00 - fccmpe d31, d5, #7, ne +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcsel s3, s20, s9, pl +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcsel d9, d10, d11, mi +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmov s0, s1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fabs s2, s3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fneg s4, s5 +# CHECK-NEXT: - - - - - - - - 7.00 - fsqrt s6, s7 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvt d8, s9 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvt h10, s11 +# CHECK-NEXT: - - - - - - - - 1.00 - frintn s12, s13 +# CHECK-NEXT: - - - - - - - - 1.00 - frintp s14, s15 +# CHECK-NEXT: - - - - - - - - 1.00 - frintm s16, s17 +# CHECK-NEXT: - - - - - - - - 1.00 - frintz s18, s19 +# CHECK-NEXT: - - - - - - - - 1.00 - frinta s20, s21 +# CHECK-NEXT: - - - - - - - - 1.00 - frintx s22, s23 +# CHECK-NEXT: - - - - - - - - 1.00 - frinti s24, s25 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmov d0, d1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fabs d2, d3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fneg d4, d5 +# CHECK-NEXT: - - - - - - - - 7.00 - fsqrt d6, d7 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvt s8, d9 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvt h10, d11 +# CHECK-NEXT: - - - - - - - - 1.00 - frintn d12, d13 +# CHECK-NEXT: - - - - - - - - 1.00 - frintp d14, d15 +# CHECK-NEXT: - - - - - - - - 1.00 - frintm d16, d17 +# CHECK-NEXT: - - - - - - - - 1.00 - frintz d18, d19 +# CHECK-NEXT: - - - - - - - - 1.00 - frinta d20, d21 +# CHECK-NEXT: - - - - - - - - 1.00 - frintx d22, d23 +# CHECK-NEXT: - - - - - - - - 1.00 - frinti d24, d25 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvt s26, h27 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvt d28, h29 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmul s20, s19, s17 +# CHECK-NEXT: - - - - - - - - 7.00 - fdiv s1, s2, s3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fadd s4, s5, s6 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fsub s7, s8, s9 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmax s10, s11, s12 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmin s13, s14, s15 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmaxnm s16, s17, s18 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fminnm s19, s20, s21 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fnmul s22, s23, s2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmul d20, d19, d17 +# CHECK-NEXT: - - - - - - - - 7.00 - fdiv d1, d2, d3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fadd d4, d5, d6 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fsub d7, d8, d9 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmax d10, d11, d12 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmin d13, d14, d15 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmaxnm d16, d17, d18 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fminnm d19, d20, d21 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fnmul d22, d23, d24 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmadd s3, s5, s6, s31 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmadd d3, d13, d0, d23 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmsub s3, s5, s6, s31 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmsub d3, d13, d0, d23 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fnmadd s3, s5, s6, s31 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fnmadd d3, d13, d0, d23 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fnmsub s3, s5, s6, s31 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fnmsub d3, d13, d0, d23 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs w3, h5, #1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs wzr, h20, #13 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs w19, h0, #32 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs x3, h5, #1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs x12, h30, #45 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs x19, h0, #64 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs w3, s5, #1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs wzr, s20, #13 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs w19, s0, #32 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs x3, s5, #1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs x12, s30, #45 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs x19, s0, #64 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs w3, d5, #1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs wzr, d20, #13 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs w19, d0, #32 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs x3, d5, #1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs x12, d30, #45 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs x19, d0, #64 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu w3, h5, #1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu wzr, h20, #13 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu w19, h0, #32 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu x3, h5, #1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu x12, h30, #45 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu x19, h0, #64 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu w3, s5, #1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu wzr, s20, #13 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu w19, s0, #32 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu x3, s5, #1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu x12, s30, #45 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu x19, s0, #64 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu w3, d5, #1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu wzr, d20, #13 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu w19, d0, #32 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu x3, d5, #1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu x12, d30, #45 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu x19, d0, #64 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf h23, w19, #1 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf h31, wzr, #20 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf h14, w0, #32 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf h23, x19, #1 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf h31, xzr, #20 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf h14, x0, #64 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf s23, w19, #1 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf s31, wzr, #20 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf s14, w0, #32 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf s23, x19, #1 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf s31, xzr, #20 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf s14, x0, #64 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf d23, w19, #1 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf d31, wzr, #20 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf d14, w0, #32 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf d23, x19, #1 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf d31, xzr, #20 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf d14, x0, #64 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf h23, w19, #1 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf h31, wzr, #20 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf h14, w0, #32 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf h23, x19, #1 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf h31, xzr, #20 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf h14, x0, #64 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf s23, w19, #1 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf s31, wzr, #20 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf s14, w0, #32 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf s23, x19, #1 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf s31, xzr, #20 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf s14, x0, #64 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf d23, w19, #1 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf d31, wzr, #20 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf d14, w0, #32 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf d23, x19, #1 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf d31, xzr, #20 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf d14, x0, #64 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtns w3, h31 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtns xzr, h12 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtnu wzr, h12 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtnu x0, h0 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtps wzr, h9 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtps x12, h20 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtpu w30, h23 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtpu x29, h3 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtms w2, h3 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtms x4, h5 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtmu w6, h7 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtmu x8, h9 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtzs w10, h11 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtzs x12, h13 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtzu w14, h15 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtzu x15, h16 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf h17, w18 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf h19, x20 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf h21, w22 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf h23, x24 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtas w25, h26 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtas x27, h28 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtau w29, h30 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtau xzr, h0 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtns w3, s31 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtns xzr, s12 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtnu wzr, s12 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtnu x0, s0 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtps wzr, s9 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtps x12, s20 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtpu w30, s23 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtpu x29, s3 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtms w2, s3 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtms x4, s5 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtmu w6, s7 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtmu x8, s9 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtzs w10, s11 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtzs x12, s13 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtzu w14, s15 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtzu x15, s16 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf s17, w18 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf s19, x20 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf s21, w22 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf s23, x24 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtas w25, s26 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtas x27, s28 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtau w29, s30 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtau xzr, s0 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtns w3, d31 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtns xzr, d12 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtnu wzr, d12 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtnu x0, d0 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtps wzr, d9 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtps x12, d20 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtpu w30, d23 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtpu x29, d3 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtms w2, d3 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtms x4, d5 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtmu w6, d7 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtmu x8, d9 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtzs w10, d11 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtzs x12, d13 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtzu w14, d15 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtzu x15, d16 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf d17, w18 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - scvtf d19, x20 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf d21, w22 +# CHECK-NEXT: - - - - - 1.00 - - 1.00 - ucvtf d23, x24 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtas w25, d26 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtas x27, d28 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtau w29, d30 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 fcvtau xzr, d0 +# CHECK-NEXT: - - - - - - - - - 1.00 fmov w3, s9 +# CHECK-NEXT: - - - - - 1.00 - - - - fmov s9, w3 +# CHECK-NEXT: - - - - - - - - - 1.00 fmov x20, d31 +# CHECK-NEXT: - - - - - 1.00 - - - - fmov d1, x15 +# CHECK-NEXT: - - - - - - - - - 1.00 fmov x3, v12.d[1] +# CHECK-NEXT: - - - - - 1.00 - - - - fmov v1.d[1], x19 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmov s2, #0.12500000 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmov s3, #1.00000000 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmov d30, #16.00000000 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmov s4, #1.06250000 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmov d10, #1.93750000 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmov s12, #-1.00000000 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmov d16, #8.50000000 +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr w3, #0 +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr x29, #4 +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrsw xzr, #-4 +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr s0, #8 +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr d0, #1048572 +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr q0, #-1048576 +# CHECK-NEXT: - - - 0.50 0.50 - - - - - prfm pldl1strm, #0 +# CHECK-NEXT: - - - 0.50 0.50 - - - - - prfm #22, #0 +# CHECK-NEXT: - 0.50 0.50 1.00 1.00 - - - - - stxrb w18, w8, [sp] +# CHECK-NEXT: - 0.50 0.50 1.00 1.00 - - - - - stxrh w24, w15, [x16] +# CHECK-NEXT: - 0.50 0.50 1.00 1.00 - - - - - stxr w5, w6, [x17] +# CHECK-NEXT: - 0.50 0.50 1.00 1.00 - - - - - stxr w1, x10, [x21] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldxrb w30, [x0] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldxrh w17, [x4] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldxr w22, [sp] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldxr x11, [x29] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldxr x11, [x29] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldxr x11, [x29] +# CHECK-NEXT: - 0.50 0.50 1.00 1.00 - - - - - stxp w12, w11, w10, [sp] +# CHECK-NEXT: - 0.50 0.50 1.00 1.00 - - - - - stxp wzr, x27, x9, [x12] +# CHECK-NEXT: - - - 1.00 1.00 - - - - - ldxp w0, wzr, [sp] +# CHECK-NEXT: - - - 1.00 1.00 - - - - - ldxp x17, x0, [x18] +# CHECK-NEXT: - - - 1.00 1.00 - - - - - ldxp x17, x0, [x18] +# CHECK-NEXT: - 0.50 0.50 1.00 1.00 - - - - - stlxrb w12, w22, [x0] +# CHECK-NEXT: - 0.50 0.50 1.00 1.00 - - - - - stlxrh w10, w1, [x1] +# CHECK-NEXT: - 0.50 0.50 1.00 1.00 - - - - - stlxr w9, w2, [x2] +# CHECK-NEXT: - 0.50 0.50 1.00 1.00 - - - - - stlxr w9, x3, [sp] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldaxrb w8, [x4] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldaxrh w7, [x5] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldaxr w6, [sp] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldaxr x5, [x6] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldaxr x5, [x6] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldaxr x5, [x6] +# CHECK-NEXT: - 0.50 0.50 1.00 1.00 - - - - - stlxp w4, w5, w6, [sp] +# CHECK-NEXT: - 0.50 0.50 1.00 1.00 - - - - - stlxp wzr, x6, x7, [x1] +# CHECK-NEXT: - - - 1.00 1.00 - - - - - ldaxp w5, w18, [sp] +# CHECK-NEXT: - - - 1.00 1.00 - - - - - ldaxp x6, x19, [x22] +# CHECK-NEXT: - - - 1.00 1.00 - - - - - ldaxp x6, x19, [x22] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - stlrb w24, [sp] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - stlrh w25, [x30] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - stlr w26, [x29] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - stlr x27, [x28] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - stlr x27, [x28] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - stlr x27, [x28] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldarb w23, [sp] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldarh w22, [x30] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldar wzr, [x29] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldar x21, [x28] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldar x21, [x28] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldar x21, [x28] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - sturb w9, [sp] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - sturh wzr, [x12, #255] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - stur w16, [x0, #-256] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - stur x28, [x14, #1] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldurb w1, [x20, #255] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldurh w20, [x1, #255] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldur w12, [sp, #255] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldur xzr, [x12, #255] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldursb x9, [x7, #-256] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldursh x17, [x19, #-256] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldursw x20, [x15, #-256] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - prfum pldl2keep, [sp, #-256] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldursb w19, [x1, #-256] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldursh w15, [x21, #-256] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - stur b0, [sp, #1] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - stur h12, [x12, #-1] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - stur s15, [x0, #255] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - stur d31, [x5, #25] +# CHECK-NEXT: - - - 1.00 1.00 0.67 0.67 0.67 - - stur q9, [x5] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldur b3, [sp] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldur h5, [x4, #-256] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldur s7, [x12, #-1] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldur d11, [x19, #4] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldur q13, [x1, #2] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - strb w9, [x2], #255 +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - strb w10, [x3], #1 +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - strb w10, [x3], #-256 +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - strh w9, [x2], #255 +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - strh w9, [x2], #1 +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - strh w10, [x3], #-256 +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - str w19, [sp], #255 +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - str w20, [x30], #1 +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - str w21, [x12], #-256 +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - str xzr, [x9], #255 +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - str x2, [x3], #1 +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - str x19, [x12], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrb w9, [x2], #255 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrb w10, [x3], #1 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrb w10, [x3], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrh w9, [x2], #255 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrh w9, [x2], #1 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrh w10, [x3], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr w19, [sp], #255 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr w20, [x30], #1 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr w21, [x12], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr xzr, [x9], #255 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr x2, [x3], #1 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr x19, [x12], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsb xzr, [x9], #255 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsb x2, [x3], #1 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsb x19, [x12], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsh xzr, [x9], #255 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsh x2, [x3], #1 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsh x19, [x12], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsw xzr, [x9], #255 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsw x2, [x3], #1 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsw x19, [x12], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsb wzr, [x9], #255 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsb w2, [x3], #1 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsb w19, [x12], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsh wzr, [x9], #255 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsh w2, [x3], #1 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsh w19, [x12], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str b0, [x0], #255 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str b3, [x3], #1 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str b5, [sp], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str h10, [x10], #255 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str h13, [x23], #1 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str h15, [sp], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str s20, [x20], #255 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str s23, [x23], #1 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str s25, [x0], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str d20, [x20], #255 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str d23, [x23], #1 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str d25, [x0], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr b0, [x0], #255 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr b3, [x3], #1 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr b5, [sp], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr h10, [x10], #255 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr h13, [x23], #1 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr h15, [sp], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr s20, [x20], #255 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr s23, [x23], #1 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr s25, [x0], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr d20, [x20], #255 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr d23, [x23], #1 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr d25, [x0], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr q20, [x1], #255 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr q23, [x9], #1 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr q25, [x20], #-256 +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.00 1.00 str q10, [x1], #255 +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.00 1.00 str q22, [sp], #1 +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.00 1.00 str q21, [x20], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr x3, [x4, #0]! +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - strb w9, [x2, #255]! +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - strb w10, [x3, #1]! +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - strb w10, [x3, #-256]! +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - strh w9, [x2, #255]! +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - strh w9, [x2, #1]! +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - strh w10, [x3, #-256]! +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - str w19, [sp, #255]! +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - str w20, [x30, #1]! +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - str w21, [x12, #-256]! +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - str xzr, [x9, #255]! +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - str x2, [x3, #1]! +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 0.33 0.33 0.33 - - str x19, [x12, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrb w9, [x2, #255]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrb w10, [x3, #1]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrb w10, [x3, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrh w9, [x2, #255]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrh w9, [x2, #1]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrh w10, [x3, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr w19, [sp, #255]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr w20, [x30, #1]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr w21, [x12, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr xzr, [x9, #255]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr x2, [x3, #1]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr x19, [x12, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsb xzr, [x9, #255]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsb x2, [x3, #1]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsb x19, [x12, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsh xzr, [x9, #255]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsh x2, [x3, #1]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsh x19, [x12, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsw xzr, [x9, #255]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsw x2, [x3, #1]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsw x19, [x12, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsb wzr, [x9, #255]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsb w2, [x3, #1]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsb w19, [x12, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsh wzr, [x9, #255]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsh w2, [x3, #1]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldrsh w19, [x12, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str b0, [x0, #255]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str b3, [x3, #1]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str b5, [sp, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str h10, [x10, #255]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str h13, [x23, #1]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str h15, [sp, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str s20, [x20, #255]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str s23, [x23, #1]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str s25, [x0, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str d20, [x20, #255]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str d23, [x23, #1]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 str d25, [x0, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr b0, [x0, #255]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr b3, [x3, #1]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr b5, [sp, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr h10, [x10, #255]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr h13, [x23, #1]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr h15, [sp, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr s20, [x20, #255]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr s23, [x23, #1]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr s25, [x0, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr d20, [x20, #255]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr d23, [x23, #1]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr d25, [x0, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr q20, [x1, #255]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr q23, [x9, #1]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr q25, [x20, #-256]! +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.00 1.00 str q10, [x1, #255]! +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.00 1.00 str q22, [sp, #1]! +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.00 1.00 str q21, [x20, #-256]! +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - sttrb w9, [sp] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - sttrh wzr, [x12, #255] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - sttr w16, [x0, #-256] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - sttr x28, [x14, #1] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldtrb w1, [x20, #255] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldtrh w20, [x1, #255] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldtr w12, [sp, #255] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldtr xzr, [x12, #255] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldtrsb x9, [x7, #-256] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldtrsh x17, [x19, #-256] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldtrsw x20, [x15, #-256] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldtrsb w19, [x1, #-256] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldtrsh w15, [x21, #-256] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr x4, [x29] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr x30, [x12, #32760] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr x20, [sp, #8] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr xzr, [sp] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr w2, [sp] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr w17, [sp, #16380] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr w13, [x2, #4] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrsw x2, [x5, #4] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrsw x23, [sp, #16380] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrh w2, [x4] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrsh w23, [x6, #8190] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrsh wzr, [sp, #2] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrsh x29, [x2, #2] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrb w26, [x3, #121] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrb w12, [x2] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrsb w27, [sp, #4095] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrsb xzr, [x15] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - str x30, [sp] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - str w20, [x4, #16380] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - strh w17, [sp, #8190] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - strb w23, [x3, #4095] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - strb wzr, [x2] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr b31, [sp, #4095] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr h20, [x2, #8190] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr s10, [x19, #16380] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr d3, [x10, #32760] +# CHECK-NEXT: - - - 1.00 1.00 - - - 1.00 1.00 str q12, [sp, #65520] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrb w3, [sp, x5] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrb w9, [x27, x6] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrsb w10, [x30, x7] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrb w11, [x29, x3, sxtx] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - strb w12, [x28, xzr, sxtx] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrb w14, [x26, w6, uxtw] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrsb w15, [x25, w7, uxtw] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrb w17, [x23, w9, sxtw] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrsb x18, [x22, w10, sxtw] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrsh w3, [sp, x5] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrsh w9, [x27, x6] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrh w10, [x30, x7, lsl #1] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - strh w11, [x29, x3, sxtx] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrh w12, [x28, xzr, sxtx] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrsh x13, [x27, x5, sxtx #1] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrh w14, [x26, w6, uxtw] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrh w15, [x25, w7, uxtw] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrsh w16, [x24, w8, uxtw #1] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrh w17, [x23, w9, sxtw] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrh w18, [x22, w10, sxtw] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - strh w19, [x21, wzr, sxtw #1] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr w3, [sp, x5] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr s9, [x27, x6] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr w10, [x30, x7, lsl #2] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr w11, [x29, x3, sxtx] +# CHECK-NEXT: - - - 0.50 0.50 - - - 0.50 0.50 str s12, [x28, xzr, sxtx] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - str w13, [x27, x5, sxtx #2] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - str w14, [x26, w6, uxtw] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr w15, [x25, w7, uxtw] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr w16, [x24, w8, uxtw #2] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrsw x17, [x23, w9, sxtw] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr w18, [x22, w10, sxtw] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldrsw x19, [x21, wzr, sxtw #2] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr x3, [sp, x5] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - str x9, [x27, x6] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr d10, [x30, x7, lsl #3] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - str x11, [x29, x3, sxtx] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr x12, [x28, xzr, sxtx] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr x13, [x27, x5, sxtx #3] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - prfm pldl1keep, [x26, w6, uxtw] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr x15, [x25, w7, uxtw] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr x16, [x24, w8, uxtw #3] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr x17, [x23, w9, sxtw] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldr x18, [x22, w10, sxtw] +# CHECK-NEXT: - - - 0.50 0.50 - - - 0.50 0.50 str d19, [x21, wzr, sxtw #3] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr q3, [sp, x5] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr q9, [x27, x6] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr q10, [x30, x7, lsl #4] +# CHECK-NEXT: - - - 1.00 1.00 - - - 1.00 1.00 str q11, [x29, x3, sxtx] +# CHECK-NEXT: - - - 1.00 1.00 - - - 1.00 1.00 str q12, [x28, xzr, sxtx] +# CHECK-NEXT: - - - 1.00 1.00 - - - 1.00 1.00 str q13, [x27, x5, sxtx #4] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr q14, [x26, w6, uxtw] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr q15, [x25, w7, uxtw] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr q16, [x24, w8, uxtw #4] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr q17, [x23, w9, sxtw] +# CHECK-NEXT: - - - 1.00 1.00 - - - 1.00 1.00 str q18, [x22, w10, sxtw] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldr q19, [x21, wzr, sxtw #4] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldp w3, w5, [sp] +# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - - - stp wzr, w9, [sp, #252] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldp w2, wzr, [sp, #-256] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldp w9, w10, [sp, #4] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldpsw x9, x10, [sp, #4] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldpsw x9, x10, [x2, #-256] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ldpsw x20, x30, [sp, #252] +# CHECK-NEXT: - - - 1.00 1.00 - - - - - ldp x21, x29, [x2, #504] +# CHECK-NEXT: - - - 1.00 1.00 - - - - - ldp x22, x23, [x3, #-512] +# CHECK-NEXT: - - - 1.00 1.00 - - - - - ldp x24, x25, [x4, #8] +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp s29, s28, [sp, #252] +# CHECK-NEXT: - - - 0.50 0.50 - - - 0.50 0.50 stp s27, s26, [sp, #-256] +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp s1, s2, [x3, #44] +# CHECK-NEXT: - - - 1.00 1.00 - - - 1.00 1.00 stp d3, d5, [x9, #504] +# CHECK-NEXT: - - - 1.00 1.00 - - - 1.00 1.00 stp d7, d11, [x10, #-512] +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp d2, d3, [x30, #-8] +# CHECK-NEXT: - - - 2.00 2.00 - - - 1.00 1.00 stp q3, q5, [sp] +# CHECK-NEXT: - - - 2.00 2.00 - - - 1.00 1.00 stp q17, q19, [sp, #1008] +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp q23, q29, [x1, #-1024] +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp w3, w5, [sp], #0 +# CHECK-NEXT: - 0.50 0.50 1.00 1.00 0.33 0.33 0.33 - - stp wzr, w9, [sp], #252 +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp w2, wzr, [sp], #-256 +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp w9, w10, [sp], #4 +# CHECK-NEXT: - - - 0.50 0.50 0.67 0.67 0.67 - - ldpsw x9, x10, [sp], #4 +# CHECK-NEXT: - - - 0.50 0.50 0.67 0.67 0.67 - - ldpsw x9, x10, [x2], #-256 +# CHECK-NEXT: - - - 0.50 0.50 0.67 0.67 0.67 - - ldpsw x20, x30, [sp], #252 +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp x21, x29, [x2], #504 +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp x22, x23, [x3], #-512 +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp x24, x25, [x4], #8 +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp s29, s28, [sp], #252 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 stp s27, s26, [sp], #-256 +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp s1, s2, [x3], #44 +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.00 1.00 stp d3, d5, [x9], #504 +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.00 1.00 stp d7, d11, [x10], #-512 +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp d2, d3, [x30], #-8 +# CHECK-NEXT: - - - 2.00 2.00 0.33 0.33 0.33 1.00 1.00 stp q3, q5, [sp], #0 +# CHECK-NEXT: - - - 2.00 2.00 0.33 0.33 0.33 1.00 1.00 stp q17, q19, [sp], #1008 +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp q23, q29, [x1], #-1024 +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp w3, w5, [sp, #0]! +# CHECK-NEXT: - 0.50 0.50 1.00 1.00 0.33 0.33 0.33 - - stp wzr, w9, [sp, #252]! +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp w2, wzr, [sp, #-256]! +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp w9, w10, [sp, #4]! +# CHECK-NEXT: - - - 0.50 0.50 0.67 0.67 0.67 - - ldpsw x9, x10, [sp, #4]! +# CHECK-NEXT: - - - 0.50 0.50 0.67 0.67 0.67 - - ldpsw x9, x10, [x2, #-256]! +# CHECK-NEXT: - - - 0.50 0.50 0.67 0.67 0.67 - - ldpsw x20, x30, [sp, #252]! +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp x21, x29, [x2, #504]! +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp x22, x23, [x3, #-512]! +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp x24, x25, [x4, #8]! +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp s29, s28, [sp, #252]! +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 stp s27, s26, [sp, #-256]! +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp s1, s2, [x3, #44]! +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.00 1.00 stp d3, d5, [x9, #504]! +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.00 1.00 stp d7, d11, [x10, #-512]! +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp d2, d3, [x30, #-8]! +# CHECK-NEXT: - - - 2.00 2.00 0.33 0.33 0.33 1.00 1.00 stp q3, q5, [sp, #0]! +# CHECK-NEXT: - - - 2.00 2.00 0.33 0.33 0.33 1.00 1.00 stp q17, q19, [sp, #1008]! +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldp q23, q29, [x1, #-1024]! +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldnp w3, w5, [sp] +# CHECK-NEXT: - 0.50 0.50 1.00 1.00 - - - - - stnp wzr, w9, [sp, #252] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldnp w2, wzr, [sp, #-256] +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ldnp w9, w10, [sp, #4] +# CHECK-NEXT: - - - 1.00 1.00 - - - - - ldnp x21, x29, [x2, #504] +# CHECK-NEXT: - - - 1.00 1.00 - - - - - ldnp x22, x23, [x3, #-512] +# CHECK-NEXT: - - - 1.00 1.00 - - - - - ldnp x24, x25, [x4, #8] +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldnp s29, s28, [sp, #252] +# CHECK-NEXT: - - - 0.50 0.50 - - - 0.50 0.50 stnp s27, s26, [sp, #-256] +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldnp s1, s2, [x3, #44] +# CHECK-NEXT: - - - 1.00 1.00 - - - 1.00 1.00 stnp d3, d5, [x9, #504] +# CHECK-NEXT: - - - 1.00 1.00 - - - 1.00 1.00 stnp d7, d11, [x10, #-512] +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ldnp d2, d3, [x30, #-8] +# CHECK-NEXT: - - - 2.00 2.00 - - - 1.00 1.00 stnp q3, q5, [sp] +# CHECK-NEXT: - - - 2.00 2.00 - - - 1.00 1.00 stnp q17, q19, [sp, #1008] +# CHECK-NEXT: - - - 1.00 1.00 - - - - - ldnp q23, q29, [x1, #-1024] +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - mov w3, #983055 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - mov x10, #-6148914691236517206 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - and w12, w23, w21 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - and w16, w15, w1, lsl #1 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - and w9, w4, w10, lsl #31 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - and w3, w30, w11 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - and x3, x5, x7, lsl #63 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - and x5, x14, x19, asr #4 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - and w3, w17, w19, ror #31 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - and w0, w2, wzr, lsr #17 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - and w3, w30, w11, asr #2 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - and xzr, x4, x26 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - and w3, wzr, w20, ror #2 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - and x7, x20, xzr, asr #63 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - bic x13, x20, x14, lsl #47 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - bic w2, w7, w9 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - orr w2, w7, w0, asr #31 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - orr x8, x9, x10, lsl #12 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - orn x3, x5, x7, asr #2 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - orn w2, w5, w29 +# CHECK-NEXT: - - - - - 1.00 - - - - ands w7, wzr, w9, lsl #1 +# CHECK-NEXT: - - - - - 1.00 - - - - ands x3, x5, x20, ror #63 +# CHECK-NEXT: - - - - - 1.00 - - - - bics w3, w5, w7 +# CHECK-NEXT: - - - - - 1.00 - - - - bics x3, xzr, x3, lsl #1 +# CHECK-NEXT: - - - - - 1.00 - - - - tst w3, w7, lsl #31 +# CHECK-NEXT: - - - - - 1.00 - - - - tst x2, x20, asr #2 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - mov x3, x6 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - mov x3, xzr +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - mov wzr, w2 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - mov w3, w5 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - movz w2, #0, lsl #16 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - mov w2, #-1235 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - mov x2, #5299989643264 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - mov x2, #0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - movk w3, #0 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - movz x4, #0, lsl #16 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - movk w5, #0, lsl #16 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - movz x6, #0, lsl #32 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - movk x7, #0, lsl #32 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - movz x8, #0, lsl #48 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - movk x9, #0, lsl #48 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adr x2, #1600 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adrp x21, #6553600 +# CHECK-NEXT: - - - - - 0.33 0.33 0.33 - - adr x0, #262144 +# CHECK-NEXT: 1.00 - - - - - - - - - tbz x12, #62, #0 +# CHECK-NEXT: 1.00 - - - - - - - - - tbz x12, #62, #4 +# CHECK-NEXT: 1.00 - - - - - - - - - tbz x12, #62, #-32768 +# CHECK-NEXT: 1.00 - - - - - - - - - tbnz x12, #60, #32764 +# CHECK-NEXT: 1.00 - - - - - - - - - b #4 +# CHECK-NEXT: 1.00 - - - - - - - - - b #-4 +# CHECK-NEXT: 1.00 - - - - - - - - - b #134217724 +# CHECK-NEXT: 1.00 - - - - - - - - - br x20 +# CHECK-NEXT: 1.00 - - - - 0.33 0.33 0.33 - - blr xzr +# CHECK-NEXT: 1.00 - - - - - - - - - ret x10 +# CHECK-NEXT: 1.00 - - - - - - - - - ret +# CHECK-NEXT: 1.00 - - - - - - - - - eret +# CHECK-NEXT: 1.00 - - - - - - - - - drps diff --git a/llvm/test/tools/llvm-mca/AArch64/Neoverse/N1-neon-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Neoverse/N1-neon-instructions.s new file mode 100644 --- /dev/null +++ b/llvm/test/tools/llvm-mca/AArch64/Neoverse/N1-neon-instructions.s @@ -0,0 +1,3233 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=aarch64 -mcpu=neoverse-n1 -instruction-tables < %s | FileCheck %s + +abs d29, d24 +abs v0.16b, v0.16b +abs v0.2d, v0.2d +abs v0.2s, v0.2s +abs v0.4h, v0.4h +abs v0.4s, v0.4s +abs v0.8b, v0.8b +abs v0.8h, v0.8h +add d17, d31, d29 +add v0.8b, v0.8b, v0.8b +addhn v0.2s, v0.2d, v0.2d +addhn v0.4h, v0.4s, v0.4s +addhn v0.8b, v0.8h, v0.8h +addhn2 v0.16b, v0.8h, v0.8h +addhn2 v0.4s, v0.2d, v0.2d +addhn2 v0.8h, v0.4s, v0.4s +addp v0.2d, v0.2d, v0.2d +addp v0.8b, v0.8b, v0.8b +and v0.8b, v0.8b, v0.8b +bic v0.4h, #15, lsl #8 +bic v0.8b, v0.8b, v0.8b +bif v0.16b, v0.16b, v0.16b +bit v0.16b, v0.16b, v0.16b +bsl v0.8b, v0.8b, v0.8b +cls v0.16b, v0.16b +cls v0.2s, v0.2s +cls v0.4h, v0.4h +cls v0.4s, v0.4s +cls v0.8b, v0.8b +cls v0.8h, v0.8h +clz v0.16b, v0.16b +clz v0.2s, v0.2s +clz v0.4h, v0.4h +clz v0.4s, v0.4s +clz v0.8b, v0.8b +clz v0.8h, v0.8h +cmeq d20, d21, 0 +cmeq d20, d21, d22 +cmeq v0.16b, v0.16b, 0 +cmeq v0.16b, v0.16b, v0.16b +cmge d20, d21, 0 +cmge d20, d21, d22 +cmge v0.4h, v0.4h, v0.4h +cmge v0.8b, v0.8b, 0 +cmgt d20, d21, 0 +cmgt d20, d21, d22 +cmgt v0.2s, v0.2s, 0 +cmgt v0.4s, v0.4s, v0.4s +cmhi d20, d21, d22 +cmhi v0.8h, v0.8h, v0.8h +cmhs d20, d21, d22 +cmhs v0.8b, v0.8b, v0.8b +cmle d20, d21, 0 +cmle v0.2d, v0.2d, 0 +cmlt d20, d21, 0 +cmlt v0.8h, v0.8h, 0 +cmtst d20, d21, d22 +cmtst v0.2s, v0.2s, v0.2s +cnt v0.16b, v0.16b +cnt v0.8b, v0.8b +dup v0.16b,w28 +dup v0.2d,x28 +dup v0.2s,w28 +dup v0.4h,w28 +dup v0.4s,w28 +dup v0.8b,w28 +dup v0.8h,w28 +eor v0.16b, v0.16b, v0.16b +ext v0.16b, v0.16b, v0.16b, #3 +ext v0.8b, v0.8b, v0.8b, #3 +fabd d29, d24, d20 +fabd s29, s24, s20 +fabd v0.4s, v0.4s, v0.4s +fabs v0.2d, v0.2d +fabs v0.2s, v0.2s +fabs v0.4h, v0.4h +fabs v0.4s, v0.4s +fabs v0.8h, v0.8h +facge d20, d21, d22 +facge s10, s11, s12 +facge v0.4s, v0.4s, v0.4s +facgt d20, d21, d22 +facgt s10, s11, s12 +facgt v0.2d, v0.2d, v0.2d +fadd v0.4s, v0.4s, v0.4s +faddp v0.2s, v0.2s, v0.2s +faddp v0.4s, v0.4s, v0.4s +fcmeq d20, d21, #0.0 +fcmeq d20, d21, d22 +fcmeq s10, s11, #0.0 +fcmeq s10, s11, s12 +fcmeq v0.2s, v0.2s, #0.0 +fcmeq v0.2s, v0.2s, v0.2s +fcmge d20, d21, #0.0 +fcmge d20, d21, d22 +fcmge s10, s11, #0.0 +fcmge s10, s11, s12 +fcmge v0.2d, v0.2d, #0.0 +fcmge v0.4s, v0.4s, v0.4s +fcmgt d20, d21, #0.0 +fcmgt d20, d21, d22 +fcmgt s10, s11, #0.0 +fcmgt s10, s11, s12 +fcmgt v0.4s, v0.4s, #0.0 +fcmgt v0.4s, v0.4s, v0.4s +fcmle d20, d21, #0.0 +fcmle s10, s11, #0.0 +fcmle v0.2d, v0.2d, #0.0 +fcmlt d20, d21, #0.0 +fcmlt s10, s11, #0.0 +fcmlt v0.4s, v0.4s, #0.0 +fcvtas d21, d14 +fcvtas s12, s13 +fcvtas v0.2d, v0.2d +fcvtas v0.2s, v0.2s +fcvtas v0.4h, v0.4h +fcvtas v0.4s, v0.4s +fcvtas v0.8h, v0.8h +fcvtau d21, d14 +fcvtau s12, s13 +fcvtau v0.2d, v0.2d +fcvtau v0.2s, v0.2s +fcvtau v0.4h, v0.4h +fcvtau v0.4s, v0.4s +fcvtau v0.8h, v0.8h +fcvtl v0.2d, v0.2s +fcvtl v0.4s, v0.4h +fcvtl2 v0.2d, v0.4s +fcvtl2 v0.4s, v0.8h +fcvtms d21, d14 +fcvtms s22, s13 +fcvtms v0.2d, v0.2d +fcvtms v0.2s, v0.2s +fcvtms v0.4h, v0.4h +fcvtms v0.4s, v0.4s +fcvtms v0.8h, v0.8h +fcvtmu d21, d14 +fcvtmu s12, s13 +fcvtmu v0.2d, v0.2d +fcvtmu v0.2s, v0.2s +fcvtmu v0.4h, v0.4h +fcvtmu v0.4s, v0.4s +fcvtmu v0.8h, v0.8h +fcvtn v0.2s, v0.2d +fcvtn v0.4h, v0.4s +fcvtn2 v0.4s, v0.2d +fcvtn2 v0.8h, v0.4s +fcvtns d21, d14 +fcvtns s22, s13 +fcvtns v0.2d, v0.2d +fcvtns v0.2s, v0.2s +fcvtns v0.4h, v0.4h +fcvtns v0.4s, v0.4s +fcvtns v0.8h, v0.8h +fcvtnu d21, d14 +fcvtnu s12, s13 +fcvtnu v0.2d, v0.2d +fcvtnu v0.2s, v0.2s +fcvtnu v0.4h, v0.4h +fcvtnu v0.4s, v0.4s +fcvtnu v0.8h, v0.8h +fcvtps d21, d14 +fcvtps s22, s13 +fcvtps v0.2d, v0.2d +fcvtps v0.2s, v0.2s +fcvtps v0.4h, v0.4h +fcvtps v0.4s, v0.4s +fcvtps v0.8h, v0.8h +fcvtpu d21, d14 +fcvtpu s12, s13 +fcvtpu v0.2d, v0.2d +fcvtpu v0.2s, v0.2s +fcvtpu v0.4h, v0.4h +fcvtpu v0.4s, v0.4s +fcvtpu v0.8h, v0.8h +fcvtxn s22, d13 +fcvtxn v0.2s, v0.2d +fcvtxn2 v0.4s, v0.2d +fcvtzs d21, d12, #1 +fcvtzs d21, d14 +fcvtzs s12, s13 +fcvtzs s21, s12, #1 +fcvtzs v0.2d, v0.2d +fcvtzs v0.2d, v0.2d, #3 +fcvtzs v0.2s, v0.2s +fcvtzs v0.2s, v0.2s, #3 +fcvtzs v0.4h, v0.4h +fcvtzs v0.4s, v0.4s +fcvtzs v0.4s, v0.4s, #3 +fcvtzs v0.8h, v0.8h +fcvtzu d21, d12, #1 +fcvtzu d21, d14 +fcvtzu s12, s13 +fcvtzu s21, s12, #1 +fcvtzu v0.2d, v0.2d +fcvtzu v0.2d, v0.2d, #3 +fcvtzu v0.2s, v0.2s +fcvtzu v0.2s, v0.2s, #3 +fcvtzu v0.4h, v0.4h +fcvtzu v0.4s, v0.4s +fcvtzu v0.4s, v0.4s, #3 +fcvtzu v0.8h, v0.8h +fdiv v0.2s, v0.2s, v0.2s +fmax v0.2d, v0.2d, v0.2d +fmax v0.2s, v0.2s, v0.2s +fmax v0.4s, v0.4s, v0.4s +fmaxnm v0.2d, v0.2d, v0.2d +fmaxnm v0.2s, v0.2s, v0.2s +fmaxnm v0.4s, v0.4s, v0.4s +fmaxnmp v0.2d, v0.2d, v0.2d +fmaxnmp v0.2s, v0.2s, v0.2s +fmaxnmp v0.4s, v0.4s, v0.4s +fmaxp v0.2d, v0.2d, v0.2d +fmaxp v0.2s, v0.2s, v0.2s +fmaxp v0.4s, v0.4s, v0.4s +fmin v0.2d, v0.2d, v0.2d +fmin v0.2s, v0.2s, v0.2s +fmin v0.4s, v0.4s, v0.4s +fminnm v0.2d, v0.2d, v0.2d +fminnm v0.2s, v0.2s, v0.2s +fminnm v0.4s, v0.4s, v0.4s +fminnmp v0.2d, v0.2d, v0.2d +fminnmp v0.2s, v0.2s, v0.2s +fminnmp v0.4s, v0.4s, v0.4s +fminp v0.2d, v0.2d, v0.2d +fminp v0.2s, v0.2s, v0.2s +fminp v0.4s, v0.4s, v0.4s +fmla d0, d1, v0.d[1] +fmla s0, s1, v0.s[3] +fmla v0.2s, v0.2s, v0.2s +fmls d0, d4, v0.d[1] +fmls s3, s5, v0.s[3] +fmls v0.2s, v0.2s, v0.2s +fmov v0.2d, #-1.25 +fmov v0.2s, #13.0 +fmov v0.4s, #1.0 +fmul d0, d1, v0.d[1] +fmul s0, s1, v0.s[3] +fmul v0.2s, v0.2s, v0.2s +fmulx d0, d4, v0.d[1] +fmulx d23, d11, d1 +fmulx s20, s22, s15 +fmulx s3, s5, v0.s[3] +fmulx v0.2d, v0.2d, v0.2d +fmulx v0.2s, v0.2s, v0.2s +fmulx v0.4s, v0.4s, v0.4s +fneg v0.2d, v0.2d +fneg v0.2s, v0.2s +fneg v0.4h, v0.4h +fneg v0.4s, v0.4s +fneg v0.8h, v0.8h +frecpe d13, d13 +frecpe s19, s14 +frecpe v0.2d, v0.2d +frecpe v0.2s, v0.2s +frecpe v0.4h, v0.4h +frecpe v0.4s, v0.4s +frecpe v0.8h, v0.8h +frecps v0.4s, v0.4s, v0.4s +frecps d22, d30, d21 +frecps s21, s16, s13 +frecpx d16, d19 +frecpx s18, s10 +frinta v0.2d, v0.2d +frinta v0.2s, v0.2s +frinta v0.4h, v0.4h +frinta v0.4s, v0.4s +frinta v0.8h, v0.8h +frinti v0.2d, v0.2d +frinti v0.2s, v0.2s +frinti v0.4h, v0.4h +frinti v0.4s, v0.4s +frinti v0.8h, v0.8h +frintm v0.2d, v0.2d +frintm v0.2s, v0.2s +frintm v0.4h, v0.4h +frintm v0.4s, v0.4s +frintm v0.8h, v0.8h +frintn v0.2d, v0.2d +frintn v0.2s, v0.2s +frintn v0.4h, v0.4h +frintn v0.4s, v0.4s +frintn v0.8h, v0.8h +frintp v0.2d, v0.2d +frintp v0.2s, v0.2s +frintp v0.4h, v0.4h +frintp v0.4s, v0.4s +frintp v0.8h, v0.8h +frintx v0.2d, v0.2d +frintx v0.2s, v0.2s +frintx v0.4h, v0.4h +frintx v0.4s, v0.4s +frintx v0.8h, v0.8h +frintz v0.2d, v0.2d +frintz v0.2s, v0.2s +frintz v0.4h, v0.4h +frintz v0.4s, v0.4s +frintz v0.8h, v0.8h +frsqrte d21, d12 +frsqrte s22, s13 +frsqrte v0.2d, v0.2d +frsqrte v0.2s, v0.2s +frsqrte v0.4h, v0.4h +frsqrte v0.4s, v0.4s +frsqrte v0.8h, v0.8h +frsqrts d8, d22, d18 +frsqrts s21, s5, s12 +frsqrts v0.2d, v0.2d, v0.2d +fsqrt v0.2d, v0.2d +fsqrt v0.2s, v0.2s +fsqrt v0.4h, v0.4h +fsqrt v0.4s, v0.4s +fsqrt v0.8h, v0.8h +fsub v0.2s, v0.2s, v0.2s +ld1 { v0.16b }, [x0] +ld1 { v0.2d, v1.2d, v2.2d }, [x0], #48 +ld1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0] +ld1 { v0.4s, v1.4s }, [sp], #32 +ld1 { v0.4s, v1.4s, v2.4s }, [sp] +ld1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3 +ld1 { v0.8h }, [x15], x2 +ld1 { v0.8h, v1.8h }, [x15] +ld1 { v0.b }[9], [x0] +ld1 { v0.b }[9], [x0], #1 +ld1r { v0.16b }, [x0] +ld1r { v0.16b }, [x0], #1 +ld1r { v0.8h }, [x15] +ld1r { v0.8h }, [x15], #2 +ld2 { v0.16b, v1.16b }, [x0], x1 +ld2 { v0.8b, v1.8b }, [x0] +ld2 { v0.h, v1.h }[7], [x15] +ld2 { v0.h, v1.h }[7], [x15], #4 +ld2r { v0.2d, v1.2d }, [x0] +ld2r { v0.2d, v1.2d }, [x0], #16 +ld2r { v0.4s, v1.4s }, [sp] +ld2r { v0.4s, v1.4s }, [sp], #8 +ld3 { v0.4h, v1.4h, v2.4h }, [x15] +ld3 { v0.8h, v1.8h, v2.8h }, [x15], x2 +ld3 { v0.s, v1.s, v2.s }[3], [sp] +ld3 { v0.s, v1.s, v2.s }[3], [sp], x3 +ld3r { v0.4h, v1.4h, v2.4h }, [x15] +ld3r { v0.4h, v1.4h, v2.4h }, [x15], #6 +ld3r { v0.8b, v1.8b, v2.8b }, [x0] +ld3r { v0.8b, v1.8b, v2.8b }, [x0], #3 +ld4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp] +ld4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64 +ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0] +ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0], #32 +ld4 { v0.h, v1.h, v2.h, v3.h }[7], [x0], x0 +ld4r { v0.1d, v1.1d, v2.1d, v3.1d }, [sp] +ld4r { v0.1d, v1.1d, v2.1d, v3.1d }, [sp], x7 +ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp] +ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp], x30 +mla v0.8b, v0.8b, v0.8b +mls v0.4h, v0.4h, v0.4h +mov b0, v0.b[15] +mov d6, v0.d[1] +mov h2, v0.h[5] +mov s17, v0.s[2] +mov v2.b[0], v0.b[0] +mov v2.h[1], v0.h[1] +mov v2.s[2], v0.s[2] +mov v2.d[1], v0.d[1] +mov v0.b[0], w8 +mov v0.h[1], w8 +mov v0.s[2], w8 +mov v0.d[1], x8 +mov v0.16b, v0.16b +mov v0.8b, v0.8b +movi d15, #0xff00ff00ff00ff +movi v0.16b, #31 +movi v0.2d, #0xff0000ff0000ffff +movi v0.2s, #8, msl #8 +movi v0.4s, #255, lsl #24 +movi v0.8b, #255 +mul v0.8b, v0.8b, v0.8b +mvni v0.2s, 0 +mvni v0.4s, #16, msl #16 +neg d29, d24 +neg v0.16b, v0.16b +neg v0.2d, v0.2d +neg v0.2s, v0.2s +neg v0.4h, v0.4h +neg v0.4s, v0.4s +neg v0.8b, v0.8b +neg v0.8h, v0.8h +not v0.16b, v0.16b +not v0.8b, v0.8b +orn v0.16b, v0.16b, v0.16b +orr v0.16b, v0.16b, v0.16b +orr v0.8h, #31 +pmul v0.16b, v0.16b, v0.16b +pmul v0.8b, v0.8b, v0.8b +pmull v0.8h, v0.8b, v0.8b +pmull2 v0.8h, v0.16b, v0.16b +raddhn v0.2s, v0.2d, v0.2d +raddhn v0.4h, v0.4s, v0.4s +raddhn v0.8b, v0.8h, v0.8h +raddhn2 v0.16b, v0.8h, v0.8h +raddhn2 v0.4s, v0.2d, v0.2d +raddhn2 v0.8h, v0.4s, v0.4s +rbit v0.16b, v0.16b +rbit v0.8b, v0.8b +rev16 v21.8b, v1.8b +rev16 v30.16b, v31.16b +rev32 v0.4h, v9.4h +rev32 v21.8b, v1.8b +rev32 v30.16b, v31.16b +rev32 v4.8h, v7.8h +rev64 v0.16b, v31.16b +rev64 v1.8b, v9.8b +rev64 v13.4h, v21.4h +rev64 v2.8h, v4.8h +rev64 v4.2s, v0.2s +rev64 v6.4s, v8.4s +rshrn v0.2s, v0.2d, #3 +rshrn v0.4h, v0.4s, #3 +rshrn v0.8b, v0.8h, #3 +rshrn2 v0.16b, v0.8h, #3 +rshrn2 v0.4s, v0.2d, #3 +rshrn2 v0.8h, v0.4s, #3 +rsubhn v0.2s, v0.2d, v0.2d +rsubhn v0.4h, v0.4s, v0.4s +rsubhn v0.8b, v0.8h, v0.8h +rsubhn2 v0.16b, v0.8h, v0.8h +rsubhn2 v0.4s, v0.2d, v0.2d +rsubhn2 v0.8h, v0.4s, v0.4s +saba v0.16b, v0.16b, v0.16b +sabal v0.2d, v0.2s, v0.2s +sabal v0.4s, v0.4h, v0.4h +sabal v0.8h, v0.8b, v0.8b +sabal2 v0.2d, v0.4s, v0.4s +sabal2 v0.4s, v0.8h, v0.8h +sabal2 v0.8h, v0.16b, v0.16b +sabd v0.4h, v0.4h, v0.4h +sabdl v0.2d, v0.2s, v0.2s +sabdl v0.4s, v0.4h, v0.4h +sabdl v0.8h, v0.8b, v0.8b +sabdl2 v0.2d, v0.4s, v0.4s +sabdl2 v0.4s, v0.8h, v0.8h +sabdl2 v0.8h, v0.16b, v0.16b +sadalp v0.1d, v0.2s +sadalp v0.2d, v0.4s +sadalp v0.2s, v0.4h +sadalp v0.4h, v0.8b +sadalp v0.4s, v0.8h +sadalp v0.8h, v0.16b +saddl v0.2d, v0.2s, v0.2s +saddl v0.4s, v0.4h, v0.4h +saddl v0.8h, v0.8b, v0.8b +saddl2 v0.2d, v0.4s, v0.4s +saddl2 v0.4s, v0.8h, v0.8h +saddl2 v0.8h, v0.16b, v0.16b +saddlp v0.1d, v0.2s +saddlp v0.2d, v0.4s +saddlp v0.2s, v0.4h +saddlp v0.4h, v0.8b +saddlp v0.4s, v0.8h +saddlp v0.8h, v0.16b +saddw v0.2d, v0.2d, v0.2s +saddw v0.4s, v0.4s, v0.4h +saddw v0.8h, v0.8h, v0.8b +saddw2 v0.2d, v0.2d, v0.4s +saddw2 v0.4s, v0.4s, v0.8h +saddw2 v0.8h, v0.8h, v0.16b +scvtf d21, d12 +scvtf d21, d12, #64 +scvtf s22, s13 +scvtf s22, s13, #32 +scvtf v0.2d, v0.2d +scvtf v0.2d, v0.2d, #3 +scvtf v0.2s, v0.2s +scvtf v0.2s, v0.2s, #3 +scvtf v0.4h, v0.4h +scvtf v0.4s, v0.4s +scvtf v0.4s, v0.4s, #3 +scvtf v0.8h, v0.8h +shadd v0.8b, v0.8b, v0.8b +shl d7, d10, #12 +shl v0.16b, v0.16b, #3 +shl v0.2d, v0.2d, #3 +shl v0.4h, v0.4h, #3 +shl v0.4s, v0.4s, #3 +shll v0.2d, v0.2s, #32 +shll v0.4s, v0.4h, #16 +shll v0.8h, v0.8b, #8 +shll v0.2d, v0.2s, #32 +shll v0.4s, v0.4h, #16 +shll v0.8h, v0.8b, #8 +shll2 v0.2d, v0.4s, #32 +shll2 v0.4s, v0.8h, #16 +shll2 v0.8h, v0.16b, #8 +shll2 v0.2d, v0.4s, #32 +shll2 v0.4s, v0.8h, #16 +shll2 v0.8h, v0.16b, #8 +shrn v0.2s, v0.2d, #3 +shrn v0.4h, v0.4s, #3 +shrn v0.8b, v0.8h, #3 +shrn2 v0.16b, v0.8h, #3 +shrn2 v0.4s, v0.2d, #3 +shrn2 v0.8h, v0.4s, #3 +shsub v0.2s, v0.2s, v0.2s +shsub v0.4h, v0.4h, v0.4h +sli d10, d14, #12 +sli v0.16b, v0.16b, #3 +sli v0.2d, v0.2d, #3 +sli v0.2s, v0.2s, #3 +sli v0.4h, v0.4h, #3 +sli v0.4s, v0.4s, #3 +sli v0.8b, v0.8b, #3 +sli v0.8h, v0.8h, #3 +smax v0.2s, v0.2s, v0.2s +smax v0.4h, v0.4h, v0.4h +smax v0.8b, v0.8b, v0.8b +smaxp v0.2s, v0.2s, v0.2s +smaxp v0.4h, v0.4h, v0.4h +smaxp v0.8b, v0.8b, v0.8b +smin v0.16b, v0.16b, v0.16b +smin v0.4s, v0.4s, v0.4s +smin v0.8h, v0.8h, v0.8h +sminp v0.16b, v0.16b, v0.16b +sminp v0.4s, v0.4s, v0.4s +sminp v0.8h, v0.8h, v0.8h +smlal v0.2d, v0.2s, v0.2s +smlal v0.4s, v0.4h, v0.4h +smlal v0.8h, v0.8b, v0.8b +smlal2 v0.2d, v0.4s, v0.4s +smlal2 v0.4s, v0.8h, v0.8h +smlal2 v0.8h, v0.16b, v0.16b +smlsl v0.2d, v0.2s, v0.2s +smlsl v0.4s, v0.4h, v0.4h +smlsl v0.8h, v0.8b, v0.8b +smlsl2 v0.2d, v0.4s, v0.4s +smlsl2 v0.4s, v0.8h, v0.8h +smlsl2 v0.8h, v0.16b, v0.16b +smull v0.2d, v0.2s, v0.2s +smull v0.4s, v0.4h, v0.4h +smull v0.8h, v0.8b, v0.8b +smull2 v0.2d, v0.4s, v0.4s +smull2 v0.4s, v0.8h, v0.8h +smull2 v0.8h, v0.16b, v0.16b +sqabs b19, b14 +sqabs d18, d12 +sqabs h21, h15 +sqabs s20, s12 +sqabs v0.16b, v0.16b +sqabs v0.2d, v0.2d +sqabs v0.2s, v0.2s +sqabs v0.4h, v0.4h +sqabs v0.4s, v0.4s +sqabs v0.8b, v0.8b +sqabs v0.8h, v0.8h +sqadd b20, b11, b15 +sqadd v0.16b, v0.16b, v0.16b +sqadd v0.2s, v0.2s, v0.2s +sqdmlal d19, s24, s12 +sqdmlal d8, s9, v0.s[1] +sqdmlal s0, h0, v0.h[3] +sqdmlal s17, h27, h12 +sqdmlal v0.2d, v0.2s, v0.2s +sqdmlal v0.4s, v0.4h, v0.4h +sqdmlal2 v0.2d, v0.4s, v0.4s +sqdmlal2 v0.4s, v0.8h, v0.8h +sqdmlsl d12, s23, s13 +sqdmlsl d8, s9, v0.s[1] +sqdmlsl s0, h0, v0.h[3] +sqdmlsl s14, h12, h25 +sqdmlsl v0.2d, v0.2s, v0.2s +sqdmlsl v0.4s, v0.4h, v0.4h +sqdmlsl2 v0.2d, v0.4s, v0.4s +sqdmlsl2 v0.4s, v0.8h, v0.8h +sqdmulh h10, h11, h12 +sqdmulh h7, h15, v0.h[3] +sqdmulh s15, s14, v0.s[1] +sqdmulh s20, s21, s2 +sqdmulh v0.2s, v0.2s, v0.2s +sqdmulh v0.4s, v0.4s, v0.4s +sqdmull d1, s1, v0.s[1] +sqdmull d15, s22, s12 +sqdmull s1, h1, v0.h[3] +sqdmull s12, h22, h12 +sqdmull v0.2d, v0.2s, v0.2s +sqdmull v0.4s, v0.4h, v0.4h +sqdmull2 v0.2d, v0.4s, v0.4s +sqdmull2 v0.4s, v0.8h, v0.8h +sqneg b19, b14 +sqneg d18, d12 +sqneg h21, h15 +sqneg s20, s12 +sqneg v0.16b, v0.16b +sqneg v0.2d, v0.2d +sqneg v0.2s, v0.2s +sqneg v0.4h, v0.4h +sqneg v0.4s, v0.4s +sqneg v0.8b, v0.8b +sqneg v0.8h, v0.8h +sqrdmulh h10, h11, h12 +sqrdmulh h7, h15, v0.h[3] +sqrdmulh s15, s14, v0.s[1] +sqrdmulh s20, s21, s2 +sqrdmulh v0.4h, v0.4h, v0.4h +sqrdmulh v0.8h, v0.8h, v0.8h +sqrshl d31, d31, d31 +sqrshl h3, h4, h15 +sqrshl v0.2s, v0.2s, v0.2s +sqrshl v0.4h, v0.4h, v0.4h +sqrshl v0.8b, v0.8b, v0.8b +sqrshrn b10, h13, #2 +sqrshrn h15, s10, #6 +sqrshrn s15, d12, #9 +sqrshrn v0.2s, v0.2d, #3 +sqrshrn v0.4h, v0.4s, #3 +sqrshrn v0.8b, v0.8h, #3 +sqrshrn2 v0.16b, v0.8h, #3 +sqrshrn2 v0.4s, v0.2d, #3 +sqrshrn2 v0.8h, v0.4s, #3 +sqrshrun b17, h10, #6 +sqrshrun h10, s13, #15 +sqrshrun s22, d16, #31 +sqrshrun v0.2s, v0.2d, #3 +sqrshrun v0.4h, v0.4s, #3 +sqrshrun v0.8b, v0.8h, #3 +sqrshrun2 v0.16b, v0.8h, #3 +sqrshrun2 v0.4s, v0.2d, #3 +sqrshrun2 v0.8h, v0.4s, #3 +sqshl b11, b19, #7 +sqshl d15, d16, #51 +sqshl d31, d31, d31 +sqshl h13, h18, #11 +sqshl h3, h4, h15 +sqshl s14, s17, #22 +sqshl v0.16b, v0.16b, #3 +sqshl v0.2d, v0.2d, #3 +sqshl v0.2s, v0.2s, #3 +sqshl v0.2s, v0.2s, v0.2s +sqshl v0.4h, v0.4h, #3 +sqshl v0.4h, v0.4h, v0.4h +sqshl v0.4s, v0.4s, #3 +sqshl v0.8b, v0.8b, #3 +sqshl v0.8b, v0.8b, v0.8b +sqshl v0.8h, v0.8h, #3 +sqshlu b15, b18, #6 +sqshlu d11, d13, #32 +sqshlu h19, h17, #6 +sqshlu s16, s14, #25 +sqshlu v0.16b, v0.16b, #3 +sqshlu v0.2d, v0.2d, #3 +sqshlu v0.2s, v0.2s, #3 +sqshlu v0.4h, v0.4h, #3 +sqshlu v0.4s, v0.4s, #3 +sqshlu v0.8b, v0.8b, #3 +sqshlu v0.8h, v0.8h, #3 +sqshrn b10, h15, #5 +sqshrn h17, s10, #4 +sqshrn s18, d10, #31 +sqshrn v0.2s, v0.2d, #3 +sqshrn v0.4h, v0.4s, #3 +sqshrn v0.8b, v0.8h, #3 +sqshrn2 v0.16b, v0.8h, #3 +sqshrn2 v0.4s, v0.2d, #3 +sqshrn2 v0.8h, v0.4s, #3 +sqshrun b15, h10, #7 +sqshrun h20, s14, #3 +sqshrun s10, d15, #15 +sqshrun v0.2s, v0.2d, #3 +sqshrun v0.4h, v0.4s, #3 +sqshrun v0.8b, v0.8h, #3 +sqshrun2 v0.16b, v0.8h, #3 +sqshrun2 v0.4s, v0.2d, #3 +sqshrun2 v0.8h, v0.4s, #3 +sqsub s20, s10, s7 +sqsub v0.2d, v0.2d, v0.2d +sqsub v0.4s, v0.4s, v0.4s +sqsub v0.8b, v0.8b, v0.8b +sqxtn b18, h18 +sqxtn h20, s17 +sqxtn s19, d14 +sqxtn v0.2s, v0.2d +sqxtn v0.4h, v0.4s +sqxtn v0.8b, v0.8h +sqxtn2 v0.16b, v0.8h +sqxtn2 v0.4s, v0.2d +sqxtn2 v0.8h, v0.4s +sqxtun b19, h14 +sqxtun h21, s15 +sqxtun s20, d12 +sqxtun v0.2s, v0.2d +sqxtun v0.4h, v0.4s +sqxtun v0.8b, v0.8h +sqxtun2 v0.16b, v0.8h +sqxtun2 v0.4s, v0.2d +sqxtun2 v0.8h, v0.4s +srhadd v0.2s, v0.2s, v0.2s +srhadd v0.4h, v0.4h, v0.4h +srhadd v0.8b, v0.8b, v0.8b +sri d10, d12, #14 +sri v0.16b, v0.16b, #3 +sri v0.2d, v0.2d, #3 +sri v0.2s, v0.2s, #3 +sri v0.4h, v0.4h, #3 +sri v0.4s, v0.4s, #3 +sri v0.8b, v0.8b, #3 +sri v0.8h, v0.8h, #3 +srshl d16, d16, d16 +srshl v0.2s, v0.2s, v0.2s +srshl v0.4h, v0.4h, v0.4h +srshl v0.8b, v0.8b, v0.8b +srshr d19, d18, #7 +srshr v0.16b, v0.16b, #3 +srshr v0.2d, v0.2d, #3 +srshr v0.2s, v0.2s, #3 +srshr v0.4h, v0.4h, #3 +srshr v0.4s, v0.4s, #3 +srshr v0.8b, v0.8b, #3 +srshr v0.8h, v0.8h, #3 +srsra d15, d11, #19 +srsra v0.16b, v0.16b, #3 +srsra v0.2d, v0.2d, #3 +srsra v0.2s, v0.2s, #3 +srsra v0.4h, v0.4h, #3 +srsra v0.4s, v0.4s, #3 +srsra v0.8b, v0.8b, #3 +srsra v0.8h, v0.8h, #3 +sshl d31, d31, d31 +sshl v0.2d, v0.2d, v0.2d +sshl v0.2s, v0.2s, v0.2s +sshl v0.4h, v0.4h, v0.4h +sshl v0.8b, v0.8b, v0.8b +sshll v0.2d, v0.2s, #3 +sshll2 v0.4s, v0.8h, #3 +sshr d15, d16, #12 +sshr v0.16b, v0.16b, #3 +sshr v0.2d, v0.2d, #3 +sshr v0.2s, v0.2s, #3 +sshr v0.4h, v0.4h, #3 +sshr v0.4s, v0.4s, #3 +sshr v0.8b, v0.8b, #3 +sshr v0.8h, v0.8h, #3 +ssra d18, d12, #21 +ssra v0.16b, v0.16b, #3 +ssra v0.2d, v0.2d, #3 +ssra v0.2s, v0.2s, #3 +ssra v0.4h, v0.4h, #3 +ssra v0.4s, v0.4s, #3 +ssra v0.8b, v0.8b, #3 +ssra v0.8h, v0.8h, #3 +ssubl v0.2d, v0.2s, v0.2s +ssubl v0.4s, v0.4h, v0.4h +ssubl v0.8h, v0.8b, v0.8b +ssubl2 v0.2d, v0.4s, v0.4s +ssubl2 v0.4s, v0.8h, v0.8h +ssubl2 v0.8h, v0.16b, v0.16b +ssubw v0.2d, v0.2d, v0.2s +ssubw v0.4s, v0.4s, v0.4h +ssubw v0.8h, v0.8h, v0.8b +ssubw2 v0.2d, v0.2d, v0.4s +ssubw2 v0.4s, v0.4s, v0.8h +ssubw2 v0.8h, v0.8h, v0.16b +st1 { v0.16b }, [x0] +st1 { v0.2d, v1.2d, v2.2d }, [x0], #48 +st1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0] +st1 { v0.4s, v1.4s }, [sp], #32 +st1 { v0.4s, v1.4s, v2.4s }, [sp] +st1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3 +st1 { v0.8h }, [x15], x2 +st1 { v0.8h, v1.8h }, [x15] +st1 { v0.d }[1], [x0] +st1 { v0.d }[1], [x0], #8 +st2 { v0.16b, v1.16b }, [x0], x1 +st2 { v0.8b, v1.8b }, [x0] +st2 { v0.s, v1.s }[3], [sp] +st2 { v0.s, v1.s }[3], [sp], #8 +st3 { v0.4h, v1.4h, v2.4h }, [x15] +st3 { v0.8h, v1.8h, v2.8h }, [x15], x2 +st3 { v0.h, v1.h, v2.h }[7], [x15] +st3 { v0.h, v1.h, v2.h }[7], [x15], #6 +st4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp] +st4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64 +st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0] +st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0], x5 +sub d15, d5, d16 +sub v0.2d, v0.2d, v0.2d +suqadd b19, b14 +suqadd d18, d22 +suqadd h20, h15 +suqadd s21, s12 +suqadd v0.16b, v0.16b +suqadd v0.2d, v0.2d +suqadd v0.2s, v0.2s +suqadd v0.4h, v0.4h +suqadd v0.4s, v0.4s +suqadd v0.8b, v0.8b +suqadd v0.8h, v0.8h +tbl v0.16b, { v0.16b }, v0.16b +tbl v0.16b, { v0.16b, v1.16b }, v0.16b +tbl v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b +tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b +tbl v0.8b, { v0.16b }, v0.8b +tbl v0.8b, { v0.16b, v1.16b }, v0.8b +tbl v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b +tbl v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b +tbx v0.16b, { v0.16b }, v0.16b +tbx v0.16b, { v0.16b, v1.16b }, v0.16b +tbx v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b +tbx v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b +tbx v0.8b, { v0.16b }, v0.8b +tbx v0.8b, { v0.16b, v1.16b }, v0.8b +tbx v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b +tbx v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b +trn1 v0.16b, v0.16b, v0.16b +trn1 v0.2d, v0.2d, v0.2d +trn1 v0.2s, v0.2s, v0.2s +trn1 v0.4h, v0.4h, v0.4h +trn1 v0.4s, v0.4s, v0.4s +trn1 v0.8b, v0.8b, v0.8b +trn1 v0.8h, v0.8h, v0.8h +trn2 v0.16b, v0.16b, v0.16b +trn2 v0.2d, v0.2d, v0.2d +trn2 v0.2s, v0.2s, v0.2s +trn2 v0.4h, v0.4h, v0.4h +trn2 v0.4s, v0.4s, v0.4s +trn2 v0.8b, v0.8b, v0.8b +trn2 v0.8h, v0.8h, v0.8h +uaba v0.8b, v0.8b, v0.8b +uabal v0.2d, v0.2s, v0.2s +uabal v0.4s, v0.4h, v0.4h +uabal v0.8h, v0.8b, v0.8b +uabal2 v0.2d, v0.4s, v0.4s +uabal2 v0.4s, v0.8h, v0.8h +uabal2 v0.8h, v0.16b, v0.16b +uabd v0.4h, v0.4h, v0.4h +uabdl v0.2d, v0.2s, v0.2s +uabdl v0.4s, v0.4h, v0.4h +uabdl v0.8h, v0.8b, v0.8b +uabdl2 v0.2d, v0.4s, v0.4s +uabdl2 v0.4s, v0.8h, v0.8h +uabdl2 v0.8h, v0.16b, v0.16b +uadalp v0.1d, v0.2s +uadalp v0.2d, v0.4s +uadalp v0.2s, v0.4h +uadalp v0.4h, v0.8b +uadalp v0.4s, v0.8h +uadalp v0.8h, v0.16b +uaddl v0.2d, v0.2s, v0.2s +uaddl v0.4s, v0.4h, v0.4h +uaddl v0.8h, v0.8b, v0.8b +uaddl2 v0.2d, v0.4s, v0.4s +uaddl2 v0.4s, v0.8h, v0.8h +uaddl2 v0.8h, v0.16b, v0.16b +uaddlp v0.1d, v0.2s +uaddlp v0.2d, v0.4s +uaddlp v0.2s, v0.4h +uaddlp v0.4h, v0.8b +uaddlp v0.4s, v0.8h +uaddlp v0.8h, v0.16b +uaddw v0.2d, v0.2d, v0.2s +uaddw v0.4s, v0.4s, v0.4h +uaddw v0.8h, v0.8h, v0.8b +uaddw2 v0.2d, v0.2d, v0.4s +uaddw2 v0.4s, v0.4s, v0.8h +uaddw2 v0.8h, v0.8h, v0.16b +ucvtf d21, d14 +ucvtf d21, d14, #64 +ucvtf s22, s13 +ucvtf s22, s13, #32 +ucvtf v0.2d, v0.2d +ucvtf v0.2d, v0.2d, #3 +ucvtf v0.2s, v0.2s +ucvtf v0.2s, v0.2s, #3 +ucvtf v0.4h, v0.4h +ucvtf v0.4s, v0.4s +ucvtf v0.4s, v0.4s, #3 +ucvtf v0.8h, v0.8h +uhadd v0.16b, v0.16b, v0.16b +uhadd v0.8h, v0.8h, v0.8h +uhsub v0.4s, v0.4s, v0.4s +umax v0.16b, v0.16b, v0.16b +umax v0.4s, v0.4s, v0.4s +umax v0.8h, v0.8h, v0.8h +umaxp v0.16b, v0.16b, v0.16b +umaxp v0.4s, v0.4s, v0.4s +umaxp v0.8h, v0.8h, v0.8h +umin v0.2s, v0.2s, v0.2s +umin v0.4h, v0.4h, v0.4h +umin v0.8b, v0.8b, v0.8b +uminp v0.2s, v0.2s, v0.2s +uminp v0.4h, v0.4h, v0.4h +uminp v0.8b, v0.8b, v0.8b +umlal v0.2d, v0.2s, v0.2s +umlal v0.4s, v0.4h, v0.4h +umlal v0.8h, v0.8b, v0.8b +umlal2 v0.2d, v0.4s, v0.4s +umlal2 v0.4s, v0.8h, v0.8h +umlal2 v0.8h, v0.16b, v0.16b +umlsl v0.2d, v0.2s, v0.2s +umlsl v0.4s, v0.4h, v0.4h +umlsl v0.8h, v0.8b, v0.8b +umlsl2 v0.2d, v0.4s, v0.4s +umlsl2 v0.4s, v0.8h, v0.8h +umlsl2 v0.8h, v0.16b, v0.16b +umull v0.2d, v0.2s, v0.2s +umull v0.4s, v0.4h, v0.4h +umull v0.8h, v0.8b, v0.8b +umull2 v0.2d, v0.4s, v0.4s +umull2 v0.4s, v0.8h, v0.8h +umull2 v0.8h, v0.16b, v0.16b +uqadd h0, h1, h5 +uqadd v0.8h, v0.8h, v0.8h +uqrshl b11, b20, b30 +uqrshl s23, s20, s16 +uqrshl v0.16b, v0.16b, v0.16b +uqrshl v0.4s, v0.4s, v0.4s +uqrshl v0.4s, v0.4s, v0.4s +uqrshl v0.8h, v0.8h, v0.8h +uqrshrn b10, h12, #5 +uqrshrn h12, s10, #14 +uqrshrn s10, d10, #25 +uqrshrn v0.2s, v0.2d, #3 +uqrshrn v0.4h, v0.4s, #3 +uqrshrn v0.8b, v0.8h, #3 +uqrshrn2 v0.16b, v0.8h, #3 +uqrshrn2 v0.4s, v0.2d, #3 +uqrshrn2 v0.8h, v0.4s, #3 +uqshl b11, b20, b30 +uqshl b18, b15, #6 +uqshl d15, d12, #19 +uqshl h11, h18, #7 +uqshl s14, s19, #18 +uqshl s23, s20, s16 +uqshl v0.16b, v0.16b, #3 +uqshl v0.16b, v0.16b, v0.16b +uqshl v0.2d, v0.2d, #3 +uqshl v0.2d, v0.2d, v0.2d +uqshl v0.2s, v0.2s, #3 +uqshl v0.4h, v0.4h, #3 +uqshl v0.4s, v0.4s, #3 +uqshl v0.4s, v0.4s, v0.4s +uqshl v0.8b, v0.8b, #3 +uqshl v0.8h, v0.8h, #3 +uqshl v0.8h, v0.8h, v0.8h +uqshrn b12, h10, #7 +uqshrn h10, s14, #5 +uqshrn s10, d12, #13 +uqshrn v0.2s, v0.2d, #3 +uqshrn v0.4h, v0.4s, #3 +uqshrn v0.8b, v0.8h, #3 +uqshrn2 v0.16b, v0.8h, #3 +uqshrn2 v0.4s, v0.2d, #3 +uqshrn2 v0.8h, v0.4s, #3 +uqsub d16, d16, d16 +uqsub v0.4h, v0.4h, v0.4h +uqxtn b18, h18 +uqxtn h20, s17 +uqxtn s19, d14 +uqxtn v0.2s, v0.2d +uqxtn v0.4h, v0.4s +uqxtn v0.8b, v0.8h +uqxtn2 v0.16b, v0.8h +uqxtn2 v0.4s, v0.2d +uqxtn2 v0.8h, v0.4s +urecpe v0.2s, v0.2s +urecpe v0.4s, v0.4s +urhadd v0.16b, v0.16b, v0.16b +urhadd v0.4s, v0.4s, v0.4s +urhadd v0.8h, v0.8h, v0.8h +urshl d8, d7, d4 +urshl v0.16b, v0.16b, v0.16b +urshl v0.2d, v0.2d, v0.2d +urshl v0.4s, v0.4s, v0.4s +urshl v0.8h, v0.8h, v0.8h +urshr d20, d23, #31 +urshr v0.16b, v0.16b, #3 +urshr v0.2d, v0.2d, #3 +urshr v0.2s, v0.2s, #3 +urshr v0.4h, v0.4h, #3 +urshr v0.4s, v0.4s, #3 +urshr v0.8b, v0.8b, #3 +urshr v0.8h, v0.8h, #3 +ursqrte v0.2s, v0.2s +ursqrte v0.4s, v0.4s +ursra d18, d10, #13 +ursra v0.16b, v0.16b, #3 +ursra v0.2d, v0.2d, #3 +ursra v0.2s, v0.2s, #3 +ursra v0.4h, v0.4h, #3 +ursra v0.4s, v0.4s, #3 +ursra v0.8b, v0.8b, #3 +ursra v0.8h, v0.8h, #3 +ushl d0, d0, d0 +ushl v0.16b, v0.16b, v0.16b +ushl v0.4s, v0.4s, v0.4s +ushl v0.8h, v0.8h, v0.8h +ushll v0.4s, v0.4h, #3 +ushll2 v0.8h, v0.16b, #3 +ushr d10, d17, #18 +ushr v0.16b, v0.16b, #3 +ushr v0.2d, v0.2d, #3 +ushr v0.2s, v0.2s, #3 +ushr v0.4h, v0.4h, #3 +ushr v0.4s, v0.4s, #3 +ushr v0.8b, v0.8b, #3 +ushr v0.8h, v0.8h, #3 +usqadd b19, b14 +usqadd d18, d22 +usqadd h20, h15 +usqadd s21, s12 +usqadd v0.16b, v0.16b +usqadd v0.2d, v0.2d +usqadd v0.2s, v0.2s +usqadd v0.4h, v0.4h +usqadd v0.4s, v0.4s +usqadd v0.8b, v0.8b +usqadd v0.8h, v0.8h +usra d20, d13, #61 +usra v0.16b, v0.16b, #3 +usra v0.2d, v0.2d, #3 +usra v0.2s, v0.2s, #3 +usra v0.4h, v0.4h, #3 +usra v0.4s, v0.4s, #3 +usra v0.8b, v0.8b, #3 +usra v0.8h, v0.8h, #3 +usubl v0.2d, v0.2s, v0.2s +usubl v0.4s, v0.4h, v0.4h +usubl v0.8h, v0.8b, v0.8b +usubl2 v0.2d, v0.4s, v0.4s +usubl2 v0.4s, v0.8h, v0.8h +usubl2 v0.8h, v0.16b, v0.16b +usubw v0.2d, v0.2d, v0.2s +usubw v0.4s, v0.4s, v0.4h +usubw v0.8h, v0.8h, v0.8b +usubw2 v0.2d, v0.2d, v0.4s +usubw2 v0.4s, v0.4s, v0.8h +usubw2 v0.8h, v0.8h, v0.16b +uzp1 v0.16b, v0.16b, v0.16b +uzp1 v0.2d, v0.2d, v0.2d +uzp1 v0.2s, v0.2s, v0.2s +uzp1 v0.4h, v0.4h, v0.4h +uzp1 v0.4s, v0.4s, v0.4s +uzp1 v0.8b, v0.8b, v0.8b +uzp1 v0.8h, v0.8h, v0.8h +uzp2 v0.16b, v0.16b, v0.16b +uzp2 v0.2d, v0.2d, v0.2d +uzp2 v0.2s, v0.2s, v0.2s +uzp2 v0.4h, v0.4h, v0.4h +uzp2 v0.4s, v0.4s, v0.4s +uzp2 v0.8b, v0.8b, v0.8b +uzp2 v0.8h, v0.8h, v0.8h +xtn v0.2s, v0.2d +xtn v0.4h, v0.4s +xtn v0.8b, v0.8h +xtn2 v0.16b, v0.8h +xtn2 v0.4s, v0.2d +xtn2 v0.8h, v0.4s +zip1 v0.16b, v0.16b, v0.16b +zip1 v0.2d, v0.2d, v0.2d +zip1 v0.2s, v0.2s, v0.2s +zip1 v0.4h, v0.4h, v0.4h +zip1 v0.4s, v0.4s, v0.4s +zip1 v0.8b, v0.8b, v0.8b +zip1 v0.8h, v0.8h, v0.8h +zip2 v0.16b, v0.16b, v0.16b +zip2 v0.2d, v0.2d, v0.2d +zip2 v0.2s, v0.2s, v0.2s +zip2 v0.4h, v0.4h, v0.4h +zip2 v0.4s, v0.4s, v0.4s +zip2 v0.8b, v0.8b, v0.8b +zip2 v0.8h, v0.8h, v0.8h + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 2 0.50 abs d29, d24 +# CHECK-NEXT: 1 2 0.50 abs v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 abs v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 abs v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 abs v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 abs v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 abs v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 abs v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 add d17, d31, d29 +# CHECK-NEXT: 1 2 0.50 add v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 addhn v0.2s, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 addhn v0.4h, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 addhn v0.8b, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 addhn2 v0.16b, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 addhn2 v0.4s, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 addhn2 v0.8h, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 addp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 addp v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 and v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 bic v0.4h, #15, lsl #8 +# CHECK-NEXT: 1 2 0.50 bic v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 bif v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 bit v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 bsl v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 cls v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 cls v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 cls v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 cls v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 cls v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 cls v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 clz v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 clz v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 clz v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 clz v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 clz v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 clz v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 cmeq d20, d21, #0 +# CHECK-NEXT: 1 2 0.50 cmeq d20, d21, d22 +# CHECK-NEXT: 1 2 0.50 cmeq v0.16b, v0.16b, #0 +# CHECK-NEXT: 1 2 0.50 cmeq v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 cmge d20, d21, #0 +# CHECK-NEXT: 1 2 0.50 cmge d20, d21, d22 +# CHECK-NEXT: 1 2 0.50 cmge v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 cmge v0.8b, v0.8b, #0 +# CHECK-NEXT: 1 2 0.50 cmgt d20, d21, #0 +# CHECK-NEXT: 1 2 0.50 cmgt d20, d21, d22 +# CHECK-NEXT: 1 2 0.50 cmgt v0.2s, v0.2s, #0 +# CHECK-NEXT: 1 2 0.50 cmgt v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 cmhi d20, d21, d22 +# CHECK-NEXT: 1 2 0.50 cmhi v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 cmhs d20, d21, d22 +# CHECK-NEXT: 1 2 0.50 cmhs v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 cmle d20, d21, #0 +# CHECK-NEXT: 1 2 0.50 cmle v0.2d, v0.2d, #0 +# CHECK-NEXT: 1 2 0.50 cmlt d20, d21, #0 +# CHECK-NEXT: 1 2 0.50 cmlt v0.8h, v0.8h, #0 +# CHECK-NEXT: 1 2 0.50 cmtst d20, d21, d22 +# CHECK-NEXT: 1 2 0.50 cmtst v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 cnt v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 cnt v0.8b, v0.8b +# CHECK-NEXT: 1 3 1.00 dup v0.16b, w28 +# CHECK-NEXT: 1 3 1.00 dup v0.2d, x28 +# CHECK-NEXT: 1 3 1.00 dup v0.2s, w28 +# CHECK-NEXT: 1 3 1.00 dup v0.4h, w28 +# CHECK-NEXT: 1 3 1.00 dup v0.4s, w28 +# CHECK-NEXT: 1 3 1.00 dup v0.8b, w28 +# CHECK-NEXT: 1 3 1.00 dup v0.8h, w28 +# CHECK-NEXT: 1 2 0.50 eor v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 ext v0.16b, v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 2 0.50 ext v0.8b, v0.8b, v0.8b, #3 +# CHECK-NEXT: 1 2 0.50 fabd d29, d24, d20 +# CHECK-NEXT: 1 2 0.50 fabd s29, s24, s20 +# CHECK-NEXT: 1 2 0.50 fabd v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 fabs v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 fabs v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 fabs v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 fabs v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 fabs v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 facge d20, d21, d22 +# CHECK-NEXT: 1 2 0.50 facge s10, s11, s12 +# CHECK-NEXT: 1 2 0.50 facge v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 facgt d20, d21, d22 +# CHECK-NEXT: 1 2 0.50 facgt s10, s11, s12 +# CHECK-NEXT: 1 2 0.50 facgt v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 fadd v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 faddp v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 faddp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 fcmeq d20, d21, #0.0 +# CHECK-NEXT: 1 2 0.50 fcmeq d20, d21, d22 +# CHECK-NEXT: 1 2 0.50 fcmeq s10, s11, #0.0 +# CHECK-NEXT: 1 2 0.50 fcmeq s10, s11, s12 +# CHECK-NEXT: 1 2 0.50 fcmeq v0.2s, v0.2s, #0.0 +# CHECK-NEXT: 1 2 0.50 fcmeq v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 fcmge d20, d21, #0.0 +# CHECK-NEXT: 1 2 0.50 fcmge d20, d21, d22 +# CHECK-NEXT: 1 2 0.50 fcmge s10, s11, #0.0 +# CHECK-NEXT: 1 2 0.50 fcmge s10, s11, s12 +# CHECK-NEXT: 1 2 0.50 fcmge v0.2d, v0.2d, #0.0 +# CHECK-NEXT: 1 2 0.50 fcmge v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 fcmgt d20, d21, #0.0 +# CHECK-NEXT: 1 2 0.50 fcmgt d20, d21, d22 +# CHECK-NEXT: 1 2 0.50 fcmgt s10, s11, #0.0 +# CHECK-NEXT: 1 2 0.50 fcmgt s10, s11, s12 +# CHECK-NEXT: 1 2 0.50 fcmgt v0.4s, v0.4s, #0.0 +# CHECK-NEXT: 1 2 0.50 fcmgt v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 fcmle d20, d21, #0.0 +# CHECK-NEXT: 1 2 0.50 fcmle s10, s11, #0.0 +# CHECK-NEXT: 1 2 0.50 fcmle v0.2d, v0.2d, #0.0 +# CHECK-NEXT: 1 2 0.50 fcmlt d20, d21, #0.0 +# CHECK-NEXT: 1 2 0.50 fcmlt s10, s11, #0.0 +# CHECK-NEXT: 1 2 0.50 fcmlt v0.4s, v0.4s, #0.0 +# CHECK-NEXT: 1 2 0.50 fcvtas d21, d14 +# CHECK-NEXT: 1 2 0.50 fcvtas s12, s13 +# CHECK-NEXT: 1 3 1.00 fcvtas v0.2d, v0.2d +# CHECK-NEXT: 1 3 1.00 fcvtas v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 fcvtas v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 fcvtas v0.4s, v0.4s +# CHECK-NEXT: 4 6 4.00 fcvtas v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 fcvtau d21, d14 +# CHECK-NEXT: 1 2 0.50 fcvtau s12, s13 +# CHECK-NEXT: 1 3 1.00 fcvtau v0.2d, v0.2d +# CHECK-NEXT: 1 3 1.00 fcvtau v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 fcvtau v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 fcvtau v0.4s, v0.4s +# CHECK-NEXT: 4 6 4.00 fcvtau v0.8h, v0.8h +# CHECK-NEXT: 1 3 1.00 fcvtl v0.2d, v0.2s +# CHECK-NEXT: 2 4 2.00 fcvtl v0.4s, v0.4h +# CHECK-NEXT: 1 3 1.00 fcvtl2 v0.2d, v0.4s +# CHECK-NEXT: 2 4 2.00 fcvtl2 v0.4s, v0.8h +# CHECK-NEXT: 1 2 0.50 fcvtms d21, d14 +# CHECK-NEXT: 1 2 0.50 fcvtms s22, s13 +# CHECK-NEXT: 1 3 1.00 fcvtms v0.2d, v0.2d +# CHECK-NEXT: 1 3 1.00 fcvtms v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 fcvtms v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 fcvtms v0.4s, v0.4s +# CHECK-NEXT: 4 6 4.00 fcvtms v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 fcvtmu d21, d14 +# CHECK-NEXT: 1 2 0.50 fcvtmu s12, s13 +# CHECK-NEXT: 1 3 1.00 fcvtmu v0.2d, v0.2d +# CHECK-NEXT: 1 3 1.00 fcvtmu v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 fcvtmu v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 fcvtmu v0.4s, v0.4s +# CHECK-NEXT: 4 6 4.00 fcvtmu v0.8h, v0.8h +# CHECK-NEXT: 1 3 1.00 fcvtn v0.2s, v0.2d +# CHECK-NEXT: 2 4 2.00 fcvtn v0.4h, v0.4s +# CHECK-NEXT: 1 3 1.00 fcvtn2 v0.4s, v0.2d +# CHECK-NEXT: 2 4 2.00 fcvtn2 v0.8h, v0.4s +# CHECK-NEXT: 1 2 0.50 fcvtns d21, d14 +# CHECK-NEXT: 1 2 0.50 fcvtns s22, s13 +# CHECK-NEXT: 1 3 1.00 fcvtns v0.2d, v0.2d +# CHECK-NEXT: 1 3 1.00 fcvtns v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 fcvtns v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 fcvtns v0.4s, v0.4s +# CHECK-NEXT: 4 6 4.00 fcvtns v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 fcvtnu d21, d14 +# CHECK-NEXT: 1 2 0.50 fcvtnu s12, s13 +# CHECK-NEXT: 1 3 1.00 fcvtnu v0.2d, v0.2d +# CHECK-NEXT: 1 3 1.00 fcvtnu v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 fcvtnu v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 fcvtnu v0.4s, v0.4s +# CHECK-NEXT: 4 6 4.00 fcvtnu v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 fcvtps d21, d14 +# CHECK-NEXT: 1 2 0.50 fcvtps s22, s13 +# CHECK-NEXT: 1 3 1.00 fcvtps v0.2d, v0.2d +# CHECK-NEXT: 1 3 1.00 fcvtps v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 fcvtps v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 fcvtps v0.4s, v0.4s +# CHECK-NEXT: 4 6 4.00 fcvtps v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 fcvtpu d21, d14 +# CHECK-NEXT: 1 2 0.50 fcvtpu s12, s13 +# CHECK-NEXT: 1 3 1.00 fcvtpu v0.2d, v0.2d +# CHECK-NEXT: 1 3 1.00 fcvtpu v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 fcvtpu v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 fcvtpu v0.4s, v0.4s +# CHECK-NEXT: 4 6 4.00 fcvtpu v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 fcvtxn s22, d13 +# CHECK-NEXT: 1 3 1.00 fcvtxn v0.2s, v0.2d +# CHECK-NEXT: 1 3 1.00 fcvtxn2 v0.4s, v0.2d +# CHECK-NEXT: 1 2 0.50 fcvtzs d21, d12, #1 +# CHECK-NEXT: 1 2 0.50 fcvtzs d21, d14 +# CHECK-NEXT: 1 2 0.50 fcvtzs s12, s13 +# CHECK-NEXT: 1 2 0.50 fcvtzs s21, s12, #1 +# CHECK-NEXT: 1 3 1.00 fcvtzs v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 fcvtzs v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 3 1.00 fcvtzs v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 fcvtzs v0.2s, v0.2s, #3 +# CHECK-NEXT: 2 4 2.00 fcvtzs v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 fcvtzs v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 fcvtzs v0.4s, v0.4s, #3 +# CHECK-NEXT: 4 6 4.00 fcvtzs v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 fcvtzu d21, d12, #1 +# CHECK-NEXT: 1 2 0.50 fcvtzu d21, d14 +# CHECK-NEXT: 1 2 0.50 fcvtzu s12, s13 +# CHECK-NEXT: 1 2 0.50 fcvtzu s21, s12, #1 +# CHECK-NEXT: 1 3 1.00 fcvtzu v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 fcvtzu v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 3 1.00 fcvtzu v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 fcvtzu v0.2s, v0.2s, #3 +# CHECK-NEXT: 2 4 2.00 fcvtzu v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 fcvtzu v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 fcvtzu v0.4s, v0.4s, #3 +# CHECK-NEXT: 4 6 4.00 fcvtzu v0.8h, v0.8h +# CHECK-NEXT: 1 10 7.00 fdiv v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 fmax v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 fmax v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 fmax v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 fmaxnm v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 fmaxnm v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 fmaxnm v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 fmaxnmp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 fmaxnmp v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 fmaxnmp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 fmaxp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 fmaxp v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 fmaxp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 fmin v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 fmin v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 fmin v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 fminnm v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 fminnm v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 fminnm v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 fminnmp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 fminnmp v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 fminnmp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 fminp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 fminp v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 fminp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 0.50 fmla d0, d1, v0.d[1] +# CHECK-NEXT: 1 4 0.50 fmla s0, s1, v0.s[3] +# CHECK-NEXT: 1 4 0.50 fmla v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 4 0.50 fmls d0, d4, v0.d[1] +# CHECK-NEXT: 1 4 0.50 fmls s3, s5, v0.s[3] +# CHECK-NEXT: 1 4 0.50 fmls v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 fmov v0.2d, #-1.25000000 +# CHECK-NEXT: 1 2 0.50 fmov v0.2s, #13.00000000 +# CHECK-NEXT: 1 2 0.50 fmov v0.4s, #1.00000000 +# CHECK-NEXT: 1 3 0.50 fmul d0, d1, v0.d[1] +# CHECK-NEXT: 1 3 0.50 fmul s0, s1, v0.s[3] +# CHECK-NEXT: 1 3 0.50 fmul v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 3 0.50 fmulx d0, d4, v0.d[1] +# CHECK-NEXT: 1 2 0.50 fmulx d23, d11, d1 +# CHECK-NEXT: 1 2 0.50 fmulx s20, s22, s15 +# CHECK-NEXT: 1 3 0.50 fmulx s3, s5, v0.s[3] +# CHECK-NEXT: 1 3 0.50 fmulx v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 3 0.50 fmulx v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 3 0.50 fmulx v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 fneg v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 fneg v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 fneg v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 fneg v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 fneg v0.8h, v0.8h +# CHECK-NEXT: 1 3 1.00 frecpe d13, d13 +# CHECK-NEXT: 1 3 1.00 frecpe s19, s14 +# CHECK-NEXT: 1 2 0.50 frecpe v0.2d, v0.2d +# CHECK-NEXT: 1 3 1.00 frecpe v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 frecpe v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 frecpe v0.4s, v0.4s +# CHECK-NEXT: 4 6 4.00 frecpe v0.8h, v0.8h +# CHECK-NEXT: 1 4 0.50 frecps v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 0.50 frecps d22, d30, d21 +# CHECK-NEXT: 1 4 0.50 frecps s21, s16, s13 +# CHECK-NEXT: 1 3 1.00 frecpx d16, d19 +# CHECK-NEXT: 1 3 1.00 frecpx s18, s10 +# CHECK-NEXT: 1 3 1.00 frinta v0.2d, v0.2d +# CHECK-NEXT: 1 3 1.00 frinta v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 frinta v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 frinta v0.4s, v0.4s +# CHECK-NEXT: 4 6 4.00 frinta v0.8h, v0.8h +# CHECK-NEXT: 1 3 1.00 frinti v0.2d, v0.2d +# CHECK-NEXT: 1 3 1.00 frinti v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 frinti v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 frinti v0.4s, v0.4s +# CHECK-NEXT: 4 6 4.00 frinti v0.8h, v0.8h +# CHECK-NEXT: 1 3 1.00 frintm v0.2d, v0.2d +# CHECK-NEXT: 1 3 1.00 frintm v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 frintm v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 frintm v0.4s, v0.4s +# CHECK-NEXT: 4 6 4.00 frintm v0.8h, v0.8h +# CHECK-NEXT: 1 3 1.00 frintn v0.2d, v0.2d +# CHECK-NEXT: 1 3 1.00 frintn v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 frintn v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 frintn v0.4s, v0.4s +# CHECK-NEXT: 4 6 4.00 frintn v0.8h, v0.8h +# CHECK-NEXT: 1 3 1.00 frintp v0.2d, v0.2d +# CHECK-NEXT: 1 3 1.00 frintp v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 frintp v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 frintp v0.4s, v0.4s +# CHECK-NEXT: 4 6 4.00 frintp v0.8h, v0.8h +# CHECK-NEXT: 1 3 1.00 frintx v0.2d, v0.2d +# CHECK-NEXT: 1 3 1.00 frintx v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 frintx v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 frintx v0.4s, v0.4s +# CHECK-NEXT: 4 6 4.00 frintx v0.8h, v0.8h +# CHECK-NEXT: 1 3 1.00 frintz v0.2d, v0.2d +# CHECK-NEXT: 1 3 1.00 frintz v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 frintz v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 frintz v0.4s, v0.4s +# CHECK-NEXT: 4 6 4.00 frintz v0.8h, v0.8h +# CHECK-NEXT: 1 3 1.00 frsqrte d21, d12 +# CHECK-NEXT: 1 3 1.00 frsqrte s22, s13 +# CHECK-NEXT: 1 2 0.50 frsqrte v0.2d, v0.2d +# CHECK-NEXT: 1 3 1.00 frsqrte v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 frsqrte v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 frsqrte v0.4s, v0.4s +# CHECK-NEXT: 4 6 4.00 frsqrte v0.8h, v0.8h +# CHECK-NEXT: 1 4 0.50 frsqrts d8, d22, d18 +# CHECK-NEXT: 1 4 0.50 frsqrts s21, s5, s12 +# CHECK-NEXT: 1 4 0.50 frsqrts v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 17 7.00 fsqrt v0.2d, v0.2d +# CHECK-NEXT: 1 10 7.00 fsqrt v0.2s, v0.2s +# CHECK-NEXT: 1 7 7.00 fsqrt v0.4h, v0.4h +# CHECK-NEXT: 1 10 7.00 fsqrt v0.4s, v0.4s +# CHECK-NEXT: 1 13 10.00 fsqrt v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 fsub v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 5 0.50 * ld1 { v0.16b }, [x0] +# CHECK-NEXT: 4 6 1.50 * ld1 { v0.2d, v1.2d, v2.2d }, [x0], #48 +# CHECK-NEXT: 4 6 2.00 * ld1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0] +# CHECK-NEXT: 3 5 1.00 * ld1 { v0.4s, v1.4s }, [sp], #32 +# CHECK-NEXT: 3 6 1.50 * ld1 { v0.4s, v1.4s, v2.4s }, [sp] +# CHECK-NEXT: 5 6 2.00 * ld1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3 +# CHECK-NEXT: 2 5 0.50 * ld1 { v0.8h }, [x15], x2 +# CHECK-NEXT: 2 5 1.00 * ld1 { v0.8h, v1.8h }, [x15] +# CHECK-NEXT: 2 7 0.50 * ld1 { v0.b }[9], [x0] +# CHECK-NEXT: 3 7 0.50 * ld1 { v0.b }[9], [x0], #1 +# CHECK-NEXT: 2 7 0.50 * ld1r { v0.16b }, [x0] +# CHECK-NEXT: 3 7 0.50 * ld1r { v0.16b }, [x0], #1 +# CHECK-NEXT: 2 7 0.50 * ld1r { v0.8h }, [x15] +# CHECK-NEXT: 3 7 0.50 * ld1r { v0.8h }, [x15], #2 +# CHECK-NEXT: 5 7 1.00 * ld2 { v0.16b, v1.16b }, [x0], x1 +# CHECK-NEXT: 4 7 1.00 * ld2 { v0.8b, v1.8b }, [x0] +# CHECK-NEXT: 4 7 1.00 * ld2 { v0.h, v1.h }[7], [x15] +# CHECK-NEXT: 5 7 1.00 * ld2 { v0.h, v1.h }[7], [x15], #4 +# CHECK-NEXT: 4 7 1.00 * ld2r { v0.2d, v1.2d }, [x0] +# CHECK-NEXT: 5 7 1.00 * ld2r { v0.2d, v1.2d }, [x0], #16 +# CHECK-NEXT: 4 7 1.00 * ld2r { v0.4s, v1.4s }, [sp] +# CHECK-NEXT: 5 7 1.00 * ld2r { v0.4s, v1.4s }, [sp], #8 +# CHECK-NEXT: 6 8 1.50 * ld3 { v0.4h, v1.4h, v2.4h }, [x15] +# CHECK-NEXT: 7 8 1.50 * ld3 { v0.8h, v1.8h, v2.8h }, [x15], x2 +# CHECK-NEXT: 5 7 1.50 * ld3 { v0.s, v1.s, v2.s }[3], [sp] +# CHECK-NEXT: 6 7 1.50 * ld3 { v0.s, v1.s, v2.s }[3], [sp], x3 +# CHECK-NEXT: 5 7 1.50 * ld3r { v0.4h, v1.4h, v2.4h }, [x15] +# CHECK-NEXT: 6 7 1.50 * ld3r { v0.4h, v1.4h, v2.4h }, [x15], #6 +# CHECK-NEXT: 5 7 1.50 * ld3r { v0.8b, v1.8b, v2.8b }, [x0] +# CHECK-NEXT: 6 7 1.50 * ld3r { v0.8b, v1.8b, v2.8b }, [x0], #3 +# CHECK-NEXT: 7 8 2.00 * ld4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp] +# CHECK-NEXT: 9 10 2.00 * ld4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64 +# CHECK-NEXT: 8 8 2.00 * ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0] +# CHECK-NEXT: 9 8 2.00 * ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0], #32 +# CHECK-NEXT: 9 8 2.00 * ld4 { v0.h, v1.h, v2.h, v3.h }[7], [x0], x0 +# CHECK-NEXT: 8 8 2.00 * ld4r { v0.1d, v1.1d, v2.1d, v3.1d }, [sp] +# CHECK-NEXT: 9 8 2.00 * ld4r { v0.1d, v1.1d, v2.1d, v3.1d }, [sp], x7 +# CHECK-NEXT: 8 8 2.00 * ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp] +# CHECK-NEXT: 9 8 2.00 * ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp], x30 +# CHECK-NEXT: 1 2 0.50 mla v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 mls v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 mov b0, v0.b[15] +# CHECK-NEXT: 1 2 0.50 mov d6, v0.d[1] +# CHECK-NEXT: 1 2 0.50 mov h2, v0.h[5] +# CHECK-NEXT: 1 2 0.50 mov s17, v0.s[2] +# CHECK-NEXT: 1 2 0.50 mov v2.b[0], v0.b[0] +# CHECK-NEXT: 1 2 0.50 mov v2.h[1], v0.h[1] +# CHECK-NEXT: 1 2 0.50 mov v2.s[2], v0.s[2] +# CHECK-NEXT: 1 2 0.50 mov v2.d[1], v0.d[1] +# CHECK-NEXT: 2 5 1.00 mov v0.b[0], w8 +# CHECK-NEXT: 2 5 1.00 mov v0.h[1], w8 +# CHECK-NEXT: 2 5 1.00 mov v0.s[2], w8 +# CHECK-NEXT: 2 5 1.00 mov v0.d[1], x8 +# CHECK-NEXT: 1 2 0.50 mov v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 mov v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 movi d15, #0xff00ff00ff00ff +# CHECK-NEXT: 1 2 0.50 movi v0.16b, #31 +# CHECK-NEXT: 1 2 0.50 movi v0.2d, #0xff0000ff0000ffff +# CHECK-NEXT: 1 2 0.50 movi v0.2s, #8, msl #8 +# CHECK-NEXT: 1 2 0.50 movi v0.4s, #255, lsl #24 +# CHECK-NEXT: 1 2 0.50 movi v0.8b, #255 +# CHECK-NEXT: 1 2 0.50 mul v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 mvni v0.2s, #0 +# CHECK-NEXT: 1 2 0.50 mvni v0.4s, #16, msl #16 +# CHECK-NEXT: 1 2 0.50 neg d29, d24 +# CHECK-NEXT: 1 2 0.50 neg v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 neg v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 neg v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 neg v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 neg v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 neg v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 neg v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 mvn v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 mvn v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 orn v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 mov v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 orr v0.8h, #31 +# CHECK-NEXT: 2 4 2.00 pmul v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 3 1.00 pmul v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 3 1.00 pmull v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 2 4 2.00 pmull2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 raddhn v0.2s, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 raddhn v0.4h, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 raddhn v0.8b, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 raddhn2 v0.16b, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 raddhn2 v0.4s, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 raddhn2 v0.8h, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 rbit v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 rbit v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 rev16 v21.8b, v1.8b +# CHECK-NEXT: 1 2 0.50 rev16 v30.16b, v31.16b +# CHECK-NEXT: 1 2 0.50 rev32 v0.4h, v9.4h +# CHECK-NEXT: 1 2 0.50 rev32 v21.8b, v1.8b +# CHECK-NEXT: 1 2 0.50 rev32 v30.16b, v31.16b +# CHECK-NEXT: 1 2 0.50 rev32 v4.8h, v7.8h +# CHECK-NEXT: 1 2 0.50 rev64 v0.16b, v31.16b +# CHECK-NEXT: 1 2 0.50 rev64 v1.8b, v9.8b +# CHECK-NEXT: 1 2 0.50 rev64 v13.4h, v21.4h +# CHECK-NEXT: 1 2 0.50 rev64 v2.8h, v4.8h +# CHECK-NEXT: 1 2 0.50 rev64 v4.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 rev64 v6.4s, v8.4s +# CHECK-NEXT: 1 4 1.00 rshrn v0.2s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 rshrn v0.4h, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 rshrn v0.8b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 rshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 rshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 rshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: 1 2 0.50 rsubhn v0.2s, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 rsubhn v0.4h, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 rsubhn v0.8b, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 rsubhn2 v0.16b, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 rsubhn2 v0.4s, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 rsubhn2 v0.8h, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 saba v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 sabal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 sabal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 sabal v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 sabal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 sabal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 sabal2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 sabd v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 sabdl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 sabdl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 sabdl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 sabdl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 sabdl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 sabdl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 sadalp v0.1d, v0.2s +# CHECK-NEXT: 1 4 1.00 sadalp v0.2d, v0.4s +# CHECK-NEXT: 1 4 1.00 sadalp v0.2s, v0.4h +# CHECK-NEXT: 1 4 1.00 sadalp v0.4h, v0.8b +# CHECK-NEXT: 1 4 1.00 sadalp v0.4s, v0.8h +# CHECK-NEXT: 1 4 1.00 sadalp v0.8h, v0.16b +# CHECK-NEXT: 1 2 0.50 saddl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 saddl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 saddl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 saddl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 saddl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 saddl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 saddlp v0.1d, v0.2s +# CHECK-NEXT: 1 2 0.50 saddlp v0.2d, v0.4s +# CHECK-NEXT: 1 2 0.50 saddlp v0.2s, v0.4h +# CHECK-NEXT: 1 2 0.50 saddlp v0.4h, v0.8b +# CHECK-NEXT: 1 2 0.50 saddlp v0.4s, v0.8h +# CHECK-NEXT: 1 2 0.50 saddlp v0.8h, v0.16b +# CHECK-NEXT: 1 2 0.50 saddw v0.2d, v0.2d, v0.2s +# CHECK-NEXT: 1 2 0.50 saddw v0.4s, v0.4s, v0.4h +# CHECK-NEXT: 1 2 0.50 saddw v0.8h, v0.8h, v0.8b +# CHECK-NEXT: 1 2 0.50 saddw2 v0.2d, v0.2d, v0.4s +# CHECK-NEXT: 1 2 0.50 saddw2 v0.4s, v0.4s, v0.8h +# CHECK-NEXT: 1 2 0.50 saddw2 v0.8h, v0.8h, v0.16b +# CHECK-NEXT: 1 2 0.50 scvtf d21, d12 +# CHECK-NEXT: 1 2 0.50 scvtf d21, d12, #64 +# CHECK-NEXT: 1 2 0.50 scvtf s22, s13 +# CHECK-NEXT: 1 2 0.50 scvtf s22, s13, #32 +# CHECK-NEXT: 1 3 1.00 scvtf v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 scvtf v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 3 1.00 scvtf v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 scvtf v0.2s, v0.2s, #3 +# CHECK-NEXT: 2 4 2.00 scvtf v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 scvtf v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 scvtf v0.4s, v0.4s, #3 +# CHECK-NEXT: 4 6 4.00 scvtf v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 shadd v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 shl d7, d10, #12 +# CHECK-NEXT: 1 2 1.00 shl v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 2 1.00 shl v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 2 1.00 shl v0.4h, v0.4h, #3 +# CHECK-NEXT: 1 2 1.00 shl v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 2 1.00 shll v0.2d, v0.2s, #32 +# CHECK-NEXT: 1 2 1.00 shll v0.4s, v0.4h, #16 +# CHECK-NEXT: 1 2 1.00 shll v0.8h, v0.8b, #8 +# CHECK-NEXT: 1 2 1.00 shll v0.2d, v0.2s, #32 +# CHECK-NEXT: 1 2 1.00 shll v0.4s, v0.4h, #16 +# CHECK-NEXT: 1 2 1.00 shll v0.8h, v0.8b, #8 +# CHECK-NEXT: 1 2 1.00 shll2 v0.2d, v0.4s, #32 +# CHECK-NEXT: 1 2 1.00 shll2 v0.4s, v0.8h, #16 +# CHECK-NEXT: 1 2 1.00 shll2 v0.8h, v0.16b, #8 +# CHECK-NEXT: 1 2 1.00 shll2 v0.2d, v0.4s, #32 +# CHECK-NEXT: 1 2 1.00 shll2 v0.4s, v0.8h, #16 +# CHECK-NEXT: 1 2 1.00 shll2 v0.8h, v0.16b, #8 +# CHECK-NEXT: 1 2 1.00 shrn v0.2s, v0.2d, #3 +# CHECK-NEXT: 1 2 1.00 shrn v0.4h, v0.4s, #3 +# CHECK-NEXT: 1 2 1.00 shrn v0.8b, v0.8h, #3 +# CHECK-NEXT: 1 2 1.00 shrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: 1 2 1.00 shrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: 1 2 1.00 shrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: 1 2 0.50 shsub v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 shsub v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 sli d10, d14, #12 +# CHECK-NEXT: 1 2 1.00 sli v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 2 1.00 sli v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 2 1.00 sli v0.2s, v0.2s, #3 +# CHECK-NEXT: 1 2 1.00 sli v0.4h, v0.4h, #3 +# CHECK-NEXT: 1 2 1.00 sli v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 2 1.00 sli v0.8b, v0.8b, #3 +# CHECK-NEXT: 1 2 1.00 sli v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 2 0.50 smax v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 smax v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 smax v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 smaxp v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 smaxp v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 smaxp v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 smin v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 smin v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 smin v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 sminp v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 sminp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 sminp v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 smlal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 smlal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 smlal v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 smlal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 smlal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 smlal2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 smlsl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 smlsl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 smlsl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 smlsl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 smlsl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 smlsl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 smull v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 smull v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 smull v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 smull2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 smull2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 smull2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 sqabs b19, b14 +# CHECK-NEXT: 1 2 0.50 sqabs d18, d12 +# CHECK-NEXT: 1 2 0.50 sqabs h21, h15 +# CHECK-NEXT: 1 2 0.50 sqabs s20, s12 +# CHECK-NEXT: 1 2 0.50 sqabs v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 sqabs v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 sqabs v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 sqabs v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 sqabs v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 sqabs v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 sqabs v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 sqadd b20, b11, b15 +# CHECK-NEXT: 1 2 0.50 sqadd v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 sqadd v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 sqdmlal d19, s24, s12 +# CHECK-NEXT: 1 4 1.00 sqdmlal d8, s9, v0.s[1] +# CHECK-NEXT: 1 4 1.00 sqdmlal s0, h0, v0.h[3] +# CHECK-NEXT: 1 2 0.50 sqdmlal s17, h27, h12 +# CHECK-NEXT: 1 4 1.00 sqdmlal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 sqdmlal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 sqdmlal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 sqdmlal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 sqdmlsl d12, s23, s13 +# CHECK-NEXT: 1 4 1.00 sqdmlsl d8, s9, v0.s[1] +# CHECK-NEXT: 1 4 1.00 sqdmlsl s0, h0, v0.h[3] +# CHECK-NEXT: 1 2 0.50 sqdmlsl s14, h12, h25 +# CHECK-NEXT: 1 4 1.00 sqdmlsl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 sqdmlsl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 sqdmlsl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 sqdmlsl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 sqdmulh h10, h11, h12 +# CHECK-NEXT: 1 2 0.50 sqdmulh h7, h15, v0.h[3] +# CHECK-NEXT: 1 2 0.50 sqdmulh s15, s14, v0.s[1] +# CHECK-NEXT: 1 4 1.00 sqdmulh s20, s21, s2 +# CHECK-NEXT: 1 4 1.00 sqdmulh v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 2 5 2.00 sqdmulh v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 sqdmull d1, s1, v0.s[1] +# CHECK-NEXT: 1 2 0.50 sqdmull d15, s22, s12 +# CHECK-NEXT: 1 4 1.00 sqdmull s1, h1, v0.h[3] +# CHECK-NEXT: 1 2 0.50 sqdmull s12, h22, h12 +# CHECK-NEXT: 1 4 1.00 sqdmull v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 sqdmull v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 sqdmull2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 sqdmull2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 sqneg b19, b14 +# CHECK-NEXT: 1 2 0.50 sqneg d18, d12 +# CHECK-NEXT: 1 2 0.50 sqneg h21, h15 +# CHECK-NEXT: 1 2 0.50 sqneg s20, s12 +# CHECK-NEXT: 1 2 0.50 sqneg v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 sqneg v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 sqneg v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 sqneg v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 sqneg v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 sqneg v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 sqneg v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 sqrdmulh h10, h11, h12 +# CHECK-NEXT: 1 2 0.50 sqrdmulh h7, h15, v0.h[3] +# CHECK-NEXT: 1 2 0.50 sqrdmulh s15, s14, v0.s[1] +# CHECK-NEXT: 1 4 1.00 sqrdmulh s20, s21, s2 +# CHECK-NEXT: 1 4 1.00 sqrdmulh v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 2 5 2.00 sqrdmulh v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 sqrshl d31, d31, d31 +# CHECK-NEXT: 1 4 1.00 sqrshl h3, h4, h15 +# CHECK-NEXT: 1 4 1.00 sqrshl v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 sqrshl v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 sqrshl v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 sqrshrn b10, h13, #2 +# CHECK-NEXT: 1 2 0.50 sqrshrn h15, s10, #6 +# CHECK-NEXT: 1 2 0.50 sqrshrn s15, d12, #9 +# CHECK-NEXT: 1 4 1.00 sqrshrn v0.2s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 sqrshrn v0.4h, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 sqrshrn v0.8b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 sqrshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 sqrshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 sqrshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: 1 2 0.50 sqrshrun b17, h10, #6 +# CHECK-NEXT: 1 2 0.50 sqrshrun h10, s13, #15 +# CHECK-NEXT: 1 2 0.50 sqrshrun s22, d16, #31 +# CHECK-NEXT: 1 4 1.00 sqrshrun v0.2s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 sqrshrun v0.4h, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 sqrshrun v0.8b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 sqrshrun2 v0.16b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 sqrshrun2 v0.4s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 sqrshrun2 v0.8h, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 sqshl b11, b19, #7 +# CHECK-NEXT: 1 4 1.00 sqshl d15, d16, #51 +# CHECK-NEXT: 1 4 1.00 sqshl d31, d31, d31 +# CHECK-NEXT: 1 4 1.00 sqshl h13, h18, #11 +# CHECK-NEXT: 1 4 1.00 sqshl h3, h4, h15 +# CHECK-NEXT: 1 4 1.00 sqshl s14, s17, #22 +# CHECK-NEXT: 1 4 1.00 sqshl v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 sqshl v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 sqshl v0.2s, v0.2s, #3 +# CHECK-NEXT: 1 4 1.00 sqshl v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 sqshl v0.4h, v0.4h, #3 +# CHECK-NEXT: 1 4 1.00 sqshl v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 sqshl v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 sqshl v0.8b, v0.8b, #3 +# CHECK-NEXT: 1 4 1.00 sqshl v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 sqshl v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 sqshlu b15, b18, #6 +# CHECK-NEXT: 1 4 1.00 sqshlu d11, d13, #32 +# CHECK-NEXT: 1 4 1.00 sqshlu h19, h17, #6 +# CHECK-NEXT: 1 4 1.00 sqshlu s16, s14, #25 +# CHECK-NEXT: 1 4 1.00 sqshlu v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 sqshlu v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 sqshlu v0.2s, v0.2s, #3 +# CHECK-NEXT: 1 4 1.00 sqshlu v0.4h, v0.4h, #3 +# CHECK-NEXT: 1 4 1.00 sqshlu v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 sqshlu v0.8b, v0.8b, #3 +# CHECK-NEXT: 1 4 1.00 sqshlu v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 2 0.50 sqshrn b10, h15, #5 +# CHECK-NEXT: 1 2 0.50 sqshrn h17, s10, #4 +# CHECK-NEXT: 1 2 0.50 sqshrn s18, d10, #31 +# CHECK-NEXT: 1 4 1.00 sqshrn v0.2s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 sqshrn v0.4h, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 sqshrn v0.8b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 sqshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 sqshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 sqshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: 1 2 0.50 sqshrun b15, h10, #7 +# CHECK-NEXT: 1 2 0.50 sqshrun h20, s14, #3 +# CHECK-NEXT: 1 2 0.50 sqshrun s10, d15, #15 +# CHECK-NEXT: 1 2 0.50 sqshrun v0.2s, v0.2d, #3 +# CHECK-NEXT: 1 2 0.50 sqshrun v0.4h, v0.4s, #3 +# CHECK-NEXT: 1 2 0.50 sqshrun v0.8b, v0.8h, #3 +# CHECK-NEXT: 1 2 0.50 sqshrun2 v0.16b, v0.8h, #3 +# CHECK-NEXT: 1 2 0.50 sqshrun2 v0.4s, v0.2d, #3 +# CHECK-NEXT: 1 2 0.50 sqshrun2 v0.8h, v0.4s, #3 +# CHECK-NEXT: 1 2 0.50 sqsub s20, s10, s7 +# CHECK-NEXT: 1 2 0.50 sqsub v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 sqsub v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 sqsub v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 sqxtn b18, h18 +# CHECK-NEXT: 1 4 1.00 sqxtn h20, s17 +# CHECK-NEXT: 1 4 1.00 sqxtn s19, d14 +# CHECK-NEXT: 1 4 1.00 sqxtn v0.2s, v0.2d +# CHECK-NEXT: 1 4 1.00 sqxtn v0.4h, v0.4s +# CHECK-NEXT: 1 4 1.00 sqxtn v0.8b, v0.8h +# CHECK-NEXT: 1 4 1.00 sqxtn2 v0.16b, v0.8h +# CHECK-NEXT: 1 4 1.00 sqxtn2 v0.4s, v0.2d +# CHECK-NEXT: 1 4 1.00 sqxtn2 v0.8h, v0.4s +# CHECK-NEXT: 1 4 1.00 sqxtun b19, h14 +# CHECK-NEXT: 1 4 1.00 sqxtun h21, s15 +# CHECK-NEXT: 1 4 1.00 sqxtun s20, d12 +# CHECK-NEXT: 1 4 1.00 sqxtun v0.2s, v0.2d +# CHECK-NEXT: 1 4 1.00 sqxtun v0.4h, v0.4s +# CHECK-NEXT: 1 4 1.00 sqxtun v0.8b, v0.8h +# CHECK-NEXT: 1 4 1.00 sqxtun2 v0.16b, v0.8h +# CHECK-NEXT: 1 4 1.00 sqxtun2 v0.4s, v0.2d +# CHECK-NEXT: 1 4 1.00 sqxtun2 v0.8h, v0.4s +# CHECK-NEXT: 1 2 0.50 srhadd v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 srhadd v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 srhadd v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 sri d10, d12, #14 +# CHECK-NEXT: 1 2 1.00 sri v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 2 1.00 sri v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 2 1.00 sri v0.2s, v0.2s, #3 +# CHECK-NEXT: 1 2 1.00 sri v0.4h, v0.4h, #3 +# CHECK-NEXT: 1 2 1.00 sri v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 2 1.00 sri v0.8b, v0.8b, #3 +# CHECK-NEXT: 1 2 1.00 sri v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 srshl d16, d16, d16 +# CHECK-NEXT: 1 4 1.00 srshl v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 srshl v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 srshl v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 srshr d19, d18, #7 +# CHECK-NEXT: 1 4 1.00 srshr v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 srshr v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 srshr v0.2s, v0.2s, #3 +# CHECK-NEXT: 1 4 1.00 srshr v0.4h, v0.4h, #3 +# CHECK-NEXT: 1 4 1.00 srshr v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 srshr v0.8b, v0.8b, #3 +# CHECK-NEXT: 1 4 1.00 srshr v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 2 0.50 srsra d15, d11, #19 +# CHECK-NEXT: 1 4 1.00 srsra v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 srsra v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 srsra v0.2s, v0.2s, #3 +# CHECK-NEXT: 1 4 1.00 srsra v0.4h, v0.4h, #3 +# CHECK-NEXT: 1 4 1.00 srsra v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 srsra v0.8b, v0.8b, #3 +# CHECK-NEXT: 1 4 1.00 srsra v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 2 1.00 sshl d31, d31, d31 +# CHECK-NEXT: 1 2 1.00 sshl v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 1.00 sshl v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 1.00 sshl v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 2 1.00 sshl v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 1.00 sshll v0.2d, v0.2s, #3 +# CHECK-NEXT: 1 2 1.00 sshll2 v0.4s, v0.8h, #3 +# CHECK-NEXT: 1 2 0.50 sshr d15, d16, #12 +# CHECK-NEXT: 1 2 1.00 sshr v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 2 1.00 sshr v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 2 1.00 sshr v0.2s, v0.2s, #3 +# CHECK-NEXT: 1 2 1.00 sshr v0.4h, v0.4h, #3 +# CHECK-NEXT: 1 2 1.00 sshr v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 2 1.00 sshr v0.8b, v0.8b, #3 +# CHECK-NEXT: 1 2 1.00 sshr v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 2 0.50 ssra d18, d12, #21 +# CHECK-NEXT: 1 4 1.00 ssra v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 ssra v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 ssra v0.2s, v0.2s, #3 +# CHECK-NEXT: 1 4 1.00 ssra v0.4h, v0.4h, #3 +# CHECK-NEXT: 1 4 1.00 ssra v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 ssra v0.8b, v0.8b, #3 +# CHECK-NEXT: 1 4 1.00 ssra v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 2 0.50 ssubl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 ssubl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 ssubl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 ssubl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 ssubl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 ssubl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 ssubw v0.2d, v0.2d, v0.2s +# CHECK-NEXT: 1 2 0.50 ssubw v0.4s, v0.4s, v0.4h +# CHECK-NEXT: 1 2 0.50 ssubw v0.8h, v0.8h, v0.8b +# CHECK-NEXT: 1 2 0.50 ssubw2 v0.2d, v0.2d, v0.4s +# CHECK-NEXT: 1 2 0.50 ssubw2 v0.4s, v0.4s, v0.8h +# CHECK-NEXT: 1 2 0.50 ssubw2 v0.8h, v0.8h, v0.16b +# CHECK-NEXT: 2 2 0.50 * st1 { v0.16b }, [x0] +# CHECK-NEXT: 7 4 1.50 * st1 { v0.2d, v1.2d, v2.2d }, [x0], #48 +# CHECK-NEXT: 8 5 2.00 * st1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0] +# CHECK-NEXT: 5 2 1.00 * st1 { v0.4s, v1.4s }, [sp], #32 +# CHECK-NEXT: 6 4 1.50 * st1 { v0.4s, v1.4s, v2.4s }, [sp] +# CHECK-NEXT: 5 2 1.00 * st1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3 +# CHECK-NEXT: 3 2 0.50 * st1 { v0.8h }, [x15], x2 +# CHECK-NEXT: 4 2 1.00 * st1 { v0.8h, v1.8h }, [x15] +# CHECK-NEXT: 2 4 0.50 * st1 { v0.d }[1], [x0] +# CHECK-NEXT: 3 4 0.50 * st1 { v0.d }[1], [x0], #8 +# CHECK-NEXT: 5 5 1.00 * st2 { v0.16b, v1.16b }, [x0], x1 +# CHECK-NEXT: 2 4 0.50 * st2 { v0.8b, v1.8b }, [x0] +# CHECK-NEXT: 2 4 0.50 * st2 { v0.s, v1.s }[3], [sp] +# CHECK-NEXT: 3 4 0.50 * st2 { v0.s, v1.s }[3], [sp], #8 +# CHECK-NEXT: 4 5 1.00 * st3 { v0.4h, v1.4h, v2.4h }, [x15] +# CHECK-NEXT: 7 6 1.50 * st3 { v0.8h, v1.8h, v2.8h }, [x15], x2 +# CHECK-NEXT: 6 4 1.50 * st3 { v0.h, v1.h, v2.h }[7], [x15] +# CHECK-NEXT: 7 4 1.50 * st3 { v0.h, v1.h, v2.h }[7], [x15], #6 +# CHECK-NEXT: 6 7 1.50 * st4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp] +# CHECK-NEXT: 13 9 3.00 * st4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64 +# CHECK-NEXT: 6 5 1.50 * st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0] +# CHECK-NEXT: 7 5 1.50 * st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0], x5 +# CHECK-NEXT: 1 2 0.50 sub d15, d5, d16 +# CHECK-NEXT: 1 2 0.50 sub v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 suqadd b19, b14 +# CHECK-NEXT: 1 2 0.50 suqadd d18, d22 +# CHECK-NEXT: 1 2 0.50 suqadd h20, h15 +# CHECK-NEXT: 1 2 0.50 suqadd s21, s12 +# CHECK-NEXT: 1 2 0.50 suqadd v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 suqadd v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 suqadd v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 suqadd v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 suqadd v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 suqadd v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 suqadd v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 tbl v0.16b, { v0.16b }, v0.16b +# CHECK-NEXT: 1 2 0.50 tbl v0.16b, { v0.16b, v1.16b }, v0.16b +# CHECK-NEXT: 4 4 2.00 tbl v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b +# CHECK-NEXT: 3 4 1.50 tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b +# CHECK-NEXT: 1 2 0.50 tbl v0.8b, { v0.16b }, v0.8b +# CHECK-NEXT: 1 2 0.50 tbl v0.8b, { v0.16b, v1.16b }, v0.8b +# CHECK-NEXT: 4 4 2.00 tbl v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b +# CHECK-NEXT: 3 4 1.50 tbl v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b +# CHECK-NEXT: 1 2 0.50 tbx v0.16b, { v0.16b }, v0.16b +# CHECK-NEXT: 4 4 2.00 tbx v0.16b, { v0.16b, v1.16b }, v0.16b +# CHECK-NEXT: 3 6 1.50 tbx v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b +# CHECK-NEXT: 5 6 2.50 tbx v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b +# CHECK-NEXT: 1 2 0.50 tbx v0.8b, { v0.16b }, v0.8b +# CHECK-NEXT: 4 4 2.00 tbx v0.8b, { v0.16b, v1.16b }, v0.8b +# CHECK-NEXT: 3 6 1.50 tbx v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b +# CHECK-NEXT: 5 6 2.50 tbx v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b +# CHECK-NEXT: 1 2 0.50 trn1 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 trn1 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 trn1 v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 trn1 v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 trn1 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 trn1 v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 trn1 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 trn2 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 trn2 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 trn2 v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 trn2 v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 trn2 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 trn2 v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 trn2 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 uaba v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 uabal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 uabal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 uabal v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 uabal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 uabal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 uabal2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 uabd v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 uabdl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 uabdl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 uabdl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 uabdl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 uabdl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 uabdl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 uadalp v0.1d, v0.2s +# CHECK-NEXT: 1 4 1.00 uadalp v0.2d, v0.4s +# CHECK-NEXT: 1 4 1.00 uadalp v0.2s, v0.4h +# CHECK-NEXT: 1 4 1.00 uadalp v0.4h, v0.8b +# CHECK-NEXT: 1 4 1.00 uadalp v0.4s, v0.8h +# CHECK-NEXT: 1 4 1.00 uadalp v0.8h, v0.16b +# CHECK-NEXT: 1 2 0.50 uaddl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 uaddl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 uaddl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 uaddl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 uaddl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 uaddl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 uaddlp v0.1d, v0.2s +# CHECK-NEXT: 1 2 0.50 uaddlp v0.2d, v0.4s +# CHECK-NEXT: 1 2 0.50 uaddlp v0.2s, v0.4h +# CHECK-NEXT: 1 2 0.50 uaddlp v0.4h, v0.8b +# CHECK-NEXT: 1 2 0.50 uaddlp v0.4s, v0.8h +# CHECK-NEXT: 1 2 0.50 uaddlp v0.8h, v0.16b +# CHECK-NEXT: 1 2 0.50 uaddw v0.2d, v0.2d, v0.2s +# CHECK-NEXT: 1 2 0.50 uaddw v0.4s, v0.4s, v0.4h +# CHECK-NEXT: 1 2 0.50 uaddw v0.8h, v0.8h, v0.8b +# CHECK-NEXT: 1 2 0.50 uaddw2 v0.2d, v0.2d, v0.4s +# CHECK-NEXT: 1 2 0.50 uaddw2 v0.4s, v0.4s, v0.8h +# CHECK-NEXT: 1 2 0.50 uaddw2 v0.8h, v0.8h, v0.16b +# CHECK-NEXT: 1 2 0.50 ucvtf d21, d14 +# CHECK-NEXT: 1 2 0.50 ucvtf d21, d14, #64 +# CHECK-NEXT: 1 2 0.50 ucvtf s22, s13 +# CHECK-NEXT: 1 2 0.50 ucvtf s22, s13, #32 +# CHECK-NEXT: 1 3 1.00 ucvtf v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 ucvtf v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 3 1.00 ucvtf v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 ucvtf v0.2s, v0.2s, #3 +# CHECK-NEXT: 2 4 2.00 ucvtf v0.4h, v0.4h +# CHECK-NEXT: 2 4 2.00 ucvtf v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 ucvtf v0.4s, v0.4s, #3 +# CHECK-NEXT: 4 6 4.00 ucvtf v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 uhadd v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 uhadd v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 uhsub v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 umax v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 umax v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 umax v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 umaxp v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 umaxp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 umaxp v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 umin v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 umin v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 umin v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 uminp v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 uminp v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 uminp v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 umlal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 umlal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 umlal v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 umlal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 umlal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 umlal2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 umlsl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 umlsl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 umlsl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 umlsl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 umlsl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 umlsl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 umull v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 umull v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 umull v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 umull2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 umull2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 umull2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 uqadd h0, h1, h5 +# CHECK-NEXT: 1 2 0.50 uqadd v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 uqrshl b11, b20, b30 +# CHECK-NEXT: 1 4 1.00 uqrshl s23, s20, s16 +# CHECK-NEXT: 1 4 1.00 uqrshl v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 uqrshl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 uqrshl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 uqrshl v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 uqrshrn b10, h12, #5 +# CHECK-NEXT: 1 2 0.50 uqrshrn h12, s10, #14 +# CHECK-NEXT: 1 2 0.50 uqrshrn s10, d10, #25 +# CHECK-NEXT: 1 4 1.00 uqrshrn v0.2s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 uqrshrn v0.4h, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 uqrshrn v0.8b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 uqrshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 uqrshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 uqrshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 uqshl b11, b20, b30 +# CHECK-NEXT: 1 4 1.00 uqshl b18, b15, #6 +# CHECK-NEXT: 1 4 1.00 uqshl d15, d12, #19 +# CHECK-NEXT: 1 4 1.00 uqshl h11, h18, #7 +# CHECK-NEXT: 1 4 1.00 uqshl s14, s19, #18 +# CHECK-NEXT: 1 4 1.00 uqshl s23, s20, s16 +# CHECK-NEXT: 1 4 1.00 uqshl v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 uqshl v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 uqshl v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 uqshl v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 uqshl v0.2s, v0.2s, #3 +# CHECK-NEXT: 1 4 1.00 uqshl v0.4h, v0.4h, #3 +# CHECK-NEXT: 1 4 1.00 uqshl v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 uqshl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 uqshl v0.8b, v0.8b, #3 +# CHECK-NEXT: 1 4 1.00 uqshl v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 uqshl v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 uqshrn b12, h10, #7 +# CHECK-NEXT: 1 2 0.50 uqshrn h10, s14, #5 +# CHECK-NEXT: 1 2 0.50 uqshrn s10, d12, #13 +# CHECK-NEXT: 1 4 1.00 uqshrn v0.2s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 uqshrn v0.4h, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 uqshrn v0.8b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 uqshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 uqshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 uqshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: 1 2 0.50 uqsub d16, d16, d16 +# CHECK-NEXT: 1 2 0.50 uqsub v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 uqxtn b18, h18 +# CHECK-NEXT: 1 4 1.00 uqxtn h20, s17 +# CHECK-NEXT: 1 4 1.00 uqxtn s19, d14 +# CHECK-NEXT: 1 4 1.00 uqxtn v0.2s, v0.2d +# CHECK-NEXT: 1 4 1.00 uqxtn v0.4h, v0.4s +# CHECK-NEXT: 1 4 1.00 uqxtn v0.8b, v0.8h +# CHECK-NEXT: 1 4 1.00 uqxtn2 v0.16b, v0.8h +# CHECK-NEXT: 1 4 1.00 uqxtn2 v0.4s, v0.2d +# CHECK-NEXT: 1 4 1.00 uqxtn2 v0.8h, v0.4s +# CHECK-NEXT: 1 3 1.00 urecpe v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 urecpe v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 urhadd v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 urhadd v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 urhadd v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 urshl d8, d7, d4 +# CHECK-NEXT: 1 4 1.00 urshl v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 urshl v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 urshl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 urshl v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 urshr d20, d23, #31 +# CHECK-NEXT: 1 4 1.00 urshr v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 urshr v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 urshr v0.2s, v0.2s, #3 +# CHECK-NEXT: 1 4 1.00 urshr v0.4h, v0.4h, #3 +# CHECK-NEXT: 1 4 1.00 urshr v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 urshr v0.8b, v0.8b, #3 +# CHECK-NEXT: 1 4 1.00 urshr v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 3 1.00 ursqrte v0.2s, v0.2s +# CHECK-NEXT: 2 4 2.00 ursqrte v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 ursra d18, d10, #13 +# CHECK-NEXT: 1 4 1.00 ursra v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 ursra v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 ursra v0.2s, v0.2s, #3 +# CHECK-NEXT: 1 4 1.00 ursra v0.4h, v0.4h, #3 +# CHECK-NEXT: 1 4 1.00 ursra v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 ursra v0.8b, v0.8b, #3 +# CHECK-NEXT: 1 4 1.00 ursra v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 2 1.00 ushl d0, d0, d0 +# CHECK-NEXT: 1 2 1.00 ushl v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 1.00 ushl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 1.00 ushl v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 2 1.00 ushll v0.4s, v0.4h, #3 +# CHECK-NEXT: 1 2 1.00 ushll2 v0.8h, v0.16b, #3 +# CHECK-NEXT: 1 2 0.50 ushr d10, d17, #18 +# CHECK-NEXT: 1 2 1.00 ushr v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 2 1.00 ushr v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 2 1.00 ushr v0.2s, v0.2s, #3 +# CHECK-NEXT: 1 2 1.00 ushr v0.4h, v0.4h, #3 +# CHECK-NEXT: 1 2 1.00 ushr v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 2 1.00 ushr v0.8b, v0.8b, #3 +# CHECK-NEXT: 1 2 1.00 ushr v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 2 0.50 usqadd b19, b14 +# CHECK-NEXT: 1 2 0.50 usqadd d18, d22 +# CHECK-NEXT: 1 2 0.50 usqadd h20, h15 +# CHECK-NEXT: 1 2 0.50 usqadd s21, s12 +# CHECK-NEXT: 1 2 0.50 usqadd v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 usqadd v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 usqadd v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 usqadd v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 usqadd v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 usqadd v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 usqadd v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 usra d20, d13, #61 +# CHECK-NEXT: 1 4 1.00 usra v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 usra v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 usra v0.2s, v0.2s, #3 +# CHECK-NEXT: 1 4 1.00 usra v0.4h, v0.4h, #3 +# CHECK-NEXT: 1 4 1.00 usra v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 usra v0.8b, v0.8b, #3 +# CHECK-NEXT: 1 4 1.00 usra v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 2 0.50 usubl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 usubl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 usubl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 usubl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 usubl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 usubl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 usubw v0.2d, v0.2d, v0.2s +# CHECK-NEXT: 1 2 0.50 usubw v0.4s, v0.4s, v0.4h +# CHECK-NEXT: 1 2 0.50 usubw v0.8h, v0.8h, v0.8b +# CHECK-NEXT: 1 2 0.50 usubw2 v0.2d, v0.2d, v0.4s +# CHECK-NEXT: 1 2 0.50 usubw2 v0.4s, v0.4s, v0.8h +# CHECK-NEXT: 1 2 0.50 usubw2 v0.8h, v0.8h, v0.16b +# CHECK-NEXT: 1 2 0.50 uzp1 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 uzp1 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 uzp1 v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 uzp1 v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 uzp1 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 uzp1 v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 uzp1 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 uzp2 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 uzp2 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 uzp2 v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 uzp2 v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 uzp2 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 uzp2 v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 uzp2 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 xtn v0.2s, v0.2d +# CHECK-NEXT: 1 2 0.50 xtn v0.4h, v0.4s +# CHECK-NEXT: 1 2 0.50 xtn v0.8b, v0.8h +# CHECK-NEXT: 1 2 0.50 xtn2 v0.16b, v0.8h +# CHECK-NEXT: 1 2 0.50 xtn2 v0.4s, v0.2d +# CHECK-NEXT: 1 2 0.50 xtn2 v0.8h, v0.4s +# CHECK-NEXT: 1 2 0.50 zip1 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 zip1 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 zip1 v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 zip1 v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 zip1 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 zip1 v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 zip1 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 zip2 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 2 0.50 zip2 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 2 0.50 zip2 v0.2s, v0.2s, v0.2s +# CHECK-NEXT: 1 2 0.50 zip2 v0.4h, v0.4h, v0.4h +# CHECK-NEXT: 1 2 0.50 zip2 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 2 0.50 zip2 v0.8b, v0.8b, v0.8b +# CHECK-NEXT: 1 2 0.50 zip2 v0.8h, v0.8h, v0.8h + +# CHECK: Resources: +# CHECK-NEXT: [0] - N1UnitB +# CHECK-NEXT: [1.0] - N1UnitD +# CHECK-NEXT: [1.1] - N1UnitD +# CHECK-NEXT: [2.0] - N1UnitL +# CHECK-NEXT: [2.1] - N1UnitL +# CHECK-NEXT: [3] - N1UnitM +# CHECK-NEXT: [4.0] - N1UnitS +# CHECK-NEXT: [4.1] - N1UnitS +# CHECK-NEXT: [5] - N1UnitV0 +# CHECK-NEXT: [6] - N1UnitV1 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1.0] [1.1] [2.0] [2.1] [3] [4.0] [4.1] [5] [6] +# CHECK-NEXT: - - - 73.00 73.00 21.33 10.33 10.33 703.00 611.00 + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1.0] [1.1] [2.0] [2.1] [3] [4.0] [4.1] [5] [6] Instructions: +# CHECK-NEXT: - - - - - - - - 0.50 0.50 abs d29, d24 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 abs v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 abs v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 abs v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 abs v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 abs v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 abs v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 abs v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 add d17, d31, d29 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 add v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 addhn v0.2s, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 addhn v0.4h, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 addhn v0.8b, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 addhn2 v0.16b, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 addhn2 v0.4s, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 addhn2 v0.8h, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 addp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 addp v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 and v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 bic v0.4h, #15, lsl #8 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 bic v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 bif v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 bit v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 bsl v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cls v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cls v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cls v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cls v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cls v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cls v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 clz v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 clz v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 clz v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 clz v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 clz v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 clz v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmeq d20, d21, #0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmeq d20, d21, d22 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmeq v0.16b, v0.16b, #0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmeq v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmge d20, d21, #0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmge d20, d21, d22 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmge v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmge v0.8b, v0.8b, #0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmgt d20, d21, #0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmgt d20, d21, d22 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmgt v0.2s, v0.2s, #0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmgt v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmhi d20, d21, d22 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmhi v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmhs d20, d21, d22 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmhs v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmle d20, d21, #0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmle v0.2d, v0.2d, #0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmlt d20, d21, #0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmlt v0.8h, v0.8h, #0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmtst d20, d21, d22 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cmtst v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cnt v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 cnt v0.8b, v0.8b +# CHECK-NEXT: - - - - - 1.00 - - - - dup v0.16b, w28 +# CHECK-NEXT: - - - - - 1.00 - - - - dup v0.2d, x28 +# CHECK-NEXT: - - - - - 1.00 - - - - dup v0.2s, w28 +# CHECK-NEXT: - - - - - 1.00 - - - - dup v0.4h, w28 +# CHECK-NEXT: - - - - - 1.00 - - - - dup v0.4s, w28 +# CHECK-NEXT: - - - - - 1.00 - - - - dup v0.8b, w28 +# CHECK-NEXT: - - - - - 1.00 - - - - dup v0.8h, w28 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 eor v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ext v0.16b, v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ext v0.8b, v0.8b, v0.8b, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fabd d29, d24, d20 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fabd s29, s24, s20 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fabd v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fabs v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fabs v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fabs v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fabs v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fabs v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 facge d20, d21, d22 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 facge s10, s11, s12 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 facge v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 facgt d20, d21, d22 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 facgt s10, s11, s12 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 facgt v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fadd v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 faddp v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 faddp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmeq d20, d21, #0.0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmeq d20, d21, d22 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmeq s10, s11, #0.0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmeq s10, s11, s12 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmeq v0.2s, v0.2s, #0.0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmeq v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmge d20, d21, #0.0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmge d20, d21, d22 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmge s10, s11, #0.0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmge s10, s11, s12 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmge v0.2d, v0.2d, #0.0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmge v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmgt d20, d21, #0.0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmgt d20, d21, d22 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmgt s10, s11, #0.0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmgt s10, s11, s12 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmgt v0.4s, v0.4s, #0.0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmgt v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmle d20, d21, #0.0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmle s10, s11, #0.0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmle v0.2d, v0.2d, #0.0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmlt d20, d21, #0.0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmlt s10, s11, #0.0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcmlt v0.4s, v0.4s, #0.0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtas d21, d14 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtas s12, s13 +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtas v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtas v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtas v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtas v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 4.00 - fcvtas v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtau d21, d14 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtau s12, s13 +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtau v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtau v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtau v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtau v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 4.00 - fcvtau v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtl v0.2d, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtl v0.4s, v0.4h +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtl2 v0.2d, v0.4s +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtl2 v0.4s, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtms d21, d14 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtms s22, s13 +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtms v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtms v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtms v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtms v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 4.00 - fcvtms v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtmu d21, d14 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtmu s12, s13 +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtmu v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtmu v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtmu v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtmu v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 4.00 - fcvtmu v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtn v0.2s, v0.2d +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtn v0.4h, v0.4s +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtn2 v0.4s, v0.2d +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtn2 v0.8h, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtns d21, d14 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtns s22, s13 +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtns v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtns v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtns v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtns v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 4.00 - fcvtns v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtnu d21, d14 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtnu s12, s13 +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtnu v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtnu v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtnu v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtnu v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 4.00 - fcvtnu v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtps d21, d14 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtps s22, s13 +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtps v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtps v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtps v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtps v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 4.00 - fcvtps v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtpu d21, d14 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtpu s12, s13 +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtpu v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtpu v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtpu v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtpu v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 4.00 - fcvtpu v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtxn s22, d13 +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtxn v0.2s, v0.2d +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtxn2 v0.4s, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs d21, d12, #1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs d21, d14 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs s12, s13 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs s21, s12, #1 +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtzs v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtzs v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs v0.2s, v0.2s, #3 +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtzs v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtzs v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzs v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - 4.00 - fcvtzs v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu d21, d12, #1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu d21, d14 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu s12, s13 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu s21, s12, #1 +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtzu v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - 1.00 - fcvtzu v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu v0.2s, v0.2s, #3 +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtzu v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - fcvtzu v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fcvtzu v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - 4.00 - fcvtzu v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 7.00 - fdiv v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmax v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmax v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmax v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmaxnm v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmaxnm v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmaxnm v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmaxnmp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmaxnmp v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmaxnmp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmaxp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmaxp v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmaxp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmin v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmin v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmin v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fminnm v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fminnm v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fminnm v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fminnmp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fminnmp v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fminnmp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fminp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fminp v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fminp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmla d0, d1, v0.d[1] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmla s0, s1, v0.s[3] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmla v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmls d0, d4, v0.d[1] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmls s3, s5, v0.s[3] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmls v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmov v0.2d, #-1.25000000 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmov v0.2s, #13.00000000 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmov v0.4s, #1.00000000 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmul d0, d1, v0.d[1] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmul s0, s1, v0.s[3] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmul v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmulx d0, d4, v0.d[1] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmulx d23, d11, d1 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmulx s20, s22, s15 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmulx s3, s5, v0.s[3] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmulx v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmulx v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fmulx v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fneg v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fneg v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fneg v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fneg v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fneg v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - frecpe d13, d13 +# CHECK-NEXT: - - - - - - - - 1.00 - frecpe s19, s14 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 frecpe v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 1.00 - frecpe v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - frecpe v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - frecpe v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 4.00 - frecpe v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 frecps v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 frecps d22, d30, d21 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 frecps s21, s16, s13 +# CHECK-NEXT: - - - - - - - - 1.00 - frecpx d16, d19 +# CHECK-NEXT: - - - - - - - - 1.00 - frecpx s18, s10 +# CHECK-NEXT: - - - - - - - - 1.00 - frinta v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 1.00 - frinta v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - frinta v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - frinta v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 4.00 - frinta v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - frinti v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 1.00 - frinti v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - frinti v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - frinti v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 4.00 - frinti v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - frintm v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 1.00 - frintm v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - frintm v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - frintm v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 4.00 - frintm v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - frintn v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 1.00 - frintn v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - frintn v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - frintn v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 4.00 - frintn v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - frintp v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 1.00 - frintp v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - frintp v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - frintp v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 4.00 - frintp v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - frintx v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 1.00 - frintx v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - frintx v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - frintx v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 4.00 - frintx v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - frintz v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 1.00 - frintz v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - frintz v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - frintz v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 4.00 - frintz v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - frsqrte d21, d12 +# CHECK-NEXT: - - - - - - - - 1.00 - frsqrte s22, s13 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 frsqrte v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 1.00 - frsqrte v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - frsqrte v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - frsqrte v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 4.00 - frsqrte v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 frsqrts d8, d22, d18 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 frsqrts s21, s5, s12 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 frsqrts v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 7.00 - fsqrt v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 7.00 - fsqrt v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 7.00 - fsqrt v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 7.00 - fsqrt v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 10.00 - fsqrt v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 fsub v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - 0.50 0.50 - - - - - ld1 { v0.16b }, [x0] +# CHECK-NEXT: - - - 1.50 1.50 0.33 0.33 0.33 - - ld1 { v0.2d, v1.2d, v2.2d }, [x0], #48 +# CHECK-NEXT: - - - 2.00 2.00 - - - - - ld1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0] +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 - - ld1 { v0.4s, v1.4s }, [sp], #32 +# CHECK-NEXT: - - - 1.50 1.50 - - - - - ld1 { v0.4s, v1.4s, v2.4s }, [sp] +# CHECK-NEXT: - - - 2.00 2.00 0.33 0.33 0.33 - - ld1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 - - ld1 { v0.8h }, [x15], x2 +# CHECK-NEXT: - - - 1.00 1.00 - - - - - ld1 { v0.8h, v1.8h }, [x15] +# CHECK-NEXT: - - - 0.50 0.50 - - - 0.50 0.50 ld1 { v0.b }[9], [x0] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 ld1 { v0.b }[9], [x0], #1 +# CHECK-NEXT: - - - 0.50 0.50 - - - 0.50 0.50 ld1r { v0.16b }, [x0] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 ld1r { v0.16b }, [x0], #1 +# CHECK-NEXT: - - - 0.50 0.50 - - - 0.50 0.50 ld1r { v0.8h }, [x15] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 ld1r { v0.8h }, [x15], #2 +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.00 1.00 ld2 { v0.16b, v1.16b }, [x0], x1 +# CHECK-NEXT: - - - 1.00 1.00 - - - 1.00 1.00 ld2 { v0.8b, v1.8b }, [x0] +# CHECK-NEXT: - - - 1.00 1.00 - - - 1.00 1.00 ld2 { v0.h, v1.h }[7], [x15] +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.00 1.00 ld2 { v0.h, v1.h }[7], [x15], #4 +# CHECK-NEXT: - - - 1.00 1.00 - - - 1.00 1.00 ld2r { v0.2d, v1.2d }, [x0] +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.00 1.00 ld2r { v0.2d, v1.2d }, [x0], #16 +# CHECK-NEXT: - - - 1.00 1.00 - - - 1.00 1.00 ld2r { v0.4s, v1.4s }, [sp] +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.00 1.00 ld2r { v0.4s, v1.4s }, [sp], #8 +# CHECK-NEXT: - - - 1.50 1.50 - - - 1.50 1.50 ld3 { v0.4h, v1.4h, v2.4h }, [x15] +# CHECK-NEXT: - - - 1.50 1.50 0.33 0.33 0.33 1.50 1.50 ld3 { v0.8h, v1.8h, v2.8h }, [x15], x2 +# CHECK-NEXT: - - - 1.00 1.00 - - - 1.50 1.50 ld3 { v0.s, v1.s, v2.s }[3], [sp] +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.50 1.50 ld3 { v0.s, v1.s, v2.s }[3], [sp], x3 +# CHECK-NEXT: - - - 1.00 1.00 - - - 1.50 1.50 ld3r { v0.4h, v1.4h, v2.4h }, [x15] +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.50 1.50 ld3r { v0.4h, v1.4h, v2.4h }, [x15], #6 +# CHECK-NEXT: - - - 1.00 1.00 - - - 1.50 1.50 ld3r { v0.8b, v1.8b, v2.8b }, [x0] +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.50 1.50 ld3r { v0.8b, v1.8b, v2.8b }, [x0], #3 +# CHECK-NEXT: - - - 1.50 1.50 - - - 2.00 2.00 ld4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp] +# CHECK-NEXT: - - - 2.00 2.00 0.33 0.33 0.33 2.00 2.00 ld4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64 +# CHECK-NEXT: - - - 2.00 2.00 - - - 2.00 2.00 ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0] +# CHECK-NEXT: - - - 2.00 2.00 0.33 0.33 0.33 2.00 2.00 ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0], #32 +# CHECK-NEXT: - - - 2.00 2.00 0.33 0.33 0.33 2.00 2.00 ld4 { v0.h, v1.h, v2.h, v3.h }[7], [x0], x0 +# CHECK-NEXT: - - - 2.00 2.00 - - - 2.00 2.00 ld4r { v0.1d, v1.1d, v2.1d, v3.1d }, [sp] +# CHECK-NEXT: - - - 2.00 2.00 0.33 0.33 0.33 2.00 2.00 ld4r { v0.1d, v1.1d, v2.1d, v3.1d }, [sp], x7 +# CHECK-NEXT: - - - 2.00 2.00 - - - 2.00 2.00 ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp] +# CHECK-NEXT: - - - 2.00 2.00 0.33 0.33 0.33 2.00 2.00 ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp], x30 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 mla v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 1.00 - mls v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 mov b0, v0.b[15] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 mov d6, v0.d[1] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 mov h2, v0.h[5] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 mov s17, v0.s[2] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 mov v2.b[0], v0.b[0] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 mov v2.h[1], v0.h[1] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 mov v2.s[2], v0.s[2] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 mov v2.d[1], v0.d[1] +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 mov v0.b[0], w8 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 mov v0.h[1], w8 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 mov v0.s[2], w8 +# CHECK-NEXT: - - - - - 1.00 - - 0.50 0.50 mov v0.d[1], x8 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 mov v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 mov v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 movi d15, #0xff00ff00ff00ff +# CHECK-NEXT: - - - - - - - - 0.50 0.50 movi v0.16b, #31 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 movi v0.2d, #0xff0000ff0000ffff +# CHECK-NEXT: - - - - - - - - 0.50 0.50 movi v0.2s, #8, msl #8 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 movi v0.4s, #255, lsl #24 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 movi v0.8b, #255 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 mul v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 mvni v0.2s, #0 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 mvni v0.4s, #16, msl #16 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 neg d29, d24 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 neg v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 neg v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 neg v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 neg v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 neg v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 neg v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 neg v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 mvn v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 mvn v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 orn v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 mov v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 orr v0.8h, #31 +# CHECK-NEXT: - - - - - - - - 2.00 - pmul v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 1.00 - pmul v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 1.00 - pmull v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 2.00 - pmull2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 raddhn v0.2s, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 raddhn v0.4h, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 raddhn v0.8b, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 raddhn2 v0.16b, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 raddhn2 v0.4s, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 raddhn2 v0.8h, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rbit v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rbit v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rev16 v21.8b, v1.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rev16 v30.16b, v31.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rev32 v0.4h, v9.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rev32 v21.8b, v1.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rev32 v30.16b, v31.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rev32 v4.8h, v7.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rev64 v0.16b, v31.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rev64 v1.8b, v9.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rev64 v13.4h, v21.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rev64 v2.8h, v4.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rev64 v4.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rev64 v6.4s, v8.4s +# CHECK-NEXT: - - - - - - - - - 1.00 rshrn v0.2s, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 rshrn v0.4h, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 rshrn v0.8b, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 rshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 rshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 rshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rsubhn v0.2s, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rsubhn v0.4h, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rsubhn v0.8b, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rsubhn2 v0.16b, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rsubhn2 v0.4s, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 rsubhn2 v0.8h, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - - 1.00 saba v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - - 1.00 sabal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - - 1.00 sabal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - - 1.00 sabal v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - - 1.00 sabal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - - 1.00 sabal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - - 1.00 sabal2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sabd v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sabdl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sabdl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sabdl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sabdl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sabdl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sabdl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - - 1.00 sadalp v0.1d, v0.2s +# CHECK-NEXT: - - - - - - - - - 1.00 sadalp v0.2d, v0.4s +# CHECK-NEXT: - - - - - - - - - 1.00 sadalp v0.2s, v0.4h +# CHECK-NEXT: - - - - - - - - - 1.00 sadalp v0.4h, v0.8b +# CHECK-NEXT: - - - - - - - - - 1.00 sadalp v0.4s, v0.8h +# CHECK-NEXT: - - - - - - - - - 1.00 sadalp v0.8h, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 saddl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 saddl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 saddl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 saddl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 saddl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 saddl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 saddlp v0.1d, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 saddlp v0.2d, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 saddlp v0.2s, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 saddlp v0.4h, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 saddlp v0.4s, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 saddlp v0.8h, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 saddw v0.2d, v0.2d, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 saddw v0.4s, v0.4s, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 saddw v0.8h, v0.8h, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 saddw2 v0.2d, v0.2d, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 saddw2 v0.4s, v0.4s, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 saddw2 v0.8h, v0.8h, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 scvtf d21, d12 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 scvtf d21, d12, #64 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 scvtf s22, s13 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 scvtf s22, s13, #32 +# CHECK-NEXT: - - - - - - - - 1.00 - scvtf v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 scvtf v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - 1.00 - scvtf v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 scvtf v0.2s, v0.2s, #3 +# CHECK-NEXT: - - - - - - - - 2.00 - scvtf v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - scvtf v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 scvtf v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - 4.00 - scvtf v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 shadd v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 shl d7, d10, #12 +# CHECK-NEXT: - - - - - - - - - 1.00 shl v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 shl v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 shl v0.4h, v0.4h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 shl v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 shll v0.2d, v0.2s, #32 +# CHECK-NEXT: - - - - - - - - - 1.00 shll v0.4s, v0.4h, #16 +# CHECK-NEXT: - - - - - - - - - 1.00 shll v0.8h, v0.8b, #8 +# CHECK-NEXT: - - - - - - - - - 1.00 shll v0.2d, v0.2s, #32 +# CHECK-NEXT: - - - - - - - - - 1.00 shll v0.4s, v0.4h, #16 +# CHECK-NEXT: - - - - - - - - - 1.00 shll v0.8h, v0.8b, #8 +# CHECK-NEXT: - - - - - - - - - 1.00 shll2 v0.2d, v0.4s, #32 +# CHECK-NEXT: - - - - - - - - - 1.00 shll2 v0.4s, v0.8h, #16 +# CHECK-NEXT: - - - - - - - - - 1.00 shll2 v0.8h, v0.16b, #8 +# CHECK-NEXT: - - - - - - - - - 1.00 shll2 v0.2d, v0.4s, #32 +# CHECK-NEXT: - - - - - - - - - 1.00 shll2 v0.4s, v0.8h, #16 +# CHECK-NEXT: - - - - - - - - - 1.00 shll2 v0.8h, v0.16b, #8 +# CHECK-NEXT: - - - - - - - - - 1.00 shrn v0.2s, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 shrn v0.4h, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 shrn v0.8b, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 shrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 shrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 shrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 shsub v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 shsub v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sli d10, d14, #12 +# CHECK-NEXT: - - - - - - - - - 1.00 sli v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sli v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sli v0.2s, v0.2s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sli v0.4h, v0.4h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sli v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sli v0.8b, v0.8b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sli v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 smax v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 smax v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 smax v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 smaxp v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 smaxp v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 smaxp v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 smin v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 smin v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 smin v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sminp v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sminp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sminp v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - smlal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 1.00 - smlal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 1.00 - smlal v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 1.00 - smlal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 1.00 - smlal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - smlal2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 1.00 - smlsl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 1.00 - smlsl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 1.00 - smlsl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 1.00 - smlsl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 1.00 - smlsl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - smlsl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 1.00 - smull v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 1.00 - smull v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 1.00 - smull v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 1.00 - smull2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 1.00 - smull2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - smull2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqabs b19, b14 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqabs d18, d12 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqabs h21, h15 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqabs s20, s12 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqabs v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqabs v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqabs v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqabs v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqabs v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqabs v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqabs v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqadd b20, b11, b15 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqadd v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqadd v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqdmlal d19, s24, s12 +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmlal d8, s9, v0.s[1] +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmlal s0, h0, v0.h[3] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqdmlal s17, h27, h12 +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmlal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmlal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmlal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmlal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqdmlsl d12, s23, s13 +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmlsl d8, s9, v0.s[1] +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmlsl s0, h0, v0.h[3] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqdmlsl s14, h12, h25 +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmlsl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmlsl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmlsl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmlsl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmulh h10, h11, h12 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqdmulh h7, h15, v0.h[3] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqdmulh s15, s14, v0.s[1] +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmulh s20, s21, s2 +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmulh v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - sqdmulh v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmull d1, s1, v0.s[1] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqdmull d15, s22, s12 +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmull s1, h1, v0.h[3] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqdmull s12, h22, h12 +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmull v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmull v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmull2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 1.00 - sqdmull2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqneg b19, b14 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqneg d18, d12 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqneg h21, h15 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqneg s20, s12 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqneg v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqneg v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqneg v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqneg v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqneg v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqneg v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqneg v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - sqrdmulh h10, h11, h12 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqrdmulh h7, h15, v0.h[3] +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqrdmulh s15, s14, v0.s[1] +# CHECK-NEXT: - - - - - - - - 1.00 - sqrdmulh s20, s21, s2 +# CHECK-NEXT: - - - - - - - - 1.00 - sqrdmulh v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - sqrdmulh v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - - 1.00 sqrshl d31, d31, d31 +# CHECK-NEXT: - - - - - - - - - 1.00 sqrshl h3, h4, h15 +# CHECK-NEXT: - - - - - - - - - 1.00 sqrshl v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - - 1.00 sqrshl v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - - 1.00 sqrshl v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqrshrn b10, h13, #2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqrshrn h15, s10, #6 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqrshrn s15, d12, #9 +# CHECK-NEXT: - - - - - - - - - 1.00 sqrshrn v0.2s, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqrshrn v0.4h, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqrshrn v0.8b, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqrshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqrshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqrshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqrshrun b17, h10, #6 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqrshrun h10, s13, #15 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqrshrun s22, d16, #31 +# CHECK-NEXT: - - - - - - - - - 1.00 sqrshrun v0.2s, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqrshrun v0.4h, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqrshrun v0.8b, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqrshrun2 v0.16b, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqrshrun2 v0.4s, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqrshrun2 v0.8h, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshl b11, b19, #7 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshl d15, d16, #51 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshl d31, d31, d31 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshl h13, h18, #11 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshl h3, h4, h15 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshl s14, s17, #22 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshl v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshl v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshl v0.2s, v0.2s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshl v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - - 1.00 sqshl v0.4h, v0.4h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshl v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - - 1.00 sqshl v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshl v0.8b, v0.8b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshl v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - - 1.00 sqshl v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshlu b15, b18, #6 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshlu d11, d13, #32 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshlu h19, h17, #6 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshlu s16, s14, #25 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshlu v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshlu v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshlu v0.2s, v0.2s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshlu v0.4h, v0.4h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshlu v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshlu v0.8b, v0.8b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshlu v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqshrn b10, h15, #5 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqshrn h17, s10, #4 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqshrn s18, d10, #31 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshrn v0.2s, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshrn v0.4h, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshrn v0.8b, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sqshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqshrun b15, h10, #7 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqshrun h20, s14, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqshrun s10, d15, #15 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqshrun v0.2s, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqshrun v0.4h, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqshrun v0.8b, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqshrun2 v0.16b, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqshrun2 v0.4s, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqshrun2 v0.8h, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqsub s20, s10, s7 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqsub v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqsub v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sqsub v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - - 1.00 sqxtn b18, h18 +# CHECK-NEXT: - - - - - - - - - 1.00 sqxtn h20, s17 +# CHECK-NEXT: - - - - - - - - - 1.00 sqxtn s19, d14 +# CHECK-NEXT: - - - - - - - - - 1.00 sqxtn v0.2s, v0.2d +# CHECK-NEXT: - - - - - - - - - 1.00 sqxtn v0.4h, v0.4s +# CHECK-NEXT: - - - - - - - - - 1.00 sqxtn v0.8b, v0.8h +# CHECK-NEXT: - - - - - - - - - 1.00 sqxtn2 v0.16b, v0.8h +# CHECK-NEXT: - - - - - - - - - 1.00 sqxtn2 v0.4s, v0.2d +# CHECK-NEXT: - - - - - - - - - 1.00 sqxtn2 v0.8h, v0.4s +# CHECK-NEXT: - - - - - - - - - 1.00 sqxtun b19, h14 +# CHECK-NEXT: - - - - - - - - - 1.00 sqxtun h21, s15 +# CHECK-NEXT: - - - - - - - - - 1.00 sqxtun s20, d12 +# CHECK-NEXT: - - - - - - - - - 1.00 sqxtun v0.2s, v0.2d +# CHECK-NEXT: - - - - - - - - - 1.00 sqxtun v0.4h, v0.4s +# CHECK-NEXT: - - - - - - - - - 1.00 sqxtun v0.8b, v0.8h +# CHECK-NEXT: - - - - - - - - - 1.00 sqxtun2 v0.16b, v0.8h +# CHECK-NEXT: - - - - - - - - - 1.00 sqxtun2 v0.4s, v0.2d +# CHECK-NEXT: - - - - - - - - - 1.00 sqxtun2 v0.8h, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 srhadd v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 srhadd v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 srhadd v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sri d10, d12, #14 +# CHECK-NEXT: - - - - - - - - - 1.00 sri v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sri v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sri v0.2s, v0.2s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sri v0.4h, v0.4h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sri v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sri v0.8b, v0.8b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sri v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 srshl d16, d16, d16 +# CHECK-NEXT: - - - - - - - - - 1.00 srshl v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - - 1.00 srshl v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - - 1.00 srshl v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 srshr d19, d18, #7 +# CHECK-NEXT: - - - - - - - - - 1.00 srshr v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 srshr v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 srshr v0.2s, v0.2s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 srshr v0.4h, v0.4h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 srshr v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 srshr v0.8b, v0.8b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 srshr v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 srsra d15, d11, #19 +# CHECK-NEXT: - - - - - - - - - 1.00 srsra v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 srsra v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 srsra v0.2s, v0.2s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 srsra v0.4h, v0.4h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 srsra v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 srsra v0.8b, v0.8b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 srsra v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sshl d31, d31, d31 +# CHECK-NEXT: - - - - - - - - - 1.00 sshl v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - - 1.00 sshl v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - - 1.00 sshl v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - - 1.00 sshl v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - - 1.00 sshll v0.2d, v0.2s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sshll2 v0.4s, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sshr d15, d16, #12 +# CHECK-NEXT: - - - - - - - - - 1.00 sshr v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sshr v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sshr v0.2s, v0.2s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sshr v0.4h, v0.4h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sshr v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sshr v0.8b, v0.8b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 sshr v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ssra d18, d12, #21 +# CHECK-NEXT: - - - - - - - - - 1.00 ssra v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ssra v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ssra v0.2s, v0.2s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ssra v0.4h, v0.4h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ssra v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ssra v0.8b, v0.8b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ssra v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ssubl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ssubl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ssubl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ssubl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ssubl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ssubl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ssubw v0.2d, v0.2d, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ssubw v0.4s, v0.4s, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ssubw v0.8h, v0.8h, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ssubw2 v0.2d, v0.2d, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ssubw2 v0.4s, v0.4s, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ssubw2 v0.8h, v0.8h, v0.16b +# CHECK-NEXT: - - - 0.50 0.50 - - - 0.50 0.50 st1 { v0.16b }, [x0] +# CHECK-NEXT: - - - 1.50 1.50 0.33 0.33 0.33 1.50 1.50 st1 { v0.2d, v1.2d, v2.2d }, [x0], #48 +# CHECK-NEXT: - - - 2.00 2.00 - - - 2.00 2.00 st1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0] +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.00 1.00 st1 { v0.4s, v1.4s }, [sp], #32 +# CHECK-NEXT: - - - 1.50 1.50 - - - 1.50 1.50 st1 { v0.4s, v1.4s, v2.4s }, [sp] +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.00 1.00 st1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3 +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 st1 { v0.8h }, [x15], x2 +# CHECK-NEXT: - - - 1.00 1.00 - - - 1.00 1.00 st1 { v0.8h, v1.8h }, [x15] +# CHECK-NEXT: - - - 0.50 0.50 - - - 0.50 0.50 st1 { v0.d }[1], [x0] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 st1 { v0.d }[1], [x0], #8 +# CHECK-NEXT: - - - 1.00 1.00 0.33 0.33 0.33 1.00 1.00 st2 { v0.16b, v1.16b }, [x0], x1 +# CHECK-NEXT: - - - 0.50 0.50 - - - 0.50 0.50 st2 { v0.8b, v1.8b }, [x0] +# CHECK-NEXT: - - - 0.50 0.50 - - - 0.50 0.50 st2 { v0.s, v1.s }[3], [sp] +# CHECK-NEXT: - - - 0.50 0.50 0.33 0.33 0.33 0.50 0.50 st2 { v0.s, v1.s }[3], [sp], #8 +# CHECK-NEXT: - - - 1.00 1.00 - - - 1.00 1.00 st3 { v0.4h, v1.4h, v2.4h }, [x15] +# CHECK-NEXT: - - - 1.50 1.50 0.33 0.33 0.33 1.50 1.50 st3 { v0.8h, v1.8h, v2.8h }, [x15], x2 +# CHECK-NEXT: - - - 1.50 1.50 - - - 1.50 1.50 st3 { v0.h, v1.h, v2.h }[7], [x15] +# CHECK-NEXT: - - - 1.50 1.50 0.33 0.33 0.33 1.50 1.50 st3 { v0.h, v1.h, v2.h }[7], [x15], #6 +# CHECK-NEXT: - - - 1.50 1.50 - - - 1.50 1.50 st4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp] +# CHECK-NEXT: - - - 3.00 3.00 0.33 0.33 0.33 3.00 3.00 st4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64 +# CHECK-NEXT: - - - 1.50 1.50 - - - 1.50 1.50 st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0] +# CHECK-NEXT: - - - 1.50 1.50 0.33 0.33 0.33 1.50 1.50 st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0], x5 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sub d15, d5, d16 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 sub v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 suqadd b19, b14 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 suqadd d18, d22 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 suqadd h20, h15 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 suqadd s21, s12 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 suqadd v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 suqadd v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 suqadd v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 suqadd v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 suqadd v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 suqadd v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 suqadd v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 tbl v0.16b, { v0.16b }, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 tbl v0.16b, { v0.16b, v1.16b }, v0.16b +# CHECK-NEXT: - - - - - - - - 2.00 2.00 tbl v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b +# CHECK-NEXT: - - - - - - - - 1.50 1.50 tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 tbl v0.8b, { v0.16b }, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 tbl v0.8b, { v0.16b, v1.16b }, v0.8b +# CHECK-NEXT: - - - - - - - - 2.00 2.00 tbl v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b +# CHECK-NEXT: - - - - - - - - 1.50 1.50 tbl v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 tbx v0.16b, { v0.16b }, v0.16b +# CHECK-NEXT: - - - - - - - - 2.00 2.00 tbx v0.16b, { v0.16b, v1.16b }, v0.16b +# CHECK-NEXT: - - - - - - - - 1.50 1.50 tbx v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b +# CHECK-NEXT: - - - - - - - - 2.50 2.50 tbx v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 tbx v0.8b, { v0.16b }, v0.8b +# CHECK-NEXT: - - - - - - - - 2.00 2.00 tbx v0.8b, { v0.16b, v1.16b }, v0.8b +# CHECK-NEXT: - - - - - - - - 1.50 1.50 tbx v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b +# CHECK-NEXT: - - - - - - - - 2.50 2.50 tbx v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 trn1 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 trn1 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 trn1 v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 trn1 v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 trn1 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 trn1 v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 trn1 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 trn2 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 trn2 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 trn2 v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 trn2 v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 trn2 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 trn2 v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 trn2 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - - 1.00 uaba v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - - 1.00 uabal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - - 1.00 uabal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - - 1.00 uabal v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - - 1.00 uabal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - - 1.00 uabal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - - 1.00 uabal2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uabd v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uabdl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uabdl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uabdl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uabdl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uabdl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uabdl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - - 1.00 uadalp v0.1d, v0.2s +# CHECK-NEXT: - - - - - - - - - 1.00 uadalp v0.2d, v0.4s +# CHECK-NEXT: - - - - - - - - - 1.00 uadalp v0.2s, v0.4h +# CHECK-NEXT: - - - - - - - - - 1.00 uadalp v0.4h, v0.8b +# CHECK-NEXT: - - - - - - - - - 1.00 uadalp v0.4s, v0.8h +# CHECK-NEXT: - - - - - - - - - 1.00 uadalp v0.8h, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uaddl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uaddl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uaddl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uaddl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uaddl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uaddl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uaddlp v0.1d, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uaddlp v0.2d, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uaddlp v0.2s, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uaddlp v0.4h, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uaddlp v0.4s, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uaddlp v0.8h, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uaddw v0.2d, v0.2d, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uaddw v0.4s, v0.4s, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uaddw v0.8h, v0.8h, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uaddw2 v0.2d, v0.2d, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uaddw2 v0.4s, v0.4s, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uaddw2 v0.8h, v0.8h, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ucvtf d21, d14 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ucvtf d21, d14, #64 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ucvtf s22, s13 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ucvtf s22, s13, #32 +# CHECK-NEXT: - - - - - - - - 1.00 - ucvtf v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ucvtf v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - 1.00 - ucvtf v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ucvtf v0.2s, v0.2s, #3 +# CHECK-NEXT: - - - - - - - - 2.00 - ucvtf v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 2.00 - ucvtf v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ucvtf v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - 4.00 - ucvtf v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uhadd v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uhadd v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uhsub v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 umax v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 umax v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 umax v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 umaxp v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 umaxp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 umaxp v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 umin v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 umin v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 umin v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uminp v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uminp v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uminp v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 1.00 - umlal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 1.00 - umlal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 1.00 - umlal v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 1.00 - umlal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 1.00 - umlal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - umlal2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 1.00 - umlsl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 1.00 - umlsl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 1.00 - umlsl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 1.00 - umlsl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 1.00 - umlsl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - umlsl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 1.00 - umull v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 1.00 - umull v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 1.00 - umull v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 1.00 - umull2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 1.00 - umull2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 1.00 - umull2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uqadd h0, h1, h5 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uqadd v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - - 1.00 uqrshl b11, b20, b30 +# CHECK-NEXT: - - - - - - - - - 1.00 uqrshl s23, s20, s16 +# CHECK-NEXT: - - - - - - - - - 1.00 uqrshl v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - - 1.00 uqrshl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - - 1.00 uqrshl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - - 1.00 uqrshl v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uqrshrn b10, h12, #5 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uqrshrn h12, s10, #14 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uqrshrn s10, d10, #25 +# CHECK-NEXT: - - - - - - - - - 1.00 uqrshrn v0.2s, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 uqrshrn v0.4h, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 uqrshrn v0.8b, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 uqrshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 uqrshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 uqrshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshl b11, b20, b30 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshl b18, b15, #6 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshl d15, d12, #19 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshl h11, h18, #7 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshl s14, s19, #18 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshl s23, s20, s16 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshl v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshl v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - - 1.00 uqshl v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshl v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - - 1.00 uqshl v0.2s, v0.2s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshl v0.4h, v0.4h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshl v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - - 1.00 uqshl v0.8b, v0.8b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshl v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshl v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uqshrn b12, h10, #7 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uqshrn h10, s14, #5 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uqshrn s10, d12, #13 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshrn v0.2s, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshrn v0.4h, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshrn v0.8b, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 uqshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uqsub d16, d16, d16 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uqsub v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - - 1.00 uqxtn b18, h18 +# CHECK-NEXT: - - - - - - - - - 1.00 uqxtn h20, s17 +# CHECK-NEXT: - - - - - - - - - 1.00 uqxtn s19, d14 +# CHECK-NEXT: - - - - - - - - - 1.00 uqxtn v0.2s, v0.2d +# CHECK-NEXT: - - - - - - - - - 1.00 uqxtn v0.4h, v0.4s +# CHECK-NEXT: - - - - - - - - - 1.00 uqxtn v0.8b, v0.8h +# CHECK-NEXT: - - - - - - - - - 1.00 uqxtn2 v0.16b, v0.8h +# CHECK-NEXT: - - - - - - - - - 1.00 uqxtn2 v0.4s, v0.2d +# CHECK-NEXT: - - - - - - - - - 1.00 uqxtn2 v0.8h, v0.4s +# CHECK-NEXT: - - - - - - - - 1.00 - urecpe v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - urecpe v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 urhadd v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 urhadd v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 urhadd v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - - 1.00 urshl d8, d7, d4 +# CHECK-NEXT: - - - - - - - - - 1.00 urshl v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - - 1.00 urshl v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - - 1.00 urshl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - - 1.00 urshl v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 urshr d20, d23, #31 +# CHECK-NEXT: - - - - - - - - - 1.00 urshr v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 urshr v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 urshr v0.2s, v0.2s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 urshr v0.4h, v0.4h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 urshr v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 urshr v0.8b, v0.8b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 urshr v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - 1.00 - ursqrte v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 2.00 - ursqrte v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ursra d18, d10, #13 +# CHECK-NEXT: - - - - - - - - - 1.00 ursra v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ursra v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ursra v0.2s, v0.2s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ursra v0.4h, v0.4h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ursra v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ursra v0.8b, v0.8b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ursra v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ushl d0, d0, d0 +# CHECK-NEXT: - - - - - - - - - 1.00 ushl v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - - 1.00 ushl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - - 1.00 ushl v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - - 1.00 ushll v0.4s, v0.4h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ushll2 v0.8h, v0.16b, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 ushr d10, d17, #18 +# CHECK-NEXT: - - - - - - - - - 1.00 ushr v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ushr v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ushr v0.2s, v0.2s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ushr v0.4h, v0.4h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ushr v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ushr v0.8b, v0.8b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 ushr v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usqadd b19, b14 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usqadd d18, d22 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usqadd h20, h15 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usqadd s21, s12 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usqadd v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usqadd v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usqadd v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usqadd v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usqadd v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usqadd v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usqadd v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usra d20, d13, #61 +# CHECK-NEXT: - - - - - - - - - 1.00 usra v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 usra v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 usra v0.2s, v0.2s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 usra v0.4h, v0.4h, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 usra v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 usra v0.8b, v0.8b, #3 +# CHECK-NEXT: - - - - - - - - - 1.00 usra v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usubl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usubl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usubl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usubl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usubl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usubl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usubw v0.2d, v0.2d, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usubw v0.4s, v0.4s, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usubw v0.8h, v0.8h, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usubw2 v0.2d, v0.2d, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usubw2 v0.4s, v0.4s, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 usubw2 v0.8h, v0.8h, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uzp1 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uzp1 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uzp1 v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uzp1 v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uzp1 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uzp1 v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uzp1 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uzp2 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uzp2 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uzp2 v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uzp2 v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uzp2 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uzp2 v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 uzp2 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 xtn v0.2s, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 xtn v0.4h, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 xtn v0.8b, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 xtn2 v0.16b, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 xtn2 v0.4s, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 xtn2 v0.8h, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 zip1 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 zip1 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 zip1 v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 zip1 v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 zip1 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 zip1 v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 zip1 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 zip2 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 zip2 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - - - - - 0.50 0.50 zip2 v0.2s, v0.2s, v0.2s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 zip2 v0.4h, v0.4h, v0.4h +# CHECK-NEXT: - - - - - - - - 0.50 0.50 zip2 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - - - - - 0.50 0.50 zip2 v0.8b, v0.8b, v0.8b +# CHECK-NEXT: - - - - - - - - 0.50 0.50 zip2 v0.8h, v0.8h, v0.8h