diff --git a/llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll b/llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll --- a/llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll +++ b/llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll @@ -62,7 +62,8 @@ ; bx lr define i32 @foo(i32 %a, i32 %b) "frame-pointer"="all" { ; ARM-ENABLE-LABEL: foo: -; ARM-ENABLE: @ %bb.0: +; ARM-ENABLE: Lfunc_begin0: +; ARM-ENABLE-NEXT: @ %bb.0: ; ARM-ENABLE-NEXT: cmp r0, r1 ; ARM-ENABLE-NEXT: bge LBB0_2 ; ARM-ENABLE-NEXT: @ %bb.1: @ %true @@ -76,9 +77,11 @@ ; ARM-ENABLE-NEXT: pop {r7, lr} ; ARM-ENABLE-NEXT: LBB0_2: @ %false ; ARM-ENABLE-NEXT: bx lr +; ARM-ENABLE-NEXT: Lfunc_end0: ; ; ARM-DISABLE-LABEL: foo: -; ARM-DISABLE: @ %bb.0: +; ARM-DISABLE: Lfunc_begin0: +; ARM-DISABLE-NEXT: @ %bb.0: ; ARM-DISABLE-NEXT: push {r7, lr} ; ARM-DISABLE-NEXT: mov r7, sp ; ARM-DISABLE-NEXT: sub sp, sp, #4 @@ -92,9 +95,11 @@ ; ARM-DISABLE-NEXT: LBB0_2: @ %false ; ARM-DISABLE-NEXT: mov sp, r7 ; ARM-DISABLE-NEXT: pop {r7, pc} +; ARM-DISABLE-NEXT: Lfunc_end0: ; ; THUMB-ENABLE-LABEL: foo: -; THUMB-ENABLE: @ %bb.0: +; THUMB-ENABLE: Lfunc_begin0: +; THUMB-ENABLE-NEXT: @ %bb.0: ; THUMB-ENABLE-NEXT: cmp r0, r1 ; THUMB-ENABLE-NEXT: bge LBB0_2 ; THUMB-ENABLE-NEXT: @ %bb.1: @ %true @@ -108,9 +113,11 @@ ; THUMB-ENABLE-NEXT: pop.w {r7, lr} ; THUMB-ENABLE-NEXT: LBB0_2: @ %false ; THUMB-ENABLE-NEXT: bx lr +; THUMB-ENABLE-NEXT: Lfunc_end0: ; ; THUMB-DISABLE-LABEL: foo: -; THUMB-DISABLE: @ %bb.0: +; THUMB-DISABLE: Lfunc_begin0: +; THUMB-DISABLE-NEXT: @ %bb.0: ; THUMB-DISABLE-NEXT: push {r7, lr} ; THUMB-DISABLE-NEXT: mov r7, sp ; THUMB-DISABLE-NEXT: sub sp, #4 @@ -124,6 +131,7 @@ ; THUMB-DISABLE-NEXT: LBB0_2: @ %false ; THUMB-DISABLE-NEXT: add sp, #4 ; THUMB-DISABLE-NEXT: pop {r7, pc} +; THUMB-DISABLE-NEXT: Lfunc_end0: %tmp = alloca i32, align 4 %tmp2 = icmp slt i32 %a, %b br i1 %tmp2, label %true, label %false @@ -190,7 +198,8 @@ ; bx lr define i32 @freqSaveAndRestoreOutsideLoop(i32 %cond, i32 %N) "frame-pointer"="all" { ; ARM-ENABLE-LABEL: freqSaveAndRestoreOutsideLoop: -; ARM-ENABLE: @ %bb.0: @ %entry +; ARM-ENABLE: Lfunc_begin1: +; ARM-ENABLE-NEXT: @ %bb.0: @ %entry ; ARM-ENABLE-NEXT: cmp r0, #0 ; ARM-ENABLE-NEXT: beq LBB1_4 ; ARM-ENABLE-NEXT: @ %bb.1: @ %for.preheader @@ -215,9 +224,11 @@ ; ARM-ENABLE-NEXT: LBB1_4: @ %if.else ; ARM-ENABLE-NEXT: lsl r0, r1, #1 ; ARM-ENABLE-NEXT: bx lr +; ARM-ENABLE-NEXT: Lfunc_end1: ; ; ARM-DISABLE-LABEL: freqSaveAndRestoreOutsideLoop: -; ARM-DISABLE: @ %bb.0: @ %entry +; ARM-DISABLE: Lfunc_begin1: +; ARM-DISABLE-NEXT: @ %bb.0: @ %entry ; ARM-DISABLE-NEXT: push {r4, r7, lr} ; ARM-DISABLE-NEXT: add r7, sp, #4 ; ARM-DISABLE-NEXT: cmp r0, #0 @@ -242,9 +253,11 @@ ; ARM-DISABLE-NEXT: LBB1_4: @ %if.else ; ARM-DISABLE-NEXT: lsl r0, r1, #1 ; ARM-DISABLE-NEXT: pop {r4, r7, pc} +; ARM-DISABLE-NEXT: Lfunc_end1: ; ; THUMB-ENABLE-LABEL: freqSaveAndRestoreOutsideLoop: -; THUMB-ENABLE: @ %bb.0: @ %entry +; THUMB-ENABLE: Lfunc_begin1: +; THUMB-ENABLE-NEXT: @ %bb.0: @ %entry ; THUMB-ENABLE-NEXT: cbz r0, LBB1_4 ; THUMB-ENABLE-NEXT: @ %bb.1: @ %for.preheader ; THUMB-ENABLE-NEXT: push {r4, r7, lr} @@ -268,9 +281,11 @@ ; THUMB-ENABLE-NEXT: LBB1_4: @ %if.else ; THUMB-ENABLE-NEXT: lsls r0, r1, #1 ; THUMB-ENABLE-NEXT: bx lr +; THUMB-ENABLE-NEXT: Lfunc_end1: ; ; THUMB-DISABLE-LABEL: freqSaveAndRestoreOutsideLoop: -; THUMB-DISABLE: @ %bb.0: @ %entry +; THUMB-DISABLE: Lfunc_begin1: +; THUMB-DISABLE-NEXT: @ %bb.0: @ %entry ; THUMB-DISABLE-NEXT: push {r4, r7, lr} ; THUMB-DISABLE-NEXT: add r7, sp, #4 ; THUMB-DISABLE-NEXT: cbz r0, LBB1_4 @@ -294,6 +309,7 @@ ; THUMB-DISABLE-NEXT: LBB1_4: @ %if.else ; THUMB-DISABLE-NEXT: lsls r0, r1, #1 ; THUMB-DISABLE-NEXT: pop {r4, r7, pc} +; THUMB-DISABLE-NEXT: Lfunc_end1: entry: %tobool = icmp eq i32 %cond, 0 br i1 %tobool, label %if.else, label %for.preheader @@ -394,7 +410,8 @@ ; THUMB-NEXT: @ InlineAsm End ; THUMB-NEXT: pop {r4, r7, pc} ; ARM-ENABLE-LABEL: freqSaveAndRestoreOutsideLoop2: -; ARM-ENABLE: @ %bb.0: @ %entry +; ARM-ENABLE: Lfunc_begin2: +; ARM-ENABLE-NEXT: @ %bb.0: @ %entry ; ARM-ENABLE-NEXT: push {r4, r7, lr} ; ARM-ENABLE-NEXT: add r7, sp, #4 ; ARM-ENABLE-NEXT: mov r0, #0 @@ -415,9 +432,11 @@ ; ARM-ENABLE-NEXT: nop ; ARM-ENABLE-NEXT: @ InlineAsm End ; ARM-ENABLE-NEXT: pop {r4, r7, pc} +; ARM-ENABLE-NEXT: Lfunc_end2: ; ; ARM-DISABLE-LABEL: freqSaveAndRestoreOutsideLoop2: -; ARM-DISABLE: @ %bb.0: @ %entry +; ARM-DISABLE: Lfunc_begin2: +; ARM-DISABLE-NEXT: @ %bb.0: @ %entry ; ARM-DISABLE-NEXT: push {r4, r7, lr} ; ARM-DISABLE-NEXT: add r7, sp, #4 ; ARM-DISABLE-NEXT: mov r0, #0 @@ -438,9 +457,11 @@ ; ARM-DISABLE-NEXT: nop ; ARM-DISABLE-NEXT: @ InlineAsm End ; ARM-DISABLE-NEXT: pop {r4, r7, pc} +; ARM-DISABLE-NEXT: Lfunc_end2: ; ; THUMB-ENABLE-LABEL: freqSaveAndRestoreOutsideLoop2: -; THUMB-ENABLE: @ %bb.0: @ %entry +; THUMB-ENABLE: Lfunc_begin2: +; THUMB-ENABLE-NEXT: @ %bb.0: @ %entry ; THUMB-ENABLE-NEXT: push {r4, r7, lr} ; THUMB-ENABLE-NEXT: add r7, sp, #4 ; THUMB-ENABLE-NEXT: movs r0, #0 @@ -461,9 +482,11 @@ ; THUMB-ENABLE-NEXT: nop ; THUMB-ENABLE-NEXT: @ InlineAsm End ; THUMB-ENABLE-NEXT: pop {r4, r7, pc} +; THUMB-ENABLE-NEXT: Lfunc_end2: ; ; THUMB-DISABLE-LABEL: freqSaveAndRestoreOutsideLoop2: -; THUMB-DISABLE: @ %bb.0: @ %entry +; THUMB-DISABLE: Lfunc_begin2: +; THUMB-DISABLE-NEXT: @ %bb.0: @ %entry ; THUMB-DISABLE-NEXT: push {r4, r7, lr} ; THUMB-DISABLE-NEXT: add r7, sp, #4 ; THUMB-DISABLE-NEXT: movs r0, #0 @@ -484,6 +507,7 @@ ; THUMB-DISABLE-NEXT: nop ; THUMB-DISABLE-NEXT: @ InlineAsm End ; THUMB-DISABLE-NEXT: pop {r4, r7, pc} +; THUMB-DISABLE-NEXT: Lfunc_end2: entry: br label %for.preheader @@ -555,7 +579,8 @@ ; bx lr define i32 @loopInfoSaveOutsideLoop(i32 %cond, i32 %N) "frame-pointer"="all" { ; ARM-ENABLE-LABEL: loopInfoSaveOutsideLoop: -; ARM-ENABLE: @ %bb.0: @ %entry +; ARM-ENABLE: Lfunc_begin3: +; ARM-ENABLE-NEXT: @ %bb.0: @ %entry ; ARM-ENABLE-NEXT: cmp r0, #0 ; ARM-ENABLE-NEXT: beq LBB3_4 ; ARM-ENABLE-NEXT: @ %bb.1: @ %for.preheader @@ -583,9 +608,11 @@ ; ARM-ENABLE-NEXT: LBB3_4: @ %if.else ; ARM-ENABLE-NEXT: lsl r0, r1, #1 ; ARM-ENABLE-NEXT: bx lr +; ARM-ENABLE-NEXT: Lfunc_end3: ; ; ARM-DISABLE-LABEL: loopInfoSaveOutsideLoop: -; ARM-DISABLE: @ %bb.0: @ %entry +; ARM-DISABLE: Lfunc_begin3: +; ARM-DISABLE-NEXT: @ %bb.0: @ %entry ; ARM-DISABLE-NEXT: push {r4, r7, lr} ; ARM-DISABLE-NEXT: add r7, sp, #4 ; ARM-DISABLE-NEXT: cmp r0, #0 @@ -613,9 +640,11 @@ ; ARM-DISABLE-NEXT: LBB3_4: @ %if.else ; ARM-DISABLE-NEXT: lsl r0, r1, #1 ; ARM-DISABLE-NEXT: pop {r4, r7, pc} +; ARM-DISABLE-NEXT: Lfunc_end3: ; ; THUMB-ENABLE-LABEL: loopInfoSaveOutsideLoop: -; THUMB-ENABLE: @ %bb.0: @ %entry +; THUMB-ENABLE: Lfunc_begin3: +; THUMB-ENABLE-NEXT: @ %bb.0: @ %entry ; THUMB-ENABLE-NEXT: cbz r0, LBB3_4 ; THUMB-ENABLE-NEXT: @ %bb.1: @ %for.preheader ; THUMB-ENABLE-NEXT: push {r4, r7, lr} @@ -642,9 +671,11 @@ ; THUMB-ENABLE-NEXT: LBB3_4: @ %if.else ; THUMB-ENABLE-NEXT: lsls r0, r1, #1 ; THUMB-ENABLE-NEXT: bx lr +; THUMB-ENABLE-NEXT: Lfunc_end3: ; ; THUMB-DISABLE-LABEL: loopInfoSaveOutsideLoop: -; THUMB-DISABLE: @ %bb.0: @ %entry +; THUMB-DISABLE: Lfunc_begin3: +; THUMB-DISABLE-NEXT: @ %bb.0: @ %entry ; THUMB-DISABLE-NEXT: push {r4, r7, lr} ; THUMB-DISABLE-NEXT: add r7, sp, #4 ; THUMB-DISABLE-NEXT: cbz r0, LBB3_4 @@ -671,6 +702,7 @@ ; THUMB-DISABLE-NEXT: LBB3_4: @ %if.else ; THUMB-DISABLE-NEXT: lsls r0, r1, #1 ; THUMB-DISABLE-NEXT: pop {r4, r7, pc} +; THUMB-DISABLE-NEXT: Lfunc_end3: entry: %tobool = icmp eq i32 %cond, 0 br i1 %tobool, label %if.else, label %for.preheader @@ -751,7 +783,8 @@ ; bx lr define i32 @loopInfoRestoreOutsideLoop(i32 %cond, i32 %N) "frame-pointer"="all" nounwind { ; ARM-ENABLE-LABEL: loopInfoRestoreOutsideLoop: -; ARM-ENABLE: @ %bb.0: @ %entry +; ARM-ENABLE: Lfunc_begin4: +; ARM-ENABLE-NEXT: @ %bb.0: @ %entry ; ARM-ENABLE-NEXT: cmp r0, #0 ; ARM-ENABLE-NEXT: beq LBB4_4 ; ARM-ENABLE-NEXT: @ %bb.1: @ %if.then @@ -776,9 +809,11 @@ ; ARM-ENABLE-NEXT: LBB4_4: @ %if.else ; ARM-ENABLE-NEXT: lsl r0, r1, #1 ; ARM-ENABLE-NEXT: bx lr +; ARM-ENABLE-NEXT: Lfunc_end4: ; ; ARM-DISABLE-LABEL: loopInfoRestoreOutsideLoop: -; ARM-DISABLE: @ %bb.0: @ %entry +; ARM-DISABLE: Lfunc_begin4: +; ARM-DISABLE-NEXT: @ %bb.0: @ %entry ; ARM-DISABLE-NEXT: push {r4, r7, lr} ; ARM-DISABLE-NEXT: add r7, sp, #4 ; ARM-DISABLE-NEXT: cmp r0, #0 @@ -803,9 +838,11 @@ ; ARM-DISABLE-NEXT: LBB4_4: @ %if.else ; ARM-DISABLE-NEXT: lsl r0, r1, #1 ; ARM-DISABLE-NEXT: pop {r4, r7, pc} +; ARM-DISABLE-NEXT: Lfunc_end4: ; ; THUMB-ENABLE-LABEL: loopInfoRestoreOutsideLoop: -; THUMB-ENABLE: @ %bb.0: @ %entry +; THUMB-ENABLE: Lfunc_begin4: +; THUMB-ENABLE-NEXT: @ %bb.0: @ %entry ; THUMB-ENABLE-NEXT: cbz r0, LBB4_4 ; THUMB-ENABLE-NEXT: @ %bb.1: @ %if.then ; THUMB-ENABLE-NEXT: push {r4, r7, lr} @@ -829,9 +866,11 @@ ; THUMB-ENABLE-NEXT: LBB4_4: @ %if.else ; THUMB-ENABLE-NEXT: lsls r0, r1, #1 ; THUMB-ENABLE-NEXT: bx lr +; THUMB-ENABLE-NEXT: Lfunc_end4: ; ; THUMB-DISABLE-LABEL: loopInfoRestoreOutsideLoop: -; THUMB-DISABLE: @ %bb.0: @ %entry +; THUMB-DISABLE: Lfunc_begin4: +; THUMB-DISABLE-NEXT: @ %bb.0: @ %entry ; THUMB-DISABLE-NEXT: push {r4, r7, lr} ; THUMB-DISABLE-NEXT: add r7, sp, #4 ; THUMB-DISABLE-NEXT: cbz r0, LBB4_4 @@ -855,6 +894,7 @@ ; THUMB-DISABLE-NEXT: LBB4_4: @ %if.else ; THUMB-DISABLE-NEXT: lsls r0, r1, #1 ; THUMB-DISABLE-NEXT: pop {r4, r7, pc} +; THUMB-DISABLE-NEXT: Lfunc_end4: entry: %tobool = icmp eq i32 %cond, 0 br i1 %tobool, label %if.else, label %if.then @@ -901,24 +941,32 @@ ; THUMB-NEXT: movs r0, #0 ; THUMB-NEXT: bx lr ; ARM-ENABLE-LABEL: emptyFrame: -; ARM-ENABLE: @ %bb.0: @ %entry +; ARM-ENABLE: Lfunc_begin5: +; ARM-ENABLE-NEXT: @ %bb.0: @ %entry ; ARM-ENABLE-NEXT: mov r0, #0 ; ARM-ENABLE-NEXT: bx lr +; ARM-ENABLE-NEXT: Lfunc_end5: ; ; ARM-DISABLE-LABEL: emptyFrame: -; ARM-DISABLE: @ %bb.0: @ %entry +; ARM-DISABLE: Lfunc_begin5: +; ARM-DISABLE-NEXT: @ %bb.0: @ %entry ; ARM-DISABLE-NEXT: mov r0, #0 ; ARM-DISABLE-NEXT: bx lr +; ARM-DISABLE-NEXT: Lfunc_end5: ; ; THUMB-ENABLE-LABEL: emptyFrame: -; THUMB-ENABLE: @ %bb.0: @ %entry +; THUMB-ENABLE: Lfunc_begin5: +; THUMB-ENABLE-NEXT: @ %bb.0: @ %entry ; THUMB-ENABLE-NEXT: movs r0, #0 ; THUMB-ENABLE-NEXT: bx lr +; THUMB-ENABLE-NEXT: Lfunc_end5: ; ; THUMB-DISABLE-LABEL: emptyFrame: -; THUMB-DISABLE: @ %bb.0: @ %entry +; THUMB-DISABLE: Lfunc_begin5: +; THUMB-DISABLE-NEXT: @ %bb.0: @ %entry ; THUMB-DISABLE-NEXT: movs r0, #0 ; THUMB-DISABLE-NEXT: bx lr +; THUMB-DISABLE-NEXT: Lfunc_end5: entry: ret i32 0 } @@ -962,7 +1010,8 @@ ; bx lr define i32 @inlineAsm(i32 %cond, i32 %N) "frame-pointer"="all" { ; ARM-ENABLE-LABEL: inlineAsm: -; ARM-ENABLE: @ %bb.0: @ %entry +; ARM-ENABLE: Lfunc_begin6: +; ARM-ENABLE-NEXT: @ %bb.0: @ %entry ; ARM-ENABLE-NEXT: cmp r0, #0 ; ARM-ENABLE-NEXT: beq LBB6_4 ; ARM-ENABLE-NEXT: @ %bb.1: @ %for.preheader @@ -988,9 +1037,11 @@ ; ARM-ENABLE-NEXT: LBB6_4: @ %if.else ; ARM-ENABLE-NEXT: lsl r0, r1, #1 ; ARM-ENABLE-NEXT: bx lr +; ARM-ENABLE-NEXT: Lfunc_end6: ; ; ARM-DISABLE-LABEL: inlineAsm: -; ARM-DISABLE: @ %bb.0: @ %entry +; ARM-DISABLE: Lfunc_begin6: +; ARM-DISABLE-NEXT: @ %bb.0: @ %entry ; ARM-DISABLE-NEXT: push {r4, r7, lr} ; ARM-DISABLE-NEXT: add r7, sp, #4 ; ARM-DISABLE-NEXT: cmp r0, #0 @@ -1016,9 +1067,11 @@ ; ARM-DISABLE-NEXT: LBB6_4: @ %if.else ; ARM-DISABLE-NEXT: lsl r0, r1, #1 ; ARM-DISABLE-NEXT: pop {r4, r7, pc} +; ARM-DISABLE-NEXT: Lfunc_end6: ; ; THUMB-ENABLE-LABEL: inlineAsm: -; THUMB-ENABLE: @ %bb.0: @ %entry +; THUMB-ENABLE: Lfunc_begin6: +; THUMB-ENABLE-NEXT: @ %bb.0: @ %entry ; THUMB-ENABLE-NEXT: cbz r0, LBB6_4 ; THUMB-ENABLE-NEXT: @ %bb.1: @ %for.preheader ; THUMB-ENABLE-NEXT: push {r4, r7, lr} @@ -1043,9 +1096,11 @@ ; THUMB-ENABLE-NEXT: LBB6_4: @ %if.else ; THUMB-ENABLE-NEXT: lsls r0, r1, #1 ; THUMB-ENABLE-NEXT: bx lr +; THUMB-ENABLE-NEXT: Lfunc_end6: ; ; THUMB-DISABLE-LABEL: inlineAsm: -; THUMB-DISABLE: @ %bb.0: @ %entry +; THUMB-DISABLE: Lfunc_begin6: +; THUMB-DISABLE-NEXT: @ %bb.0: @ %entry ; THUMB-DISABLE-NEXT: push {r4, r7, lr} ; THUMB-DISABLE-NEXT: add r7, sp, #4 ; THUMB-DISABLE-NEXT: cbz r0, LBB6_4 @@ -1070,6 +1125,7 @@ ; THUMB-DISABLE-NEXT: LBB6_4: @ %if.else ; THUMB-DISABLE-NEXT: lsls r0, r1, #1 ; THUMB-DISABLE-NEXT: pop {r4, r7, pc} +; THUMB-DISABLE-NEXT: Lfunc_end6: entry: %tobool = icmp eq i32 %cond, 0 br i1 %tobool, label %if.else, label %for.preheader @@ -1140,7 +1196,8 @@ ; pop {r7, pc} define i32 @callVariadicFunc(i32 %cond, i32 %N) "frame-pointer"="all" { ; ARM-ENABLE-LABEL: callVariadicFunc: -; ARM-ENABLE: @ %bb.0: @ %entry +; ARM-ENABLE: Lfunc_begin7: +; ARM-ENABLE-NEXT: @ %bb.0: @ %entry ; ARM-ENABLE-NEXT: cmp r0, #0 ; ARM-ENABLE-NEXT: beq LBB7_2 ; ARM-ENABLE-NEXT: @ %bb.1: @ %if.then @@ -1160,9 +1217,11 @@ ; ARM-ENABLE-NEXT: LBB7_2: @ %if.else ; ARM-ENABLE-NEXT: lsl r0, r1, #1 ; ARM-ENABLE-NEXT: bx lr +; ARM-ENABLE-NEXT: Lfunc_end7: ; ; ARM-DISABLE-LABEL: callVariadicFunc: -; ARM-DISABLE: @ %bb.0: @ %entry +; ARM-DISABLE: Lfunc_begin7: +; ARM-DISABLE-NEXT: @ %bb.0: @ %entry ; ARM-DISABLE-NEXT: push {r7, lr} ; ARM-DISABLE-NEXT: mov r7, sp ; ARM-DISABLE-NEXT: sub sp, sp, #12 @@ -1183,9 +1242,11 @@ ; ARM-DISABLE-NEXT: lsl r0, r1, #1 ; ARM-DISABLE-NEXT: mov sp, r7 ; ARM-DISABLE-NEXT: pop {r7, pc} +; ARM-DISABLE-NEXT: Lfunc_end7: ; ; THUMB-ENABLE-LABEL: callVariadicFunc: -; THUMB-ENABLE: @ %bb.0: @ %entry +; THUMB-ENABLE: Lfunc_begin7: +; THUMB-ENABLE-NEXT: @ %bb.0: @ %entry ; THUMB-ENABLE-NEXT: cbz r0, LBB7_2 ; THUMB-ENABLE-NEXT: @ %bb.1: @ %if.then ; THUMB-ENABLE-NEXT: push {r7, lr} @@ -1203,9 +1264,11 @@ ; THUMB-ENABLE-NEXT: LBB7_2: @ %if.else ; THUMB-ENABLE-NEXT: lsls r0, r1, #1 ; THUMB-ENABLE-NEXT: bx lr +; THUMB-ENABLE-NEXT: Lfunc_end7: ; ; THUMB-DISABLE-LABEL: callVariadicFunc: -; THUMB-DISABLE: @ %bb.0: @ %entry +; THUMB-DISABLE: Lfunc_begin7: +; THUMB-DISABLE-NEXT: @ %bb.0: @ %entry ; THUMB-DISABLE-NEXT: push {r7, lr} ; THUMB-DISABLE-NEXT: mov r7, sp ; THUMB-DISABLE-NEXT: sub sp, #12 @@ -1224,6 +1287,7 @@ ; THUMB-DISABLE-NEXT: lsls r0, r1, #1 ; THUMB-DISABLE-NEXT: add sp, #12 ; THUMB-DISABLE-NEXT: pop {r7, pc} +; THUMB-DISABLE-NEXT: Lfunc_end7: entry: %tobool = icmp eq i32 %cond, 0 br i1 %tobool, label %if.else, label %if.then @@ -1272,7 +1336,8 @@ ; pop define i32 @noreturn(i8 signext %bad_thing) "frame-pointer"="all" { ; ARM-ENABLE-LABEL: noreturn: -; ARM-ENABLE: @ %bb.0: @ %entry +; ARM-ENABLE: Lfunc_begin8: +; ARM-ENABLE-NEXT: @ %bb.0: @ %entry ; ARM-ENABLE-NEXT: cmp r0, #0 ; ARM-ENABLE-NEXT: bne LBB8_2 ; ARM-ENABLE-NEXT: @ %bb.1: @ %if.end @@ -1285,9 +1350,11 @@ ; ARM-ENABLE-NEXT: mov r0, #1 ; ARM-ENABLE-NEXT: @ InlineAsm End ; ARM-ENABLE-NEXT: bl _abort +; ARM-ENABLE-NEXT: Lfunc_end8: ; ; ARM-DISABLE-LABEL: noreturn: -; ARM-DISABLE: @ %bb.0: @ %entry +; ARM-DISABLE: Lfunc_begin8: +; ARM-DISABLE-NEXT: @ %bb.0: @ %entry ; ARM-DISABLE-NEXT: push {r4, r7, lr} ; ARM-DISABLE-NEXT: add r7, sp, #4 ; ARM-DISABLE-NEXT: cmp r0, #0 @@ -1300,9 +1367,11 @@ ; ARM-DISABLE-NEXT: mov r0, #1 ; ARM-DISABLE-NEXT: @ InlineAsm End ; ARM-DISABLE-NEXT: bl _abort +; ARM-DISABLE-NEXT: Lfunc_end8: ; ; THUMB-ENABLE-LABEL: noreturn: -; THUMB-ENABLE: @ %bb.0: @ %entry +; THUMB-ENABLE: Lfunc_begin8: +; THUMB-ENABLE-NEXT: @ %bb.0: @ %entry ; THUMB-ENABLE-NEXT: cbnz r0, LBB8_2 ; THUMB-ENABLE-NEXT: @ %bb.1: @ %if.end ; THUMB-ENABLE-NEXT: movs r0, #42 @@ -1314,9 +1383,11 @@ ; THUMB-ENABLE-NEXT: mov.w r0, #1 ; THUMB-ENABLE-NEXT: @ InlineAsm End ; THUMB-ENABLE-NEXT: bl _abort +; THUMB-ENABLE-NEXT: Lfunc_end8: ; ; THUMB-DISABLE-LABEL: noreturn: -; THUMB-DISABLE: @ %bb.0: @ %entry +; THUMB-DISABLE: Lfunc_begin8: +; THUMB-DISABLE-NEXT: @ %bb.0: @ %entry ; THUMB-DISABLE-NEXT: push {r4, r7, lr} ; THUMB-DISABLE-NEXT: add r7, sp, #4 ; THUMB-DISABLE-NEXT: cbnz r0, LBB8_2 @@ -1328,6 +1399,7 @@ ; THUMB-DISABLE-NEXT: mov.w r0, #1 ; THUMB-DISABLE-NEXT: @ InlineAsm End ; THUMB-DISABLE-NEXT: bl _abort +; THUMB-DISABLE-NEXT: Lfunc_end8: entry: %tobool = icmp eq i8 %bad_thing, 0 br i1 %tobool, label %if.end, label %if.abort @@ -1400,7 +1472,8 @@ ; THUMB-NEXT: mov sp, r4 ; THUMB-NEXT: pop {r4, r5, r7, pc} ; ARM-ENABLE-LABEL: infiniteloop: -; ARM-ENABLE: @ %bb.0: @ %entry +; ARM-ENABLE: Lfunc_begin9: +; ARM-ENABLE-NEXT: @ %bb.0: @ %entry ; ARM-ENABLE-NEXT: push {r4, r5, r7, lr} ; ARM-ENABLE-NEXT: add r7, sp, #8 ; ARM-ENABLE-NEXT: mov r0, #0 @@ -1420,9 +1493,11 @@ ; ARM-ENABLE-NEXT: LBB9_3: @ %if.end ; ARM-ENABLE-NEXT: sub sp, r7, #8 ; ARM-ENABLE-NEXT: pop {r4, r5, r7, pc} +; ARM-ENABLE-NEXT: Lfunc_end9: ; ; ARM-DISABLE-LABEL: infiniteloop: -; ARM-DISABLE: @ %bb.0: @ %entry +; ARM-DISABLE: Lfunc_begin9: +; ARM-DISABLE-NEXT: @ %bb.0: @ %entry ; ARM-DISABLE-NEXT: push {r4, r5, r7, lr} ; ARM-DISABLE-NEXT: add r7, sp, #8 ; ARM-DISABLE-NEXT: mov r0, #0 @@ -1442,9 +1517,11 @@ ; ARM-DISABLE-NEXT: LBB9_3: @ %if.end ; ARM-DISABLE-NEXT: sub sp, r7, #8 ; ARM-DISABLE-NEXT: pop {r4, r5, r7, pc} +; ARM-DISABLE-NEXT: Lfunc_end9: ; ; THUMB-ENABLE-LABEL: infiniteloop: -; THUMB-ENABLE: @ %bb.0: @ %entry +; THUMB-ENABLE: Lfunc_begin9: +; THUMB-ENABLE-NEXT: @ %bb.0: @ %entry ; THUMB-ENABLE-NEXT: push {r4, r5, r7, lr} ; THUMB-ENABLE-NEXT: add r7, sp, #8 ; THUMB-ENABLE-NEXT: movs r0, #0 @@ -1465,9 +1542,11 @@ ; THUMB-ENABLE-NEXT: sub.w r4, r7, #8 ; THUMB-ENABLE-NEXT: mov sp, r4 ; THUMB-ENABLE-NEXT: pop {r4, r5, r7, pc} +; THUMB-ENABLE-NEXT: Lfunc_end9: ; ; THUMB-DISABLE-LABEL: infiniteloop: -; THUMB-DISABLE: @ %bb.0: @ %entry +; THUMB-DISABLE: Lfunc_begin9: +; THUMB-DISABLE-NEXT: @ %bb.0: @ %entry ; THUMB-DISABLE-NEXT: push {r4, r5, r7, lr} ; THUMB-DISABLE-NEXT: add r7, sp, #8 ; THUMB-DISABLE-NEXT: movs r0, #0 @@ -1488,6 +1567,7 @@ ; THUMB-DISABLE-NEXT: sub.w r4, r7, #8 ; THUMB-DISABLE-NEXT: mov sp, r4 ; THUMB-DISABLE-NEXT: pop {r4, r5, r7, pc} +; THUMB-DISABLE-NEXT: Lfunc_end9: entry: br i1 undef, label %if.then, label %if.end @@ -1510,6 +1590,119 @@ ; infiniteloop2 ; pop define void @infiniteloop2() "frame-pointer"="all" { +; ARM-ENABLE-LABEL: infiniteloop2: +; ARM-ENABLE: Lfunc_begin10: +; ARM-ENABLE-NEXT: @ %bb.0: @ %entry +; ARM-ENABLE-NEXT: push {r4, r5, r7, lr} +; ARM-ENABLE-NEXT: add r7, sp, #8 +; ARM-ENABLE-NEXT: mov r0, #0 +; ARM-ENABLE-NEXT: cmp r0, #0 +; ARM-ENABLE-NEXT: bne LBB10_3 +; ARM-ENABLE-NEXT: @ %bb.1: @ %if.then +; ARM-ENABLE-NEXT: sub r1, sp, #16 +; ARM-ENABLE-NEXT: mov sp, r1 +; ARM-ENABLE-NEXT: @ InlineAsm Start +; ARM-ENABLE-NEXT: mov r2, #0 +; ARM-ENABLE-NEXT: @ InlineAsm End +; ARM-ENABLE-NEXT: LBB10_2: @ %for.body +; ARM-ENABLE-NEXT: @ =>This Inner Loop Header: Depth=1 +; ARM-ENABLE-NEXT: add r0, r2, r0 +; ARM-ENABLE-NEXT: str r0, [r1] +; ARM-ENABLE-NEXT: @ InlineAsm Start +; ARM-ENABLE-NEXT: nop +; ARM-ENABLE-NEXT: @ InlineAsm End +; ARM-ENABLE-NEXT: mov r0, #1 +; ARM-ENABLE-NEXT: b LBB10_2 +; ARM-ENABLE-NEXT: LBB10_3: @ %if.end +; ARM-ENABLE-NEXT: sub sp, r7, #8 +; ARM-ENABLE-NEXT: pop {r4, r5, r7, pc} +; ARM-ENABLE-NEXT: Lfunc_end10: +; +; ARM-DISABLE-LABEL: infiniteloop2: +; ARM-DISABLE: Lfunc_begin10: +; ARM-DISABLE-NEXT: @ %bb.0: @ %entry +; ARM-DISABLE-NEXT: push {r4, r5, r7, lr} +; ARM-DISABLE-NEXT: add r7, sp, #8 +; ARM-DISABLE-NEXT: mov r0, #0 +; ARM-DISABLE-NEXT: cmp r0, #0 +; ARM-DISABLE-NEXT: bne LBB10_3 +; ARM-DISABLE-NEXT: @ %bb.1: @ %if.then +; ARM-DISABLE-NEXT: sub r1, sp, #16 +; ARM-DISABLE-NEXT: mov sp, r1 +; ARM-DISABLE-NEXT: @ InlineAsm Start +; ARM-DISABLE-NEXT: mov r2, #0 +; ARM-DISABLE-NEXT: @ InlineAsm End +; ARM-DISABLE-NEXT: LBB10_2: @ %for.body +; ARM-DISABLE-NEXT: @ =>This Inner Loop Header: Depth=1 +; ARM-DISABLE-NEXT: add r0, r2, r0 +; ARM-DISABLE-NEXT: str r0, [r1] +; ARM-DISABLE-NEXT: @ InlineAsm Start +; ARM-DISABLE-NEXT: nop +; ARM-DISABLE-NEXT: @ InlineAsm End +; ARM-DISABLE-NEXT: mov r0, #1 +; ARM-DISABLE-NEXT: b LBB10_2 +; ARM-DISABLE-NEXT: LBB10_3: @ %if.end +; ARM-DISABLE-NEXT: sub sp, r7, #8 +; ARM-DISABLE-NEXT: pop {r4, r5, r7, pc} +; ARM-DISABLE-NEXT: Lfunc_end10: +; +; THUMB-ENABLE-LABEL: infiniteloop2: +; THUMB-ENABLE: Lfunc_begin10: +; THUMB-ENABLE-NEXT: @ %bb.0: @ %entry +; THUMB-ENABLE-NEXT: push {r4, r5, r7, lr} +; THUMB-ENABLE-NEXT: add r7, sp, #8 +; THUMB-ENABLE-NEXT: movs r0, #0 +; THUMB-ENABLE-NEXT: cbnz r0, LBB10_3 +; THUMB-ENABLE-NEXT: @ %bb.1: @ %if.then +; THUMB-ENABLE-NEXT: sub.w r0, sp, #16 +; THUMB-ENABLE-NEXT: mov sp, r0 +; THUMB-ENABLE-NEXT: movs r1, #0 +; THUMB-ENABLE-NEXT: @ InlineAsm Start +; THUMB-ENABLE-NEXT: mov.w r2, #0 +; THUMB-ENABLE-NEXT: @ InlineAsm End +; THUMB-ENABLE-NEXT: LBB10_2: @ %for.body +; THUMB-ENABLE-NEXT: @ =>This Inner Loop Header: Depth=1 +; THUMB-ENABLE-NEXT: add r1, r2 +; THUMB-ENABLE-NEXT: str r1, [r0] +; THUMB-ENABLE-NEXT: @ InlineAsm Start +; THUMB-ENABLE-NEXT: nop +; THUMB-ENABLE-NEXT: @ InlineAsm End +; THUMB-ENABLE-NEXT: movs r1, #1 +; THUMB-ENABLE-NEXT: b LBB10_2 +; THUMB-ENABLE-NEXT: LBB10_3: @ %if.end +; THUMB-ENABLE-NEXT: sub.w r4, r7, #8 +; THUMB-ENABLE-NEXT: mov sp, r4 +; THUMB-ENABLE-NEXT: pop {r4, r5, r7, pc} +; THUMB-ENABLE-NEXT: Lfunc_end10: +; +; THUMB-DISABLE-LABEL: infiniteloop2: +; THUMB-DISABLE: Lfunc_begin10: +; THUMB-DISABLE-NEXT: @ %bb.0: @ %entry +; THUMB-DISABLE-NEXT: push {r4, r5, r7, lr} +; THUMB-DISABLE-NEXT: add r7, sp, #8 +; THUMB-DISABLE-NEXT: movs r0, #0 +; THUMB-DISABLE-NEXT: cbnz r0, LBB10_3 +; THUMB-DISABLE-NEXT: @ %bb.1: @ %if.then +; THUMB-DISABLE-NEXT: sub.w r0, sp, #16 +; THUMB-DISABLE-NEXT: mov sp, r0 +; THUMB-DISABLE-NEXT: movs r1, #0 +; THUMB-DISABLE-NEXT: @ InlineAsm Start +; THUMB-DISABLE-NEXT: mov.w r2, #0 +; THUMB-DISABLE-NEXT: @ InlineAsm End +; THUMB-DISABLE-NEXT: LBB10_2: @ %for.body +; THUMB-DISABLE-NEXT: @ =>This Inner Loop Header: Depth=1 +; THUMB-DISABLE-NEXT: add r1, r2 +; THUMB-DISABLE-NEXT: str r1, [r0] +; THUMB-DISABLE-NEXT: @ InlineAsm Start +; THUMB-DISABLE-NEXT: nop +; THUMB-DISABLE-NEXT: @ InlineAsm End +; THUMB-DISABLE-NEXT: movs r1, #1 +; THUMB-DISABLE-NEXT: b LBB10_2 +; THUMB-DISABLE-NEXT: LBB10_3: @ %if.end +; THUMB-DISABLE-NEXT: sub.w r4, r7, #8 +; THUMB-DISABLE-NEXT: mov sp, r4 +; THUMB-DISABLE-NEXT: pop {r4, r5, r7, pc} +; THUMB-DISABLE-NEXT: Lfunc_end10: entry: br i1 undef, label %if.then, label %if.end @@ -1594,7 +1787,8 @@ ; THUMB-NEXT: LBB11_5: @ %end ; THUMB-NEXT: bx lr ; ARM-ENABLE-LABEL: infiniteloop3: -; ARM-ENABLE: @ %bb.0: @ %entry +; ARM-ENABLE: Lfunc_begin11: +; ARM-ENABLE-NEXT: @ %bb.0: @ %entry ; ARM-ENABLE-NEXT: mov r0, #0 ; ARM-ENABLE-NEXT: cmp r0, #0 ; ARM-ENABLE-NEXT: bne LBB11_5 @@ -1619,9 +1813,11 @@ ; ARM-ENABLE-NEXT: b LBB11_3 ; ARM-ENABLE-NEXT: LBB11_5: @ %end ; ARM-ENABLE-NEXT: bx lr +; ARM-ENABLE-NEXT: Lfunc_end11: ; ; ARM-DISABLE-LABEL: infiniteloop3: -; ARM-DISABLE: @ %bb.0: @ %entry +; ARM-DISABLE: Lfunc_begin11: +; ARM-DISABLE-NEXT: @ %bb.0: @ %entry ; ARM-DISABLE-NEXT: mov r0, #0 ; ARM-DISABLE-NEXT: cmp r0, #0 ; ARM-DISABLE-NEXT: bne LBB11_5 @@ -1646,9 +1842,11 @@ ; ARM-DISABLE-NEXT: b LBB11_3 ; ARM-DISABLE-NEXT: LBB11_5: @ %end ; ARM-DISABLE-NEXT: bx lr +; ARM-DISABLE-NEXT: Lfunc_end11: ; ; THUMB-ENABLE-LABEL: infiniteloop3: -; THUMB-ENABLE: @ %bb.0: @ %entry +; THUMB-ENABLE: Lfunc_begin11: +; THUMB-ENABLE-NEXT: @ %bb.0: @ %entry ; THUMB-ENABLE-NEXT: movs r0, #0 ; THUMB-ENABLE-NEXT: cbnz r0, LBB11_5 ; THUMB-ENABLE-NEXT: @ %bb.1: @ %loop2a.preheader @@ -1672,9 +1870,11 @@ ; THUMB-ENABLE-NEXT: b LBB11_3 ; THUMB-ENABLE-NEXT: LBB11_5: @ %end ; THUMB-ENABLE-NEXT: bx lr +; THUMB-ENABLE-NEXT: Lfunc_end11: ; ; THUMB-DISABLE-LABEL: infiniteloop3: -; THUMB-DISABLE: @ %bb.0: @ %entry +; THUMB-DISABLE: Lfunc_begin11: +; THUMB-DISABLE-NEXT: @ %bb.0: @ %entry ; THUMB-DISABLE-NEXT: movs r0, #0 ; THUMB-DISABLE-NEXT: cbnz r0, LBB11_5 ; THUMB-DISABLE-NEXT: @ %bb.1: @ %loop2a.preheader @@ -1698,6 +1898,7 @@ ; THUMB-DISABLE-NEXT: b LBB11_3 ; THUMB-DISABLE-NEXT: LBB11_5: @ %end ; THUMB-DISABLE-NEXT: bx lr +; THUMB-DISABLE-NEXT: Lfunc_end11: entry: br i1 undef, label %loop2a, label %body @@ -1757,7 +1958,8 @@ ; bl define float @debug_info(float %gamma, float %slopeLimit, i1 %or.cond, double %tmp) "frame-pointer"="all" { ; ARM-ENABLE-LABEL: debug_info: -; ARM-ENABLE: @ %bb.0: @ %bb +; ARM-ENABLE: Lfunc_begin12: +; ARM-ENABLE-NEXT: @ %bb.0: @ %bb ; ARM-ENABLE-NEXT: push {r4, r7, lr} ; ARM-ENABLE-NEXT: add r7, sp, #4 ; ARM-ENABLE-NEXT: sub r4, sp, #16 @@ -1802,9 +2004,11 @@ ; ARM-ENABLE-NEXT: LCPI12_0: ; ARM-ENABLE-NEXT: .long 0x00000000 @ float 0 ; ARM-ENABLE-NEXT: .end_data_region +; ARM-ENABLE-NEXT: Lfunc_end12: ; ; ARM-DISABLE-LABEL: debug_info: -; ARM-DISABLE: @ %bb.0: @ %bb +; ARM-DISABLE: Lfunc_begin12: +; ARM-DISABLE-NEXT: @ %bb.0: @ %bb ; ARM-DISABLE-NEXT: push {r4, r7, lr} ; ARM-DISABLE-NEXT: add r7, sp, #4 ; ARM-DISABLE-NEXT: sub r4, sp, #16 @@ -1849,9 +2053,11 @@ ; ARM-DISABLE-NEXT: LCPI12_0: ; ARM-DISABLE-NEXT: .long 0x00000000 @ float 0 ; ARM-DISABLE-NEXT: .end_data_region +; ARM-DISABLE-NEXT: Lfunc_end12: ; ; THUMB-ENABLE-LABEL: debug_info: -; THUMB-ENABLE: @ %bb.0: @ %bb +; THUMB-ENABLE: Lfunc_begin12: +; THUMB-ENABLE-NEXT: @ %bb.0: @ %bb ; THUMB-ENABLE-NEXT: push {r4, r7, lr} ; THUMB-ENABLE-NEXT: add r7, sp, #4 ; THUMB-ENABLE-NEXT: sub.w r4, sp, #16 @@ -1899,9 +2105,11 @@ ; THUMB-ENABLE-NEXT: LCPI12_0: ; THUMB-ENABLE-NEXT: .long 0x00000000 @ float 0 ; THUMB-ENABLE-NEXT: .end_data_region +; THUMB-ENABLE-NEXT: Lfunc_end12: ; ; THUMB-DISABLE-LABEL: debug_info: -; THUMB-DISABLE: @ %bb.0: @ %bb +; THUMB-DISABLE: Lfunc_begin12: +; THUMB-DISABLE-NEXT: @ %bb.0: @ %bb ; THUMB-DISABLE-NEXT: push {r4, r7, lr} ; THUMB-DISABLE-NEXT: add r7, sp, #4 ; THUMB-DISABLE-NEXT: sub.w r4, sp, #16 @@ -1949,6 +2157,7 @@ ; THUMB-DISABLE-NEXT: LCPI12_0: ; THUMB-DISABLE-NEXT: .long 0x00000000 @ float 0 ; THUMB-DISABLE-NEXT: .end_data_region +; THUMB-DISABLE-NEXT: Lfunc_end12: bb: br i1 %or.cond, label %bb3, label %bb13 diff --git a/llvm/test/CodeGen/X86/callbr-asm-label-addr.ll b/llvm/test/CodeGen/X86/callbr-asm-label-addr.ll --- a/llvm/test/CodeGen/X86/callbr-asm-label-addr.ll +++ b/llvm/test/CodeGen/X86/callbr-asm-label-addr.ll @@ -1,15 +1,25 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s define i32 @test1(i32 %x) { ; CHECK-LABEL: test1: -; CHECK: .quad .Ltmp0 +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pushq %rax +; CHECK-NEXT: .cfi_def_cfa_offset 16 +; CHECK-NEXT: #APP +; CHECK-NEXT: .quad .Ltmp0 ; CHECK-NEXT: .quad .LBB0_1 -; CHECK: .LBB0_1: # Block address taken +; CHECK-NEXT: #NO_APP +; CHECK-NEXT: .LBB0_1: # Block address taken ; CHECK-NEXT: # %bar ; CHECK-NEXT: # Label of block must be emitted -; CHECK-NEXT: callq foo -; CHECK-NEXT: .Ltmp0: +; CHECK-NEXT: callq foo@PLT +; CHECK-NEXT: .Ltmp0: # Block address taken ; CHECK-NEXT: # %bb.2: # %baz +; CHECK-NEXT: movl %eax, %edi +; CHECK-NEXT: popq %rax +; CHECK-NEXT: .cfi_def_cfa_offset 8 +; CHECK-NEXT: jmp mux@PLT # TAILCALL entry: callbr void asm sideeffect ".quad ${0:l}\0A\09.quad ${1:l}", "i,!i,~{dirflag},~{fpsr},~{flags}"(ptr blockaddress(@test1, %baz)) to label %asm.fallthrough [label %bar] diff --git a/llvm/test/CodeGen/X86/x86-shrink-wrap-unwind.ll b/llvm/test/CodeGen/X86/x86-shrink-wrap-unwind.ll --- a/llvm/test/CodeGen/X86/x86-shrink-wrap-unwind.ll +++ b/llvm/test/CodeGen/X86/x86-shrink-wrap-unwind.ll @@ -1,3 +1,4 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 ; RUN: llc -mtriple=x86_64-apple-darwin10.6 < %s | FileCheck %s ; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s --check-prefix=NOCOMPACTUNWIND ; @@ -11,40 +12,40 @@ ; not marked as nounwind. PR25614 ; ; No shrink-wrapping should occur here, until the CFI information are fixed. + +define i32 @framelessUnwind(i32 %a, i32 %b) #0 { ; CHECK-LABEL: framelessUnwind: +; CHECK: ## %bb.0: +; CHECK-NEXT: pushq %rax +; CHECK-NEXT: .cfi_def_cfa_offset 16 +; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: cmpl %esi, %edi +; CHECK-NEXT: jge LBB0_2 +; CHECK-NEXT: ## %bb.1: ## %true +; CHECK-NEXT: movl %eax, {{[0-9]+}}(%rsp) +; CHECK-NEXT: leaq {{[0-9]+}}(%rsp), %rsi +; CHECK-NEXT: xorl %edi, %edi +; CHECK-NEXT: callq _doSomething +; CHECK-NEXT: LBB0_2: ## %false +; CHECK-NEXT: popq %rcx +; CHECK-NEXT: retq ; -; Prologue code. -; (What we push does not matter. It should be some random sratch register.) -; CHECK: pushq -; -; Compare the arguments and jump to exit. -; After the prologue is set. -; CHECK: movl %edi, [[ARG0CPY:%e[a-z]+]] -; CHECK-NEXT: cmpl %esi, %edi -; CHECK-NEXT: jge [[EXIT_LABEL:LBB[0-9_]+]] -; -; Store %a in the alloca. -; CHECK: movl [[ARG0CPY]], 4(%rsp) -; Set the alloca address in the second argument. -; CHECK-NEXT: leaq 4(%rsp), %rsi -; Set the first argument to zero. -; CHECK-NEXT: xorl %edi, %edi -; CHECK-NEXT: callq _doSomething -; -; CHECK: [[EXIT_LABEL]]: -; -; Without shrink-wrapping, epilogue is in the exit block. -; Epilogue code. (What we pop does not matter.) -; CHECK-NEXT: popq -; -; CHECK-NEXT: retq - -; On a platform which does not support compact unwind, shrink wrapping is enabled. ; NOCOMPACTUNWIND-LABEL: framelessUnwind: -; NOCOMPACTUNWIND-NOT: pushq -; NOCOMPACTUNWIND: # %bb.1: +; NOCOMPACTUNWIND: # %bb.0: +; NOCOMPACTUNWIND-NEXT: movl %edi, %eax +; NOCOMPACTUNWIND-NEXT: cmpl %esi, %edi +; NOCOMPACTUNWIND-NEXT: jge .LBB0_2 +; NOCOMPACTUNWIND-NEXT: # %bb.1: # %true ; NOCOMPACTUNWIND-NEXT: pushq %rax -define i32 @framelessUnwind(i32 %a, i32 %b) #0 { +; NOCOMPACTUNWIND-NEXT: .cfi_def_cfa_offset 16 +; NOCOMPACTUNWIND-NEXT: movl %eax, {{[0-9]+}}(%rsp) +; NOCOMPACTUNWIND-NEXT: leaq {{[0-9]+}}(%rsp), %rsi +; NOCOMPACTUNWIND-NEXT: xorl %edi, %edi +; NOCOMPACTUNWIND-NEXT: callq doSomething@PLT +; NOCOMPACTUNWIND-NEXT: addq $8, %rsp +; NOCOMPACTUNWIND-NEXT: .cfi_def_cfa_offset 8 +; NOCOMPACTUNWIND-NEXT: .LBB0_2: # %false +; NOCOMPACTUNWIND-NEXT: retq %tmp = alloca i32, align 4 %tmp2 = icmp slt i32 %a, %b br i1 %tmp2, label %true, label %false @@ -64,35 +65,50 @@ attributes #0 = { "frame-pointer"="none" } ; Shrink-wrapping should occur here. We have a frame pointer. -; CHECK-LABEL: frameUnwind: -; -; Compare the arguments and jump to exit. -; No prologue needed. -; -; Compare the arguments and jump to exit. -; After the prologue is set. -; CHECK: movl %edi, [[ARG0CPY:%e[a-z]+]] -; CHECK-NEXT: cmpl %esi, %edi -; CHECK-NEXT: jge [[EXIT_LABEL:LBB[0-9_]+]] -; -; Prologue code. -; CHECK: pushq %rbp -; CHECK: movq %rsp, %rbp -; -; Store %a in the alloca. -; CHECK: movl [[ARG0CPY]], -4(%rbp) -; Set the alloca address in the second argument. -; CHECK-NEXT: leaq -4(%rbp), %rsi -; Set the first argument to zero. -; CHECK-NEXT: xorl %edi, %edi -; CHECK-NEXT: callq _doSomething -; -; Epilogue code. (What we pop does not matter.) -; CHECK: popq %rbp -; -; CHECK: [[EXIT_LABEL]]: -; CHECK-NEXT: retq define i32 @frameUnwind(i32 %a, i32 %b) #1 { +; CHECK-LABEL: frameUnwind: +; CHECK: ## %bb.0: +; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: cmpl %esi, %edi +; CHECK-NEXT: jge LBB1_2 +; CHECK-NEXT: ## %bb.1: ## %true +; CHECK-NEXT: pushq %rbp +; CHECK-NEXT: .cfi_def_cfa_offset 16 +; CHECK-NEXT: .cfi_offset %rbp, -16 +; CHECK-NEXT: movq %rsp, %rbp +; CHECK-NEXT: .cfi_def_cfa_register %rbp +; CHECK-NEXT: subq $16, %rsp +; CHECK-NEXT: movl %eax, -4(%rbp) +; CHECK-NEXT: leaq -4(%rbp), %rsi +; CHECK-NEXT: xorl %edi, %edi +; CHECK-NEXT: callq _doSomething +; CHECK-NEXT: addq $16, %rsp +; CHECK-NEXT: popq %rbp +; CHECK-NEXT: LBB1_2: ## %false +; CHECK-NEXT: retq +; +; NOCOMPACTUNWIND-LABEL: frameUnwind: +; NOCOMPACTUNWIND: # %bb.0: +; NOCOMPACTUNWIND-NEXT: movl %edi, %eax +; NOCOMPACTUNWIND-NEXT: cmpl %esi, %edi +; NOCOMPACTUNWIND-NEXT: jge .LBB1_2 +; NOCOMPACTUNWIND-NEXT: # %bb.1: # %true +; NOCOMPACTUNWIND-NEXT: pushq %rbp +; NOCOMPACTUNWIND-NEXT: .cfi_def_cfa_offset 16 +; NOCOMPACTUNWIND-NEXT: .cfi_offset %rbp, -16 +; NOCOMPACTUNWIND-NEXT: movq %rsp, %rbp +; NOCOMPACTUNWIND-NEXT: .cfi_def_cfa_register %rbp +; NOCOMPACTUNWIND-NEXT: subq $16, %rsp +; NOCOMPACTUNWIND-NEXT: movl %eax, -4(%rbp) +; NOCOMPACTUNWIND-NEXT: leaq -4(%rbp), %rsi +; NOCOMPACTUNWIND-NEXT: xorl %edi, %edi +; NOCOMPACTUNWIND-NEXT: callq doSomething@PLT +; NOCOMPACTUNWIND-NEXT: addq $16, %rsp +; NOCOMPACTUNWIND-NEXT: popq %rbp +; NOCOMPACTUNWIND-NEXT: .cfi_def_cfa %rsp, 8 +; NOCOMPACTUNWIND-NEXT: .cfi_restore %rbp +; NOCOMPACTUNWIND-NEXT: .LBB1_2: # %false +; NOCOMPACTUNWIND-NEXT: retq %tmp = alloca i32, align 4 %tmp2 = icmp slt i32 %a, %b br i1 %tmp2, label %true, label %false @@ -110,35 +126,36 @@ attributes #1 = { "frame-pointer"="all" } ; Shrink-wrapping should occur here. We do not have to unwind. -; CHECK-LABEL: framelessnoUnwind: -; -; Compare the arguments and jump to exit. -; No prologue needed. -; -; Compare the arguments and jump to exit. -; After the prologue is set. -; CHECK: movl %edi, [[ARG0CPY:%e[a-z]+]] -; CHECK-NEXT: cmpl %esi, %edi -; CHECK-NEXT: jge [[EXIT_LABEL:LBB[0-9_]+]] -; -; Prologue code. -; (What we push does not matter. It should be some random sratch register.) -; CHECK: pushq -; -; Store %a in the alloca. -; CHECK: movl [[ARG0CPY]], 4(%rsp) -; Set the alloca address in the second argument. -; CHECK-NEXT: leaq 4(%rsp), %rsi -; Set the first argument to zero. -; CHECK-NEXT: xorl %edi, %edi -; CHECK-NEXT: callq _doSomething -; -; Epilogue code. -; CHECK-NEXT: addq -; -; CHECK: [[EXIT_LABEL]]: -; CHECK-NEXT: retq define i32 @framelessnoUnwind(i32 %a, i32 %b) #2 { +; CHECK-LABEL: framelessnoUnwind: +; CHECK: ## %bb.0: +; CHECK-NEXT: movl %edi, %eax +; CHECK-NEXT: cmpl %esi, %edi +; CHECK-NEXT: jge LBB2_2 +; CHECK-NEXT: ## %bb.1: ## %true +; CHECK-NEXT: pushq %rax +; CHECK-NEXT: movl %eax, {{[0-9]+}}(%rsp) +; CHECK-NEXT: leaq {{[0-9]+}}(%rsp), %rsi +; CHECK-NEXT: xorl %edi, %edi +; CHECK-NEXT: callq _doSomething +; CHECK-NEXT: addq $8, %rsp +; CHECK-NEXT: LBB2_2: ## %false +; CHECK-NEXT: retq +; +; NOCOMPACTUNWIND-LABEL: framelessnoUnwind: +; NOCOMPACTUNWIND: # %bb.0: +; NOCOMPACTUNWIND-NEXT: movl %edi, %eax +; NOCOMPACTUNWIND-NEXT: cmpl %esi, %edi +; NOCOMPACTUNWIND-NEXT: jge .LBB2_2 +; NOCOMPACTUNWIND-NEXT: # %bb.1: # %true +; NOCOMPACTUNWIND-NEXT: pushq %rax +; NOCOMPACTUNWIND-NEXT: movl %eax, {{[0-9]+}}(%rsp) +; NOCOMPACTUNWIND-NEXT: leaq {{[0-9]+}}(%rsp), %rsi +; NOCOMPACTUNWIND-NEXT: xorl %edi, %edi +; NOCOMPACTUNWIND-NEXT: callq doSomething@PLT +; NOCOMPACTUNWIND-NEXT: addq $8, %rsp +; NOCOMPACTUNWIND-NEXT: .LBB2_2: # %false +; NOCOMPACTUNWIND-NEXT: retq %tmp = alloca i32, align 4 %tmp2 = icmp slt i32 %a, %b br i1 %tmp2, label %true, label %false @@ -160,35 +177,91 @@ ; We used to emit the code at the entry point of the function ; instead of just before the prologue. ; For now, shrink-wrapping is disabled on segmented stack functions: PR26107. -; -; CHECK-LABEL: segmentedStack: -; CHECK: cmpq -; CHECK-NEXT: jbe [[ENTRY_LABEL:LBB[0-9_]+]] -; -; In PR26107, we use to drop these two basic blocks, because -; the segmentedStack entry block was jumping directly to -; the place where the prologue is actually needed, which is -; the call to memcmp. -; Then, those two basic blocks did not have any predecessors -; anymore and were removed. -; -; Check if vk1 is null -; CHECK: testq %rdi, %rdi -; CHECK-NEXT: je [[STRINGS_EQUAL:LBB[0-9_]+]] -; -; Check if vk2 is null -; CHECK: testq %rsi, %rsi -; CHECK-NEXT: je [[STRINGS_EQUAL]] -; -; CHECK: [[STRINGS_EQUAL]] -; CHECK: popq -; -; CHECK: [[ENTRY_LABEL]]: -; CHECK: callq ___morestack -; CHECK-NEXT: retq -; - define zeroext i1 @segmentedStack(ptr readonly %vk1, ptr readonly %vk2, i64 %key_size) #5 { +; CHECK-LABEL: segmentedStack: +; CHECK: ## %bb.0: +; CHECK-NEXT: cmpq %gs:816, %rsp +; CHECK-NEXT: jbe LBB3_7 +; CHECK-NEXT: LBB3_1: ## %entry +; CHECK-NEXT: pushq %rax +; CHECK-NEXT: .cfi_def_cfa_offset 16 +; CHECK-NEXT: movq %rdi, %rax +; CHECK-NEXT: orq %rsi, %rax +; CHECK-NEXT: sete %al +; CHECK-NEXT: testq %rdi, %rdi +; CHECK-NEXT: je LBB3_5 +; CHECK-NEXT: ## %bb.2: ## %entry +; CHECK-NEXT: testq %rsi, %rsi +; CHECK-NEXT: je LBB3_5 +; CHECK-NEXT: ## %bb.3: ## %if.end4.i +; CHECK-NEXT: movq 8(%rdi), %rdx +; CHECK-NEXT: cmpq 8(%rsi), %rdx +; CHECK-NEXT: jne LBB3_6 +; CHECK-NEXT: ## %bb.4: ## %land.rhs.i.i +; CHECK-NEXT: movq (%rsi), %rsi +; CHECK-NEXT: movq (%rdi), %rdi +; CHECK-NEXT: callq _memcmp +; CHECK-NEXT: testl %eax, %eax +; CHECK-NEXT: sete %al +; CHECK-NEXT: LBB3_5: ## %__go_ptr_strings_equal.exit +; CHECK-NEXT: ## kill: def $al killed $al killed $eax +; CHECK-NEXT: popq %rcx +; CHECK-NEXT: retq +; CHECK-NEXT: LBB3_6: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: ## kill: def $al killed $al killed $eax +; CHECK-NEXT: popq %rcx +; CHECK-NEXT: retq +; CHECK-NEXT: LBB3_7: +; CHECK-NEXT: movl $8, %r10d +; CHECK-NEXT: movl $0, %r11d +; CHECK-NEXT: callq ___morestack +; CHECK-NEXT: retq +; CHECK-NEXT: jmp LBB3_1 +; +; NOCOMPACTUNWIND-LABEL: segmentedStack: +; NOCOMPACTUNWIND: # %bb.0: +; NOCOMPACTUNWIND-NEXT: cmpq %fs:112, %rsp +; NOCOMPACTUNWIND-NEXT: jbe .LBB3_7 +; NOCOMPACTUNWIND-NEXT: .LBB3_1: # %entry +; NOCOMPACTUNWIND-NEXT: pushq %rax +; NOCOMPACTUNWIND-NEXT: .cfi_def_cfa_offset 16 +; NOCOMPACTUNWIND-NEXT: movq %rdi, %rax +; NOCOMPACTUNWIND-NEXT: orq %rsi, %rax +; NOCOMPACTUNWIND-NEXT: sete %al +; NOCOMPACTUNWIND-NEXT: testq %rdi, %rdi +; NOCOMPACTUNWIND-NEXT: je .LBB3_5 +; NOCOMPACTUNWIND-NEXT: # %bb.2: # %entry +; NOCOMPACTUNWIND-NEXT: testq %rsi, %rsi +; NOCOMPACTUNWIND-NEXT: je .LBB3_5 +; NOCOMPACTUNWIND-NEXT: # %bb.3: # %if.end4.i +; NOCOMPACTUNWIND-NEXT: movq 8(%rdi), %rdx +; NOCOMPACTUNWIND-NEXT: cmpq 8(%rsi), %rdx +; NOCOMPACTUNWIND-NEXT: jne .LBB3_6 +; NOCOMPACTUNWIND-NEXT: # %bb.4: # %land.rhs.i.i +; NOCOMPACTUNWIND-NEXT: movq (%rsi), %rsi +; NOCOMPACTUNWIND-NEXT: movq (%rdi), %rdi +; NOCOMPACTUNWIND-NEXT: callq memcmp@PLT +; NOCOMPACTUNWIND-NEXT: testl %eax, %eax +; NOCOMPACTUNWIND-NEXT: sete %al +; NOCOMPACTUNWIND-NEXT: .LBB3_5: # %__go_ptr_strings_equal.exit +; NOCOMPACTUNWIND-NEXT: # kill: def $al killed $al killed $eax +; NOCOMPACTUNWIND-NEXT: popq %rcx +; NOCOMPACTUNWIND-NEXT: .cfi_def_cfa_offset 8 +; NOCOMPACTUNWIND-NEXT: retq +; NOCOMPACTUNWIND-NEXT: .LBB3_6: +; NOCOMPACTUNWIND-NEXT: .cfi_def_cfa_offset 16 +; NOCOMPACTUNWIND-NEXT: xorl %eax, %eax +; NOCOMPACTUNWIND-NEXT: # kill: def $al killed $al killed $eax +; NOCOMPACTUNWIND-NEXT: popq %rcx +; NOCOMPACTUNWIND-NEXT: .cfi_def_cfa_offset 8 +; NOCOMPACTUNWIND-NEXT: retq +; NOCOMPACTUNWIND-NEXT: .LBB3_7: +; NOCOMPACTUNWIND-NEXT: movl $8, %r10d +; NOCOMPACTUNWIND-NEXT: movl $0, %r11d +; NOCOMPACTUNWIND-NEXT: callq __morestack +; NOCOMPACTUNWIND-NEXT: retq +; NOCOMPACTUNWIND-NEXT: jmp .LBB3_1 entry: %cmp.i = icmp eq ptr %vk1, null %cmp1.i = icmp eq ptr %vk2, null @@ -229,32 +302,49 @@ ; execute the epilogue when an execption occur and bad things will ; happen. ; PR36513 -; -; CHECK-LABEL: with_nounwind: -; Prologue -; CHECK: push -; -; Jump to throw_exception: -; CHECK-NEXT: .cfi_def_cfa_offset -; CHECK-NEXT: testb $1, %dil -; CHECK-NEXT: jne [[THROW_LABEL:LBB[0-9_]+]] -; Else return exit -; CHECK: popq -; CHECK-NEXT: retq -; -; CHECK-NEXT: [[THROW_LABEL]]: -; CHECK: callq _throw_exception -; Unreachable block... -; -; Epilogue must be after the landing pad. -; CHECK-NOT: popq -; -; Look for the landing pad label. -; CHECK: LBB{{[0-9_]+}}: -; Epilogue on the landing pad -; CHECK: popq -; CHECK-NEXT: retq define void @with_nounwind(i1 %cond) nounwind personality ptr @my_personality { +; CHECK-LABEL: with_nounwind: +; CHECK: ## %bb.0: ## %entry +; CHECK-NEXT: pushq %rax +; CHECK-NEXT: .cfi_def_cfa_offset 16 +; CHECK-NEXT: testb $1, %dil +; CHECK-NEXT: jne LBB4_1 +; CHECK-NEXT: ## %bb.4: ## %return +; CHECK-NEXT: popq %rax +; CHECK-NEXT: retq +; CHECK-NEXT: LBB4_1: ## %throw +; CHECK-NEXT: Ltmp0: +; CHECK-NEXT: callq _throw_exception +; CHECK-NEXT: Ltmp1: +; CHECK-NEXT: ## %bb.2: ## %unreachable +; CHECK-NEXT: ud2 +; CHECK-NEXT: LBB4_3: ## %landing +; CHECK-NEXT: Ltmp2: +; CHECK-NEXT: popq %rax +; CHECK-NEXT: retq +; CHECK-NEXT: Lfunc_end0: +; +; NOCOMPACTUNWIND-LABEL: with_nounwind: +; NOCOMPACTUNWIND: # %bb.0: # %entry +; NOCOMPACTUNWIND-NEXT: pushq %rax +; NOCOMPACTUNWIND-NEXT: .cfi_def_cfa_offset 16 +; NOCOMPACTUNWIND-NEXT: testb $1, %dil +; NOCOMPACTUNWIND-NEXT: jne .LBB4_1 +; NOCOMPACTUNWIND-NEXT: # %bb.4: # %return +; NOCOMPACTUNWIND-NEXT: popq %rax +; NOCOMPACTUNWIND-NEXT: .cfi_def_cfa_offset 8 +; NOCOMPACTUNWIND-NEXT: retq +; NOCOMPACTUNWIND-NEXT: .LBB4_1: # %throw +; NOCOMPACTUNWIND-NEXT: .cfi_def_cfa_offset 16 +; NOCOMPACTUNWIND-NEXT: .Ltmp0: +; NOCOMPACTUNWIND-NEXT: callq throw_exception@PLT +; NOCOMPACTUNWIND-NEXT: .Ltmp1: +; NOCOMPACTUNWIND-NEXT: # %bb.2: # %unreachable +; NOCOMPACTUNWIND-NEXT: .LBB4_3: # %landing +; NOCOMPACTUNWIND-NEXT: .Ltmp2: +; NOCOMPACTUNWIND-NEXT: popq %rax +; NOCOMPACTUNWIND-NEXT: .cfi_def_cfa_offset 8 +; NOCOMPACTUNWIND-NEXT: retq entry: br i1 %cond, label %throw, label %return @@ -277,30 +367,51 @@ ; Check landing pad again. ; This time checks that we can shrink-wrap when the epilogue does not ; span accross several blocks. -; -; CHECK-LABEL: with_nounwind_same_succ: -; -; Jump to throw_exception: -; CHECK: testb $1, %dil -; CHECK-NEXT: je [[RET_LABEL:LBB[0-9_]+]] -; -; Prologue -; CHECK: push -; CHECK: callq _throw_exception -; -; Fallthrough label -; CHECK: [[FALLTHROUGH_LABEL:LBB[0-9_]+]] -; CHECK: nop -; CHECK: popq -; -; CHECK: [[RET_LABEL]] -; CHECK: retq -; -; Look for the landing pad label. -; CHECK: LBB{{[0-9_]+}}: -; Landing pad jumps to fallthrough -; CHECK: jmp [[FALLTHROUGH_LABEL]] define void @with_nounwind_same_succ(i1 %cond) nounwind personality ptr @my_personality2 { +; CHECK-LABEL: with_nounwind_same_succ: +; CHECK: ## %bb.0: ## %entry +; CHECK-NEXT: testb $1, %dil +; CHECK-NEXT: je LBB5_4 +; CHECK-NEXT: ## %bb.1: ## %throw +; CHECK-NEXT: pushq %rax +; CHECK-NEXT: .cfi_def_cfa_offset 16 +; CHECK-NEXT: Ltmp3: +; CHECK-NEXT: callq _throw_exception +; CHECK-NEXT: Ltmp4: +; CHECK-NEXT: LBB5_3: ## %fallthrough +; CHECK-NEXT: ## InlineAsm Start +; CHECK-NEXT: nop +; CHECK-NEXT: ## InlineAsm End +; CHECK-NEXT: popq %rax +; CHECK-NEXT: LBB5_4: ## %return +; CHECK-NEXT: retq +; CHECK-NEXT: LBB5_2: ## %landing +; CHECK-NEXT: Ltmp5: +; CHECK-NEXT: jmp LBB5_3 +; CHECK-NEXT: Lfunc_end1: +; +; NOCOMPACTUNWIND-LABEL: with_nounwind_same_succ: +; NOCOMPACTUNWIND: # %bb.0: # %entry +; NOCOMPACTUNWIND-NEXT: testb $1, %dil +; NOCOMPACTUNWIND-NEXT: je .LBB5_4 +; NOCOMPACTUNWIND-NEXT: # %bb.1: # %throw +; NOCOMPACTUNWIND-NEXT: pushq %rax +; NOCOMPACTUNWIND-NEXT: .cfi_def_cfa_offset 16 +; NOCOMPACTUNWIND-NEXT: .Ltmp3: +; NOCOMPACTUNWIND-NEXT: callq throw_exception@PLT +; NOCOMPACTUNWIND-NEXT: .Ltmp4: +; NOCOMPACTUNWIND-NEXT: .LBB5_3: # %fallthrough +; NOCOMPACTUNWIND-NEXT: #APP +; NOCOMPACTUNWIND-NEXT: nop +; NOCOMPACTUNWIND-NEXT: #NO_APP +; NOCOMPACTUNWIND-NEXT: popq %rax +; NOCOMPACTUNWIND-NEXT: .cfi_def_cfa_offset 8 +; NOCOMPACTUNWIND-NEXT: .LBB5_4: # %return +; NOCOMPACTUNWIND-NEXT: retq +; NOCOMPACTUNWIND-NEXT: .LBB5_2: # %landing +; NOCOMPACTUNWIND-NEXT: .cfi_def_cfa_offset 16 +; NOCOMPACTUNWIND-NEXT: .Ltmp5: +; NOCOMPACTUNWIND-NEXT: jmp .LBB5_3 entry: br i1 %cond, label %throw, label %return diff --git a/llvm/test/CodeGen/X86/x86-win64-shrink-wrapping.ll b/llvm/test/CodeGen/X86/x86-win64-shrink-wrapping.ll --- a/llvm/test/CodeGen/X86/x86-win64-shrink-wrapping.ll +++ b/llvm/test/CodeGen/X86/x86-win64-shrink-wrapping.ll @@ -1,5 +1,6 @@ -; RUN: llc %s -o - -enable-shrink-wrap=true | FileCheck %s --check-prefix=CHECK --check-prefix=ENABLE -; RUN: llc %s -o - -enable-shrink-wrap=false | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 +; RUN: llc %s -o - -enable-shrink-wrap=true | FileCheck %s --check-prefix=ENABLE +; RUN: llc %s -o - -enable-shrink-wrap=false | FileCheck %s --check-prefix=DISABLE target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" target triple = "x86_64--windows-gnu" @@ -9,13 +10,78 @@ ; Indeed, the epilogue block would have been if.else, meaning ; after the pops, we will have additional instruction (jump, mov, ; etc.) prior to the return and this is forbidden for Win64. -; CHECK-LABEL: loopInfoSaveOutsideLoop: -; CHECK: push -; CHECK-NOT: popq -; CHECK: popq -; CHECK-NOT: popq -; CHECK-NEXT: retq define i32 @loopInfoSaveOutsideLoop(i32 %cond, i32 %N) #0 { +; ENABLE-LABEL: loopInfoSaveOutsideLoop: +; ENABLE: # %bb.0: # %entry +; ENABLE-NEXT: pushq %rbx +; ENABLE-NEXT: .seh_pushreg %rbx +; ENABLE-NEXT: .seh_endprologue +; ENABLE-NEXT: testl %ecx, %ecx +; ENABLE-NEXT: je .LBB0_4 +; ENABLE-NEXT: # %bb.1: # %for.preheader +; ENABLE-NEXT: #APP +; ENABLE-NEXT: nop +; ENABLE-NEXT: #NO_APP +; ENABLE-NEXT: xorl %eax, %eax +; ENABLE-NEXT: movl $10, %ecx +; ENABLE-NEXT: #APP +; ENABLE-NEXT: movl $1, %edx +; ENABLE-NEXT: #NO_APP +; ENABLE-NEXT: .p2align 4, 0x90 +; ENABLE-NEXT: .LBB0_2: # %for.body +; ENABLE-NEXT: # =>This Inner Loop Header: Depth=1 +; ENABLE-NEXT: addl %edx, %eax +; ENABLE-NEXT: decl %ecx +; ENABLE-NEXT: jne .LBB0_2 +; ENABLE-NEXT: # %bb.3: # %for.end +; ENABLE-NEXT: #APP +; ENABLE-NEXT: nop +; ENABLE-NEXT: #NO_APP +; ENABLE-NEXT: shll $3, %eax +; ENABLE-NEXT: jmp .LBB0_5 +; ENABLE-NEXT: .LBB0_4: # %if.else +; ENABLE-NEXT: movl %edx, %eax +; ENABLE-NEXT: addl %edx, %eax +; ENABLE-NEXT: .LBB0_5: # %if.end +; ENABLE-NEXT: popq %rbx +; ENABLE-NEXT: retq +; ENABLE-NEXT: .seh_endproc +; +; DISABLE-LABEL: loopInfoSaveOutsideLoop: +; DISABLE: # %bb.0: # %entry +; DISABLE-NEXT: pushq %rbx +; DISABLE-NEXT: .seh_pushreg %rbx +; DISABLE-NEXT: .seh_endprologue +; DISABLE-NEXT: testl %ecx, %ecx +; DISABLE-NEXT: je .LBB0_4 +; DISABLE-NEXT: # %bb.1: # %for.preheader +; DISABLE-NEXT: #APP +; DISABLE-NEXT: nop +; DISABLE-NEXT: #NO_APP +; DISABLE-NEXT: xorl %eax, %eax +; DISABLE-NEXT: movl $10, %ecx +; DISABLE-NEXT: #APP +; DISABLE-NEXT: movl $1, %edx +; DISABLE-NEXT: #NO_APP +; DISABLE-NEXT: .p2align 4, 0x90 +; DISABLE-NEXT: .LBB0_2: # %for.body +; DISABLE-NEXT: # =>This Inner Loop Header: Depth=1 +; DISABLE-NEXT: addl %edx, %eax +; DISABLE-NEXT: decl %ecx +; DISABLE-NEXT: jne .LBB0_2 +; DISABLE-NEXT: # %bb.3: # %for.end +; DISABLE-NEXT: #APP +; DISABLE-NEXT: nop +; DISABLE-NEXT: #NO_APP +; DISABLE-NEXT: shll $3, %eax +; DISABLE-NEXT: jmp .LBB0_5 +; DISABLE-NEXT: .LBB0_4: # %if.else +; DISABLE-NEXT: movl %edx, %eax +; DISABLE-NEXT: addl %edx, %eax +; DISABLE-NEXT: .LBB0_5: # %if.end +; DISABLE-NEXT: popq %rbx +; DISABLE-NEXT: retq +; DISABLE-NEXT: .seh_endproc entry: %tobool = icmp eq i32 %cond, 0 br i1 %tobool, label %if.else, label %for.preheader @@ -49,46 +115,77 @@ ; When we can sink the epilogue of the function into an existing exit block, ; this is Ok for shrink-wrapping to kicks in. -; CHECK-LABEL: loopInfoSaveOutsideLoop2: -; ENABLE: testl %ecx, %ecx -; ENABLE-NEXT: je [[ELSE_LABEL:.LBB[0-9_]+]] -; -; Prologue code. -; Make sure we save the CSR used in the inline asm: rbx. -; CHECK: pushq %rbx -; -; DISABLE: testl %ecx, %ecx -; DISABLE-NEXT: je [[ELSE_LABEL:.LBB[0-9_]+]] -; -; CHECK: nop -; CHECK: xorl [[SUM:%eax]], [[SUM]] -; CHECK-NEXT: movl $10, [[IV:%e[a-z]+]] -; -; CHECK: [[LOOP_LABEL:.LBB[0-9_]+]]: # %for.body -; CHECK: movl $1, [[TMP:%e[a-z]+]] -; CHECK: addl [[TMP]], [[SUM]] -; CHECK-NEXT: decl [[IV]] -; CHECK-NEXT: jne [[LOOP_LABEL]] -; Next BB. -; CHECK: nop -; CHECK: shll $3, [[SUM]] -; -; DISABLE: jmp [[EPILOG_BB:.LBB[0-9_]+]] -; -; ENABLE-NEXT: popq %rbx -; ENABLE-NEXT: retq -; -; CHECK: [[ELSE_LABEL]]: # %if.else -; Shift second argument by one and store into returned register. -; CHECK: addl %edx, %edx -; CHECK: movl %edx, %eax -; -; DISABLE: [[EPILOG_BB]]: # %if.end -; DISABLE-NEXT: popq %rbx -; -; CHECK: retq -; define i32 @loopInfoSaveOutsideLoop2(i32 %cond, i32 %N) #0 { +; ENABLE-LABEL: loopInfoSaveOutsideLoop2: +; ENABLE: # %bb.0: # %entry +; ENABLE-NEXT: testl %ecx, %ecx +; ENABLE-NEXT: je .LBB1_4 +; ENABLE-NEXT: # %bb.1: # %for.preheader +; ENABLE-NEXT: pushq %rbx +; ENABLE-NEXT: .seh_pushreg %rbx +; ENABLE-NEXT: .seh_endprologue +; ENABLE-NEXT: #APP +; ENABLE-NEXT: nop +; ENABLE-NEXT: #NO_APP +; ENABLE-NEXT: xorl %eax, %eax +; ENABLE-NEXT: movl $10, %ecx +; ENABLE-NEXT: .p2align 4, 0x90 +; ENABLE-NEXT: .LBB1_2: # %for.body +; ENABLE-NEXT: # =>This Inner Loop Header: Depth=1 +; ENABLE-NEXT: #APP +; ENABLE-NEXT: movl $1, %edx +; ENABLE-NEXT: #NO_APP +; ENABLE-NEXT: addl %edx, %eax +; ENABLE-NEXT: decl %ecx +; ENABLE-NEXT: jne .LBB1_2 +; ENABLE-NEXT: # %bb.3: # %for.end +; ENABLE-NEXT: #APP +; ENABLE-NEXT: nop +; ENABLE-NEXT: #NO_APP +; ENABLE-NEXT: shll $3, %eax +; ENABLE-NEXT: popq %rbx +; ENABLE-NEXT: retq +; ENABLE-NEXT: .LBB1_4: # %if.else +; ENABLE-NEXT: addl %edx, %edx +; ENABLE-NEXT: movl %edx, %eax +; ENABLE-NEXT: retq +; ENABLE-NEXT: .seh_endproc +; +; DISABLE-LABEL: loopInfoSaveOutsideLoop2: +; DISABLE: # %bb.0: # %entry +; DISABLE-NEXT: pushq %rbx +; DISABLE-NEXT: .seh_pushreg %rbx +; DISABLE-NEXT: .seh_endprologue +; DISABLE-NEXT: testl %ecx, %ecx +; DISABLE-NEXT: je .LBB1_4 +; DISABLE-NEXT: # %bb.1: # %for.preheader +; DISABLE-NEXT: #APP +; DISABLE-NEXT: nop +; DISABLE-NEXT: #NO_APP +; DISABLE-NEXT: xorl %eax, %eax +; DISABLE-NEXT: movl $10, %ecx +; DISABLE-NEXT: .p2align 4, 0x90 +; DISABLE-NEXT: .LBB1_2: # %for.body +; DISABLE-NEXT: # =>This Inner Loop Header: Depth=1 +; DISABLE-NEXT: #APP +; DISABLE-NEXT: movl $1, %edx +; DISABLE-NEXT: #NO_APP +; DISABLE-NEXT: addl %edx, %eax +; DISABLE-NEXT: decl %ecx +; DISABLE-NEXT: jne .LBB1_2 +; DISABLE-NEXT: # %bb.3: # %for.end +; DISABLE-NEXT: #APP +; DISABLE-NEXT: nop +; DISABLE-NEXT: #NO_APP +; DISABLE-NEXT: shll $3, %eax +; DISABLE-NEXT: jmp .LBB1_5 +; DISABLE-NEXT: .LBB1_4: # %if.else +; DISABLE-NEXT: addl %edx, %edx +; DISABLE-NEXT: movl %edx, %eax +; DISABLE-NEXT: .LBB1_5: # %if.end +; DISABLE-NEXT: popq %rbx +; DISABLE-NEXT: retq +; DISABLE-NEXT: .seh_endproc entry: %tobool = icmp eq i32 %cond, 0 br i1 %tobool, label %if.else, label %for.preheader