diff --git a/clang/include/clang/Basic/riscv_vector.td b/clang/include/clang/Basic/riscv_vector.td --- a/clang/include/clang/Basic/riscv_vector.td +++ b/clang/include/clang/Basic/riscv_vector.td @@ -2636,7 +2636,7 @@ } } - let Name = "vset_v", Log2LMUL = [0, 1, 2], MaskedPolicyScheme = NonePolicy, + let Name = "vset_v", MaskedPolicyScheme = NonePolicy, ManualCodegen = [{ { if (isa(ResultType)) // For tuple type @@ -2657,15 +2657,16 @@ return Builder.CreateInsertVector(ResultType, Ops[0], Ops[2], Ops[1]); } }] in { - foreach dst_lmul = ["(LFixedLog2LMUL:1)", "(LFixedLog2LMUL:2)", "(LFixedLog2LMUL:3)"] in { - def : RVVBuiltin<"v" # dst_lmul # "v", dst_lmul # "v" # dst_lmul # "vKzv", "csilxfd">; - def : RVVBuiltin<"Uv" # dst_lmul # "Uv", dst_lmul # "Uv" # dst_lmul #"UvKzUv", "csil">; - } - foreach nf = [2] in { - let Log2LMUL = [0] in { - defvar T = "(Tuple:" # nf # ")"; - def : RVVBuiltin; + let Log2LMUL = [0, 1, 2] in { + foreach dst_lmul = ["(LFixedLog2LMUL:1)", "(LFixedLog2LMUL:2)", "(LFixedLog2LMUL:3)"] in { + def : RVVBuiltin<"v" # dst_lmul # "v", dst_lmul # "v" # dst_lmul # "vKzv", "csilxfd">; + def : RVVBuiltin<"Uv" # dst_lmul # "Uv", dst_lmul # "Uv" # dst_lmul #"UvKzUv", "csil">; } } + foreach nf = NFList in { + defvar T = "(Tuple:" # nf # ")"; + def : RVVBuiltin<"v" # T # "v", T # "v" # T # "vKzv", "csilxfd">; + def : RVVBuiltin<"Uv" # T # "Uv", T # "Uv" # T # "UvKzUv", "csil">; + } } } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset.c --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset.c @@ -667,3 +667,3294 @@ return __riscv_vset_v_u64m4_u64m8(dest, 0, val); } +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f16mf4_f16mf4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat16mf4x2_t test_vset_v_f16mf4_f16mf4x2(vfloat16mf4x2_t dest, size_t index, vfloat16mf4_t val) { + return __riscv_vset_v_f16mf4_f16mf4x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_f16mf4_f16mf4x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vfloat16mf4x3_t test_vset_v_f16mf4_f16mf4x3(vfloat16mf4x3_t dest, size_t index, vfloat16mf4_t val) { + return __riscv_vset_v_f16mf4_f16mf4x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_f16mf4_f16mf4x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vfloat16mf4x4_t test_vset_v_f16mf4_f16mf4x4(vfloat16mf4x4_t dest, size_t index, vfloat16mf4_t val) { + return __riscv_vset_v_f16mf4_f16mf4x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_f16mf4_f16mf4x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vfloat16mf4x5_t test_vset_v_f16mf4_f16mf4x5(vfloat16mf4x5_t dest, size_t index, vfloat16mf4_t val) { + return __riscv_vset_v_f16mf4_f16mf4x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_f16mf4_f16mf4x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vfloat16mf4x6_t test_vset_v_f16mf4_f16mf4x6(vfloat16mf4x6_t dest, size_t index, vfloat16mf4_t val) { + return __riscv_vset_v_f16mf4_f16mf4x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_f16mf4_f16mf4x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vfloat16mf4x7_t test_vset_v_f16mf4_f16mf4x7(vfloat16mf4x7_t dest, size_t index, vfloat16mf4_t val) { + return __riscv_vset_v_f16mf4_f16mf4x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_f16mf4_f16mf4x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vfloat16mf4x8_t test_vset_v_f16mf4_f16mf4x8(vfloat16mf4x8_t dest, size_t index, vfloat16mf4_t val) { + return __riscv_vset_v_f16mf4_f16mf4x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f16mf2_f16mf2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat16mf2x2_t test_vset_v_f16mf2_f16mf2x2(vfloat16mf2x2_t dest, size_t index, vfloat16mf2_t val) { + return __riscv_vset_v_f16mf2_f16mf2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_f16mf2_f16mf2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vfloat16mf2x3_t test_vset_v_f16mf2_f16mf2x3(vfloat16mf2x3_t dest, size_t index, vfloat16mf2_t val) { + return __riscv_vset_v_f16mf2_f16mf2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_f16mf2_f16mf2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vfloat16mf2x4_t test_vset_v_f16mf2_f16mf2x4(vfloat16mf2x4_t dest, size_t index, vfloat16mf2_t val) { + return __riscv_vset_v_f16mf2_f16mf2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_f16mf2_f16mf2x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vfloat16mf2x5_t test_vset_v_f16mf2_f16mf2x5(vfloat16mf2x5_t dest, size_t index, vfloat16mf2_t val) { + return __riscv_vset_v_f16mf2_f16mf2x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_f16mf2_f16mf2x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vfloat16mf2x6_t test_vset_v_f16mf2_f16mf2x6(vfloat16mf2x6_t dest, size_t index, vfloat16mf2_t val) { + return __riscv_vset_v_f16mf2_f16mf2x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_f16mf2_f16mf2x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vfloat16mf2x7_t test_vset_v_f16mf2_f16mf2x7(vfloat16mf2x7_t dest, size_t index, vfloat16mf2_t val) { + return __riscv_vset_v_f16mf2_f16mf2x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_f16mf2_f16mf2x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vfloat16mf2x8_t test_vset_v_f16mf2_f16mf2x8(vfloat16mf2x8_t dest, size_t index, vfloat16mf2_t val) { + return __riscv_vset_v_f16mf2_f16mf2x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f16m1_f16m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat16m1x2_t test_vset_v_f16m1_f16m1x2(vfloat16m1x2_t dest, size_t index, vfloat16m1_t val) { + return __riscv_vset_v_f16m1_f16m1x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_f16m1_f16m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vfloat16m1x3_t test_vset_v_f16m1_f16m1x3(vfloat16m1x3_t dest, size_t index, vfloat16m1_t val) { + return __riscv_vset_v_f16m1_f16m1x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_f16m1_f16m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vfloat16m1x4_t test_vset_v_f16m1_f16m1x4(vfloat16m1x4_t dest, size_t index, vfloat16m1_t val) { + return __riscv_vset_v_f16m1_f16m1x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_f16m1_f16m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vfloat16m1x5_t test_vset_v_f16m1_f16m1x5(vfloat16m1x5_t dest, size_t index, vfloat16m1_t val) { + return __riscv_vset_v_f16m1_f16m1x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_f16m1_f16m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vfloat16m1x6_t test_vset_v_f16m1_f16m1x6(vfloat16m1x6_t dest, size_t index, vfloat16m1_t val) { + return __riscv_vset_v_f16m1_f16m1x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_f16m1_f16m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vfloat16m1x7_t test_vset_v_f16m1_f16m1x7(vfloat16m1x7_t dest, size_t index, vfloat16m1_t val) { + return __riscv_vset_v_f16m1_f16m1x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_f16m1_f16m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vfloat16m1x8_t test_vset_v_f16m1_f16m1x8(vfloat16m1x8_t dest, size_t index, vfloat16m1_t val) { + return __riscv_vset_v_f16m1_f16m1x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f16m2_f16m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat16m2x2_t test_vset_v_f16m2_f16m2x2(vfloat16m2x2_t dest, size_t index, vfloat16m2_t val) { + return __riscv_vset_v_f16m2_f16m2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_f16m2_f16m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vfloat16m2x3_t test_vset_v_f16m2_f16m2x3(vfloat16m2x3_t dest, size_t index, vfloat16m2_t val) { + return __riscv_vset_v_f16m2_f16m2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_f16m2_f16m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vfloat16m2x4_t test_vset_v_f16m2_f16m2x4(vfloat16m2x4_t dest, size_t index, vfloat16m2_t val) { + return __riscv_vset_v_f16m2_f16m2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f16m4_f16m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat16m4x2_t test_vset_v_f16m4_f16m4x2(vfloat16m4x2_t dest, size_t index, vfloat16m4_t val) { + return __riscv_vset_v_f16m4_f16m4x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f32mf2_f32mf2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat32mf2x2_t test_vset_v_f32mf2_f32mf2x2(vfloat32mf2x2_t dest, size_t index, vfloat32mf2_t val) { + return __riscv_vset_v_f32mf2_f32mf2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_f32mf2_f32mf2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vfloat32mf2x3_t test_vset_v_f32mf2_f32mf2x3(vfloat32mf2x3_t dest, size_t index, vfloat32mf2_t val) { + return __riscv_vset_v_f32mf2_f32mf2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_f32mf2_f32mf2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vfloat32mf2x4_t test_vset_v_f32mf2_f32mf2x4(vfloat32mf2x4_t dest, size_t index, vfloat32mf2_t val) { + return __riscv_vset_v_f32mf2_f32mf2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_f32mf2_f32mf2x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vfloat32mf2x5_t test_vset_v_f32mf2_f32mf2x5(vfloat32mf2x5_t dest, size_t index, vfloat32mf2_t val) { + return __riscv_vset_v_f32mf2_f32mf2x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_f32mf2_f32mf2x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vfloat32mf2x6_t test_vset_v_f32mf2_f32mf2x6(vfloat32mf2x6_t dest, size_t index, vfloat32mf2_t val) { + return __riscv_vset_v_f32mf2_f32mf2x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_f32mf2_f32mf2x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vfloat32mf2x7_t test_vset_v_f32mf2_f32mf2x7(vfloat32mf2x7_t dest, size_t index, vfloat32mf2_t val) { + return __riscv_vset_v_f32mf2_f32mf2x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_f32mf2_f32mf2x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vfloat32mf2x8_t test_vset_v_f32mf2_f32mf2x8(vfloat32mf2x8_t dest, size_t index, vfloat32mf2_t val) { + return __riscv_vset_v_f32mf2_f32mf2x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f32m1_f32m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat32m1x2_t test_vset_v_f32m1_f32m1x2(vfloat32m1x2_t dest, size_t index, vfloat32m1_t val) { + return __riscv_vset_v_f32m1_f32m1x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_f32m1_f32m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vfloat32m1x3_t test_vset_v_f32m1_f32m1x3(vfloat32m1x3_t dest, size_t index, vfloat32m1_t val) { + return __riscv_vset_v_f32m1_f32m1x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_f32m1_f32m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vfloat32m1x4_t test_vset_v_f32m1_f32m1x4(vfloat32m1x4_t dest, size_t index, vfloat32m1_t val) { + return __riscv_vset_v_f32m1_f32m1x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_f32m1_f32m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vfloat32m1x5_t test_vset_v_f32m1_f32m1x5(vfloat32m1x5_t dest, size_t index, vfloat32m1_t val) { + return __riscv_vset_v_f32m1_f32m1x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_f32m1_f32m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vfloat32m1x6_t test_vset_v_f32m1_f32m1x6(vfloat32m1x6_t dest, size_t index, vfloat32m1_t val) { + return __riscv_vset_v_f32m1_f32m1x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_f32m1_f32m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vfloat32m1x7_t test_vset_v_f32m1_f32m1x7(vfloat32m1x7_t dest, size_t index, vfloat32m1_t val) { + return __riscv_vset_v_f32m1_f32m1x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_f32m1_f32m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vfloat32m1x8_t test_vset_v_f32m1_f32m1x8(vfloat32m1x8_t dest, size_t index, vfloat32m1_t val) { + return __riscv_vset_v_f32m1_f32m1x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f32m2_f32m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat32m2x2_t test_vset_v_f32m2_f32m2x2(vfloat32m2x2_t dest, size_t index, vfloat32m2_t val) { + return __riscv_vset_v_f32m2_f32m2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_f32m2_f32m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vfloat32m2x3_t test_vset_v_f32m2_f32m2x3(vfloat32m2x3_t dest, size_t index, vfloat32m2_t val) { + return __riscv_vset_v_f32m2_f32m2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_f32m2_f32m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vfloat32m2x4_t test_vset_v_f32m2_f32m2x4(vfloat32m2x4_t dest, size_t index, vfloat32m2_t val) { + return __riscv_vset_v_f32m2_f32m2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f32m4_f32m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat32m4x2_t test_vset_v_f32m4_f32m4x2(vfloat32m4x2_t dest, size_t index, vfloat32m4_t val) { + return __riscv_vset_v_f32m4_f32m4x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f64m1_f64m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat64m1x2_t test_vset_v_f64m1_f64m1x2(vfloat64m1x2_t dest, size_t index, vfloat64m1_t val) { + return __riscv_vset_v_f64m1_f64m1x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_f64m1_f64m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vfloat64m1x3_t test_vset_v_f64m1_f64m1x3(vfloat64m1x3_t dest, size_t index, vfloat64m1_t val) { + return __riscv_vset_v_f64m1_f64m1x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_f64m1_f64m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vfloat64m1x4_t test_vset_v_f64m1_f64m1x4(vfloat64m1x4_t dest, size_t index, vfloat64m1_t val) { + return __riscv_vset_v_f64m1_f64m1x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_f64m1_f64m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vfloat64m1x5_t test_vset_v_f64m1_f64m1x5(vfloat64m1x5_t dest, size_t index, vfloat64m1_t val) { + return __riscv_vset_v_f64m1_f64m1x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_f64m1_f64m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vfloat64m1x6_t test_vset_v_f64m1_f64m1x6(vfloat64m1x6_t dest, size_t index, vfloat64m1_t val) { + return __riscv_vset_v_f64m1_f64m1x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_f64m1_f64m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vfloat64m1x7_t test_vset_v_f64m1_f64m1x7(vfloat64m1x7_t dest, size_t index, vfloat64m1_t val) { + return __riscv_vset_v_f64m1_f64m1x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_f64m1_f64m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vfloat64m1x8_t test_vset_v_f64m1_f64m1x8(vfloat64m1x8_t dest, size_t index, vfloat64m1_t val) { + return __riscv_vset_v_f64m1_f64m1x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f64m2_f64m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat64m2x2_t test_vset_v_f64m2_f64m2x2(vfloat64m2x2_t dest, size_t index, vfloat64m2_t val) { + return __riscv_vset_v_f64m2_f64m2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_f64m2_f64m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vfloat64m2x3_t test_vset_v_f64m2_f64m2x3(vfloat64m2x3_t dest, size_t index, vfloat64m2_t val) { + return __riscv_vset_v_f64m2_f64m2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_f64m2_f64m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vfloat64m2x4_t test_vset_v_f64m2_f64m2x4(vfloat64m2x4_t dest, size_t index, vfloat64m2_t val) { + return __riscv_vset_v_f64m2_f64m2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f64m4_f64m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat64m4x2_t test_vset_v_f64m4_f64m4x2(vfloat64m4x2_t dest, size_t index, vfloat64m4_t val) { + return __riscv_vset_v_f64m4_f64m4x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i8mf8_i8mf8x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint8mf8x2_t test_vset_v_i8mf8_i8mf8x2(vint8mf8x2_t dest, size_t index, vint8mf8_t val) { + return __riscv_vset_v_i8mf8_i8mf8x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i8mf8_i8mf8x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint8mf8x3_t test_vset_v_i8mf8_i8mf8x3(vint8mf8x3_t dest, size_t index, vint8mf8_t val) { + return __riscv_vset_v_i8mf8_i8mf8x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i8mf8_i8mf8x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint8mf8x4_t test_vset_v_i8mf8_i8mf8x4(vint8mf8x4_t dest, size_t index, vint8mf8_t val) { + return __riscv_vset_v_i8mf8_i8mf8x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i8mf8_i8mf8x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint8mf8x5_t test_vset_v_i8mf8_i8mf8x5(vint8mf8x5_t dest, size_t index, vint8mf8_t val) { + return __riscv_vset_v_i8mf8_i8mf8x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i8mf8_i8mf8x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint8mf8x6_t test_vset_v_i8mf8_i8mf8x6(vint8mf8x6_t dest, size_t index, vint8mf8_t val) { + return __riscv_vset_v_i8mf8_i8mf8x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i8mf8_i8mf8x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint8mf8x7_t test_vset_v_i8mf8_i8mf8x7(vint8mf8x7_t dest, size_t index, vint8mf8_t val) { + return __riscv_vset_v_i8mf8_i8mf8x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i8mf8_i8mf8x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint8mf8x8_t test_vset_v_i8mf8_i8mf8x8(vint8mf8x8_t dest, size_t index, vint8mf8_t val) { + return __riscv_vset_v_i8mf8_i8mf8x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i8mf4_i8mf4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint8mf4x2_t test_vset_v_i8mf4_i8mf4x2(vint8mf4x2_t dest, size_t index, vint8mf4_t val) { + return __riscv_vset_v_i8mf4_i8mf4x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i8mf4_i8mf4x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint8mf4x3_t test_vset_v_i8mf4_i8mf4x3(vint8mf4x3_t dest, size_t index, vint8mf4_t val) { + return __riscv_vset_v_i8mf4_i8mf4x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i8mf4_i8mf4x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint8mf4x4_t test_vset_v_i8mf4_i8mf4x4(vint8mf4x4_t dest, size_t index, vint8mf4_t val) { + return __riscv_vset_v_i8mf4_i8mf4x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i8mf4_i8mf4x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint8mf4x5_t test_vset_v_i8mf4_i8mf4x5(vint8mf4x5_t dest, size_t index, vint8mf4_t val) { + return __riscv_vset_v_i8mf4_i8mf4x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i8mf4_i8mf4x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint8mf4x6_t test_vset_v_i8mf4_i8mf4x6(vint8mf4x6_t dest, size_t index, vint8mf4_t val) { + return __riscv_vset_v_i8mf4_i8mf4x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i8mf4_i8mf4x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint8mf4x7_t test_vset_v_i8mf4_i8mf4x7(vint8mf4x7_t dest, size_t index, vint8mf4_t val) { + return __riscv_vset_v_i8mf4_i8mf4x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i8mf4_i8mf4x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint8mf4x8_t test_vset_v_i8mf4_i8mf4x8(vint8mf4x8_t dest, size_t index, vint8mf4_t val) { + return __riscv_vset_v_i8mf4_i8mf4x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i8mf2_i8mf2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint8mf2x2_t test_vset_v_i8mf2_i8mf2x2(vint8mf2x2_t dest, size_t index, vint8mf2_t val) { + return __riscv_vset_v_i8mf2_i8mf2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i8mf2_i8mf2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint8mf2x3_t test_vset_v_i8mf2_i8mf2x3(vint8mf2x3_t dest, size_t index, vint8mf2_t val) { + return __riscv_vset_v_i8mf2_i8mf2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i8mf2_i8mf2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint8mf2x4_t test_vset_v_i8mf2_i8mf2x4(vint8mf2x4_t dest, size_t index, vint8mf2_t val) { + return __riscv_vset_v_i8mf2_i8mf2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i8mf2_i8mf2x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint8mf2x5_t test_vset_v_i8mf2_i8mf2x5(vint8mf2x5_t dest, size_t index, vint8mf2_t val) { + return __riscv_vset_v_i8mf2_i8mf2x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i8mf2_i8mf2x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint8mf2x6_t test_vset_v_i8mf2_i8mf2x6(vint8mf2x6_t dest, size_t index, vint8mf2_t val) { + return __riscv_vset_v_i8mf2_i8mf2x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i8mf2_i8mf2x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint8mf2x7_t test_vset_v_i8mf2_i8mf2x7(vint8mf2x7_t dest, size_t index, vint8mf2_t val) { + return __riscv_vset_v_i8mf2_i8mf2x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i8mf2_i8mf2x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint8mf2x8_t test_vset_v_i8mf2_i8mf2x8(vint8mf2x8_t dest, size_t index, vint8mf2_t val) { + return __riscv_vset_v_i8mf2_i8mf2x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i8m1_i8m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint8m1x2_t test_vset_v_i8m1_i8m1x2(vint8m1x2_t dest, size_t index, vint8m1_t val) { + return __riscv_vset_v_i8m1_i8m1x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i8m1_i8m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint8m1x3_t test_vset_v_i8m1_i8m1x3(vint8m1x3_t dest, size_t index, vint8m1_t val) { + return __riscv_vset_v_i8m1_i8m1x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i8m1_i8m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint8m1x4_t test_vset_v_i8m1_i8m1x4(vint8m1x4_t dest, size_t index, vint8m1_t val) { + return __riscv_vset_v_i8m1_i8m1x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i8m1_i8m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint8m1x5_t test_vset_v_i8m1_i8m1x5(vint8m1x5_t dest, size_t index, vint8m1_t val) { + return __riscv_vset_v_i8m1_i8m1x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i8m1_i8m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint8m1x6_t test_vset_v_i8m1_i8m1x6(vint8m1x6_t dest, size_t index, vint8m1_t val) { + return __riscv_vset_v_i8m1_i8m1x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i8m1_i8m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint8m1x7_t test_vset_v_i8m1_i8m1x7(vint8m1x7_t dest, size_t index, vint8m1_t val) { + return __riscv_vset_v_i8m1_i8m1x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i8m1_i8m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint8m1x8_t test_vset_v_i8m1_i8m1x8(vint8m1x8_t dest, size_t index, vint8m1_t val) { + return __riscv_vset_v_i8m1_i8m1x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i8m2_i8m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint8m2x2_t test_vset_v_i8m2_i8m2x2(vint8m2x2_t dest, size_t index, vint8m2_t val) { + return __riscv_vset_v_i8m2_i8m2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i8m2_i8m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint8m2x3_t test_vset_v_i8m2_i8m2x3(vint8m2x3_t dest, size_t index, vint8m2_t val) { + return __riscv_vset_v_i8m2_i8m2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i8m2_i8m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint8m2x4_t test_vset_v_i8m2_i8m2x4(vint8m2x4_t dest, size_t index, vint8m2_t val) { + return __riscv_vset_v_i8m2_i8m2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i8m4_i8m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint8m4x2_t test_vset_v_i8m4_i8m4x2(vint8m4x2_t dest, size_t index, vint8m4_t val) { + return __riscv_vset_v_i8m4_i8m4x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i16mf4_i16mf4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint16mf4x2_t test_vset_v_i16mf4_i16mf4x2(vint16mf4x2_t dest, size_t index, vint16mf4_t val) { + return __riscv_vset_v_i16mf4_i16mf4x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i16mf4_i16mf4x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint16mf4x3_t test_vset_v_i16mf4_i16mf4x3(vint16mf4x3_t dest, size_t index, vint16mf4_t val) { + return __riscv_vset_v_i16mf4_i16mf4x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i16mf4_i16mf4x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint16mf4x4_t test_vset_v_i16mf4_i16mf4x4(vint16mf4x4_t dest, size_t index, vint16mf4_t val) { + return __riscv_vset_v_i16mf4_i16mf4x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i16mf4_i16mf4x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint16mf4x5_t test_vset_v_i16mf4_i16mf4x5(vint16mf4x5_t dest, size_t index, vint16mf4_t val) { + return __riscv_vset_v_i16mf4_i16mf4x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i16mf4_i16mf4x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint16mf4x6_t test_vset_v_i16mf4_i16mf4x6(vint16mf4x6_t dest, size_t index, vint16mf4_t val) { + return __riscv_vset_v_i16mf4_i16mf4x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i16mf4_i16mf4x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint16mf4x7_t test_vset_v_i16mf4_i16mf4x7(vint16mf4x7_t dest, size_t index, vint16mf4_t val) { + return __riscv_vset_v_i16mf4_i16mf4x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i16mf4_i16mf4x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint16mf4x8_t test_vset_v_i16mf4_i16mf4x8(vint16mf4x8_t dest, size_t index, vint16mf4_t val) { + return __riscv_vset_v_i16mf4_i16mf4x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i16mf2_i16mf2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint16mf2x2_t test_vset_v_i16mf2_i16mf2x2(vint16mf2x2_t dest, size_t index, vint16mf2_t val) { + return __riscv_vset_v_i16mf2_i16mf2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i16mf2_i16mf2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint16mf2x3_t test_vset_v_i16mf2_i16mf2x3(vint16mf2x3_t dest, size_t index, vint16mf2_t val) { + return __riscv_vset_v_i16mf2_i16mf2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i16mf2_i16mf2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint16mf2x4_t test_vset_v_i16mf2_i16mf2x4(vint16mf2x4_t dest, size_t index, vint16mf2_t val) { + return __riscv_vset_v_i16mf2_i16mf2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i16mf2_i16mf2x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint16mf2x5_t test_vset_v_i16mf2_i16mf2x5(vint16mf2x5_t dest, size_t index, vint16mf2_t val) { + return __riscv_vset_v_i16mf2_i16mf2x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i16mf2_i16mf2x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint16mf2x6_t test_vset_v_i16mf2_i16mf2x6(vint16mf2x6_t dest, size_t index, vint16mf2_t val) { + return __riscv_vset_v_i16mf2_i16mf2x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i16mf2_i16mf2x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint16mf2x7_t test_vset_v_i16mf2_i16mf2x7(vint16mf2x7_t dest, size_t index, vint16mf2_t val) { + return __riscv_vset_v_i16mf2_i16mf2x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i16mf2_i16mf2x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint16mf2x8_t test_vset_v_i16mf2_i16mf2x8(vint16mf2x8_t dest, size_t index, vint16mf2_t val) { + return __riscv_vset_v_i16mf2_i16mf2x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i16m1_i16m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint16m1x2_t test_vset_v_i16m1_i16m1x2(vint16m1x2_t dest, size_t index, vint16m1_t val) { + return __riscv_vset_v_i16m1_i16m1x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i16m1_i16m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint16m1x3_t test_vset_v_i16m1_i16m1x3(vint16m1x3_t dest, size_t index, vint16m1_t val) { + return __riscv_vset_v_i16m1_i16m1x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i16m1_i16m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint16m1x4_t test_vset_v_i16m1_i16m1x4(vint16m1x4_t dest, size_t index, vint16m1_t val) { + return __riscv_vset_v_i16m1_i16m1x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i16m1_i16m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint16m1x5_t test_vset_v_i16m1_i16m1x5(vint16m1x5_t dest, size_t index, vint16m1_t val) { + return __riscv_vset_v_i16m1_i16m1x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i16m1_i16m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint16m1x6_t test_vset_v_i16m1_i16m1x6(vint16m1x6_t dest, size_t index, vint16m1_t val) { + return __riscv_vset_v_i16m1_i16m1x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i16m1_i16m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint16m1x7_t test_vset_v_i16m1_i16m1x7(vint16m1x7_t dest, size_t index, vint16m1_t val) { + return __riscv_vset_v_i16m1_i16m1x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i16m1_i16m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint16m1x8_t test_vset_v_i16m1_i16m1x8(vint16m1x8_t dest, size_t index, vint16m1_t val) { + return __riscv_vset_v_i16m1_i16m1x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i16m2_i16m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint16m2x2_t test_vset_v_i16m2_i16m2x2(vint16m2x2_t dest, size_t index, vint16m2_t val) { + return __riscv_vset_v_i16m2_i16m2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i16m2_i16m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint16m2x3_t test_vset_v_i16m2_i16m2x3(vint16m2x3_t dest, size_t index, vint16m2_t val) { + return __riscv_vset_v_i16m2_i16m2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i16m2_i16m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint16m2x4_t test_vset_v_i16m2_i16m2x4(vint16m2x4_t dest, size_t index, vint16m2_t val) { + return __riscv_vset_v_i16m2_i16m2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i16m4_i16m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint16m4x2_t test_vset_v_i16m4_i16m4x2(vint16m4x2_t dest, size_t index, vint16m4_t val) { + return __riscv_vset_v_i16m4_i16m4x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i32mf2_i32mf2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint32mf2x2_t test_vset_v_i32mf2_i32mf2x2(vint32mf2x2_t dest, size_t index, vint32mf2_t val) { + return __riscv_vset_v_i32mf2_i32mf2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i32mf2_i32mf2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint32mf2x3_t test_vset_v_i32mf2_i32mf2x3(vint32mf2x3_t dest, size_t index, vint32mf2_t val) { + return __riscv_vset_v_i32mf2_i32mf2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i32mf2_i32mf2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint32mf2x4_t test_vset_v_i32mf2_i32mf2x4(vint32mf2x4_t dest, size_t index, vint32mf2_t val) { + return __riscv_vset_v_i32mf2_i32mf2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i32mf2_i32mf2x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint32mf2x5_t test_vset_v_i32mf2_i32mf2x5(vint32mf2x5_t dest, size_t index, vint32mf2_t val) { + return __riscv_vset_v_i32mf2_i32mf2x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i32mf2_i32mf2x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint32mf2x6_t test_vset_v_i32mf2_i32mf2x6(vint32mf2x6_t dest, size_t index, vint32mf2_t val) { + return __riscv_vset_v_i32mf2_i32mf2x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i32mf2_i32mf2x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint32mf2x7_t test_vset_v_i32mf2_i32mf2x7(vint32mf2x7_t dest, size_t index, vint32mf2_t val) { + return __riscv_vset_v_i32mf2_i32mf2x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i32mf2_i32mf2x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint32mf2x8_t test_vset_v_i32mf2_i32mf2x8(vint32mf2x8_t dest, size_t index, vint32mf2_t val) { + return __riscv_vset_v_i32mf2_i32mf2x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i32m1_i32m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint32m1x2_t test_vset_v_i32m1_i32m1x2(vint32m1x2_t dest, size_t index, vint32m1_t val) { + return __riscv_vset_v_i32m1_i32m1x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i32m1_i32m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint32m1x3_t test_vset_v_i32m1_i32m1x3(vint32m1x3_t dest, size_t index, vint32m1_t val) { + return __riscv_vset_v_i32m1_i32m1x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i32m1_i32m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint32m1x4_t test_vset_v_i32m1_i32m1x4(vint32m1x4_t dest, size_t index, vint32m1_t val) { + return __riscv_vset_v_i32m1_i32m1x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i32m1_i32m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint32m1x5_t test_vset_v_i32m1_i32m1x5(vint32m1x5_t dest, size_t index, vint32m1_t val) { + return __riscv_vset_v_i32m1_i32m1x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i32m1_i32m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint32m1x6_t test_vset_v_i32m1_i32m1x6(vint32m1x6_t dest, size_t index, vint32m1_t val) { + return __riscv_vset_v_i32m1_i32m1x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i32m1_i32m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint32m1x7_t test_vset_v_i32m1_i32m1x7(vint32m1x7_t dest, size_t index, vint32m1_t val) { + return __riscv_vset_v_i32m1_i32m1x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i32m1_i32m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint32m1x8_t test_vset_v_i32m1_i32m1x8(vint32m1x8_t dest, size_t index, vint32m1_t val) { + return __riscv_vset_v_i32m1_i32m1x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i32m2_i32m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint32m2x2_t test_vset_v_i32m2_i32m2x2(vint32m2x2_t dest, size_t index, vint32m2_t val) { + return __riscv_vset_v_i32m2_i32m2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i32m2_i32m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint32m2x3_t test_vset_v_i32m2_i32m2x3(vint32m2x3_t dest, size_t index, vint32m2_t val) { + return __riscv_vset_v_i32m2_i32m2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i32m2_i32m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint32m2x4_t test_vset_v_i32m2_i32m2x4(vint32m2x4_t dest, size_t index, vint32m2_t val) { + return __riscv_vset_v_i32m2_i32m2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i32m4_i32m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint32m4x2_t test_vset_v_i32m4_i32m4x2(vint32m4x2_t dest, size_t index, vint32m4_t val) { + return __riscv_vset_v_i32m4_i32m4x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i64m1_i64m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint64m1x2_t test_vset_v_i64m1_i64m1x2(vint64m1x2_t dest, size_t index, vint64m1_t val) { + return __riscv_vset_v_i64m1_i64m1x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i64m1_i64m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint64m1x3_t test_vset_v_i64m1_i64m1x3(vint64m1x3_t dest, size_t index, vint64m1_t val) { + return __riscv_vset_v_i64m1_i64m1x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i64m1_i64m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint64m1x4_t test_vset_v_i64m1_i64m1x4(vint64m1x4_t dest, size_t index, vint64m1_t val) { + return __riscv_vset_v_i64m1_i64m1x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i64m1_i64m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint64m1x5_t test_vset_v_i64m1_i64m1x5(vint64m1x5_t dest, size_t index, vint64m1_t val) { + return __riscv_vset_v_i64m1_i64m1x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i64m1_i64m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint64m1x6_t test_vset_v_i64m1_i64m1x6(vint64m1x6_t dest, size_t index, vint64m1_t val) { + return __riscv_vset_v_i64m1_i64m1x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i64m1_i64m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint64m1x7_t test_vset_v_i64m1_i64m1x7(vint64m1x7_t dest, size_t index, vint64m1_t val) { + return __riscv_vset_v_i64m1_i64m1x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i64m1_i64m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint64m1x8_t test_vset_v_i64m1_i64m1x8(vint64m1x8_t dest, size_t index, vint64m1_t val) { + return __riscv_vset_v_i64m1_i64m1x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i64m2_i64m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint64m2x2_t test_vset_v_i64m2_i64m2x2(vint64m2x2_t dest, size_t index, vint64m2_t val) { + return __riscv_vset_v_i64m2_i64m2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i64m2_i64m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint64m2x3_t test_vset_v_i64m2_i64m2x3(vint64m2x3_t dest, size_t index, vint64m2_t val) { + return __riscv_vset_v_i64m2_i64m2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i64m2_i64m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint64m2x4_t test_vset_v_i64m2_i64m2x4(vint64m2x4_t dest, size_t index, vint64m2_t val) { + return __riscv_vset_v_i64m2_i64m2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i64m4_i64m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint64m4x2_t test_vset_v_i64m4_i64m4x2(vint64m4x2_t dest, size_t index, vint64m4_t val) { + return __riscv_vset_v_i64m4_i64m4x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u8mf8_u8mf8x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint8mf8x2_t test_vset_v_u8mf8_u8mf8x2(vuint8mf8x2_t dest, size_t index, vuint8mf8_t val) { + return __riscv_vset_v_u8mf8_u8mf8x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u8mf8_u8mf8x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint8mf8x3_t test_vset_v_u8mf8_u8mf8x3(vuint8mf8x3_t dest, size_t index, vuint8mf8_t val) { + return __riscv_vset_v_u8mf8_u8mf8x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u8mf8_u8mf8x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint8mf8x4_t test_vset_v_u8mf8_u8mf8x4(vuint8mf8x4_t dest, size_t index, vuint8mf8_t val) { + return __riscv_vset_v_u8mf8_u8mf8x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u8mf8_u8mf8x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint8mf8x5_t test_vset_v_u8mf8_u8mf8x5(vuint8mf8x5_t dest, size_t index, vuint8mf8_t val) { + return __riscv_vset_v_u8mf8_u8mf8x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u8mf8_u8mf8x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint8mf8x6_t test_vset_v_u8mf8_u8mf8x6(vuint8mf8x6_t dest, size_t index, vuint8mf8_t val) { + return __riscv_vset_v_u8mf8_u8mf8x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u8mf8_u8mf8x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint8mf8x7_t test_vset_v_u8mf8_u8mf8x7(vuint8mf8x7_t dest, size_t index, vuint8mf8_t val) { + return __riscv_vset_v_u8mf8_u8mf8x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u8mf8_u8mf8x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint8mf8x8_t test_vset_v_u8mf8_u8mf8x8(vuint8mf8x8_t dest, size_t index, vuint8mf8_t val) { + return __riscv_vset_v_u8mf8_u8mf8x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u8mf4_u8mf4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint8mf4x2_t test_vset_v_u8mf4_u8mf4x2(vuint8mf4x2_t dest, size_t index, vuint8mf4_t val) { + return __riscv_vset_v_u8mf4_u8mf4x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u8mf4_u8mf4x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint8mf4x3_t test_vset_v_u8mf4_u8mf4x3(vuint8mf4x3_t dest, size_t index, vuint8mf4_t val) { + return __riscv_vset_v_u8mf4_u8mf4x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u8mf4_u8mf4x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint8mf4x4_t test_vset_v_u8mf4_u8mf4x4(vuint8mf4x4_t dest, size_t index, vuint8mf4_t val) { + return __riscv_vset_v_u8mf4_u8mf4x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u8mf4_u8mf4x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint8mf4x5_t test_vset_v_u8mf4_u8mf4x5(vuint8mf4x5_t dest, size_t index, vuint8mf4_t val) { + return __riscv_vset_v_u8mf4_u8mf4x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u8mf4_u8mf4x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint8mf4x6_t test_vset_v_u8mf4_u8mf4x6(vuint8mf4x6_t dest, size_t index, vuint8mf4_t val) { + return __riscv_vset_v_u8mf4_u8mf4x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u8mf4_u8mf4x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint8mf4x7_t test_vset_v_u8mf4_u8mf4x7(vuint8mf4x7_t dest, size_t index, vuint8mf4_t val) { + return __riscv_vset_v_u8mf4_u8mf4x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u8mf4_u8mf4x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint8mf4x8_t test_vset_v_u8mf4_u8mf4x8(vuint8mf4x8_t dest, size_t index, vuint8mf4_t val) { + return __riscv_vset_v_u8mf4_u8mf4x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u8mf2_u8mf2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint8mf2x2_t test_vset_v_u8mf2_u8mf2x2(vuint8mf2x2_t dest, size_t index, vuint8mf2_t val) { + return __riscv_vset_v_u8mf2_u8mf2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u8mf2_u8mf2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint8mf2x3_t test_vset_v_u8mf2_u8mf2x3(vuint8mf2x3_t dest, size_t index, vuint8mf2_t val) { + return __riscv_vset_v_u8mf2_u8mf2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u8mf2_u8mf2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint8mf2x4_t test_vset_v_u8mf2_u8mf2x4(vuint8mf2x4_t dest, size_t index, vuint8mf2_t val) { + return __riscv_vset_v_u8mf2_u8mf2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u8mf2_u8mf2x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint8mf2x5_t test_vset_v_u8mf2_u8mf2x5(vuint8mf2x5_t dest, size_t index, vuint8mf2_t val) { + return __riscv_vset_v_u8mf2_u8mf2x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u8mf2_u8mf2x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint8mf2x6_t test_vset_v_u8mf2_u8mf2x6(vuint8mf2x6_t dest, size_t index, vuint8mf2_t val) { + return __riscv_vset_v_u8mf2_u8mf2x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u8mf2_u8mf2x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint8mf2x7_t test_vset_v_u8mf2_u8mf2x7(vuint8mf2x7_t dest, size_t index, vuint8mf2_t val) { + return __riscv_vset_v_u8mf2_u8mf2x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u8mf2_u8mf2x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint8mf2x8_t test_vset_v_u8mf2_u8mf2x8(vuint8mf2x8_t dest, size_t index, vuint8mf2_t val) { + return __riscv_vset_v_u8mf2_u8mf2x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u8m1_u8m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint8m1x2_t test_vset_v_u8m1_u8m1x2(vuint8m1x2_t dest, size_t index, vuint8m1_t val) { + return __riscv_vset_v_u8m1_u8m1x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u8m1_u8m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint8m1x3_t test_vset_v_u8m1_u8m1x3(vuint8m1x3_t dest, size_t index, vuint8m1_t val) { + return __riscv_vset_v_u8m1_u8m1x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u8m1_u8m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint8m1x4_t test_vset_v_u8m1_u8m1x4(vuint8m1x4_t dest, size_t index, vuint8m1_t val) { + return __riscv_vset_v_u8m1_u8m1x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u8m1_u8m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint8m1x5_t test_vset_v_u8m1_u8m1x5(vuint8m1x5_t dest, size_t index, vuint8m1_t val) { + return __riscv_vset_v_u8m1_u8m1x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u8m1_u8m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint8m1x6_t test_vset_v_u8m1_u8m1x6(vuint8m1x6_t dest, size_t index, vuint8m1_t val) { + return __riscv_vset_v_u8m1_u8m1x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u8m1_u8m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint8m1x7_t test_vset_v_u8m1_u8m1x7(vuint8m1x7_t dest, size_t index, vuint8m1_t val) { + return __riscv_vset_v_u8m1_u8m1x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u8m1_u8m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint8m1x8_t test_vset_v_u8m1_u8m1x8(vuint8m1x8_t dest, size_t index, vuint8m1_t val) { + return __riscv_vset_v_u8m1_u8m1x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u8m2_u8m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint8m2x2_t test_vset_v_u8m2_u8m2x2(vuint8m2x2_t dest, size_t index, vuint8m2_t val) { + return __riscv_vset_v_u8m2_u8m2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u8m2_u8m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint8m2x3_t test_vset_v_u8m2_u8m2x3(vuint8m2x3_t dest, size_t index, vuint8m2_t val) { + return __riscv_vset_v_u8m2_u8m2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u8m2_u8m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint8m2x4_t test_vset_v_u8m2_u8m2x4(vuint8m2x4_t dest, size_t index, vuint8m2_t val) { + return __riscv_vset_v_u8m2_u8m2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u8m4_u8m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint8m4x2_t test_vset_v_u8m4_u8m4x2(vuint8m4x2_t dest, size_t index, vuint8m4_t val) { + return __riscv_vset_v_u8m4_u8m4x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u16mf4_u16mf4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint16mf4x2_t test_vset_v_u16mf4_u16mf4x2(vuint16mf4x2_t dest, size_t index, vuint16mf4_t val) { + return __riscv_vset_v_u16mf4_u16mf4x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u16mf4_u16mf4x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint16mf4x3_t test_vset_v_u16mf4_u16mf4x3(vuint16mf4x3_t dest, size_t index, vuint16mf4_t val) { + return __riscv_vset_v_u16mf4_u16mf4x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u16mf4_u16mf4x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint16mf4x4_t test_vset_v_u16mf4_u16mf4x4(vuint16mf4x4_t dest, size_t index, vuint16mf4_t val) { + return __riscv_vset_v_u16mf4_u16mf4x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u16mf4_u16mf4x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint16mf4x5_t test_vset_v_u16mf4_u16mf4x5(vuint16mf4x5_t dest, size_t index, vuint16mf4_t val) { + return __riscv_vset_v_u16mf4_u16mf4x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u16mf4_u16mf4x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint16mf4x6_t test_vset_v_u16mf4_u16mf4x6(vuint16mf4x6_t dest, size_t index, vuint16mf4_t val) { + return __riscv_vset_v_u16mf4_u16mf4x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u16mf4_u16mf4x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint16mf4x7_t test_vset_v_u16mf4_u16mf4x7(vuint16mf4x7_t dest, size_t index, vuint16mf4_t val) { + return __riscv_vset_v_u16mf4_u16mf4x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u16mf4_u16mf4x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint16mf4x8_t test_vset_v_u16mf4_u16mf4x8(vuint16mf4x8_t dest, size_t index, vuint16mf4_t val) { + return __riscv_vset_v_u16mf4_u16mf4x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u16mf2_u16mf2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint16mf2x2_t test_vset_v_u16mf2_u16mf2x2(vuint16mf2x2_t dest, size_t index, vuint16mf2_t val) { + return __riscv_vset_v_u16mf2_u16mf2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u16mf2_u16mf2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint16mf2x3_t test_vset_v_u16mf2_u16mf2x3(vuint16mf2x3_t dest, size_t index, vuint16mf2_t val) { + return __riscv_vset_v_u16mf2_u16mf2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u16mf2_u16mf2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint16mf2x4_t test_vset_v_u16mf2_u16mf2x4(vuint16mf2x4_t dest, size_t index, vuint16mf2_t val) { + return __riscv_vset_v_u16mf2_u16mf2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u16mf2_u16mf2x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint16mf2x5_t test_vset_v_u16mf2_u16mf2x5(vuint16mf2x5_t dest, size_t index, vuint16mf2_t val) { + return __riscv_vset_v_u16mf2_u16mf2x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u16mf2_u16mf2x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint16mf2x6_t test_vset_v_u16mf2_u16mf2x6(vuint16mf2x6_t dest, size_t index, vuint16mf2_t val) { + return __riscv_vset_v_u16mf2_u16mf2x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u16mf2_u16mf2x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint16mf2x7_t test_vset_v_u16mf2_u16mf2x7(vuint16mf2x7_t dest, size_t index, vuint16mf2_t val) { + return __riscv_vset_v_u16mf2_u16mf2x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u16mf2_u16mf2x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint16mf2x8_t test_vset_v_u16mf2_u16mf2x8(vuint16mf2x8_t dest, size_t index, vuint16mf2_t val) { + return __riscv_vset_v_u16mf2_u16mf2x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u16m1_u16m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint16m1x2_t test_vset_v_u16m1_u16m1x2(vuint16m1x2_t dest, size_t index, vuint16m1_t val) { + return __riscv_vset_v_u16m1_u16m1x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u16m1_u16m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint16m1x3_t test_vset_v_u16m1_u16m1x3(vuint16m1x3_t dest, size_t index, vuint16m1_t val) { + return __riscv_vset_v_u16m1_u16m1x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u16m1_u16m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint16m1x4_t test_vset_v_u16m1_u16m1x4(vuint16m1x4_t dest, size_t index, vuint16m1_t val) { + return __riscv_vset_v_u16m1_u16m1x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u16m1_u16m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint16m1x5_t test_vset_v_u16m1_u16m1x5(vuint16m1x5_t dest, size_t index, vuint16m1_t val) { + return __riscv_vset_v_u16m1_u16m1x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u16m1_u16m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint16m1x6_t test_vset_v_u16m1_u16m1x6(vuint16m1x6_t dest, size_t index, vuint16m1_t val) { + return __riscv_vset_v_u16m1_u16m1x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u16m1_u16m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint16m1x7_t test_vset_v_u16m1_u16m1x7(vuint16m1x7_t dest, size_t index, vuint16m1_t val) { + return __riscv_vset_v_u16m1_u16m1x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u16m1_u16m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint16m1x8_t test_vset_v_u16m1_u16m1x8(vuint16m1x8_t dest, size_t index, vuint16m1_t val) { + return __riscv_vset_v_u16m1_u16m1x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u16m2_u16m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint16m2x2_t test_vset_v_u16m2_u16m2x2(vuint16m2x2_t dest, size_t index, vuint16m2_t val) { + return __riscv_vset_v_u16m2_u16m2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u16m2_u16m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint16m2x3_t test_vset_v_u16m2_u16m2x3(vuint16m2x3_t dest, size_t index, vuint16m2_t val) { + return __riscv_vset_v_u16m2_u16m2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u16m2_u16m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint16m2x4_t test_vset_v_u16m2_u16m2x4(vuint16m2x4_t dest, size_t index, vuint16m2_t val) { + return __riscv_vset_v_u16m2_u16m2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u16m4_u16m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint16m4x2_t test_vset_v_u16m4_u16m4x2(vuint16m4x2_t dest, size_t index, vuint16m4_t val) { + return __riscv_vset_v_u16m4_u16m4x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u32mf2_u32mf2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint32mf2x2_t test_vset_v_u32mf2_u32mf2x2(vuint32mf2x2_t dest, size_t index, vuint32mf2_t val) { + return __riscv_vset_v_u32mf2_u32mf2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u32mf2_u32mf2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint32mf2x3_t test_vset_v_u32mf2_u32mf2x3(vuint32mf2x3_t dest, size_t index, vuint32mf2_t val) { + return __riscv_vset_v_u32mf2_u32mf2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u32mf2_u32mf2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint32mf2x4_t test_vset_v_u32mf2_u32mf2x4(vuint32mf2x4_t dest, size_t index, vuint32mf2_t val) { + return __riscv_vset_v_u32mf2_u32mf2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u32mf2_u32mf2x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint32mf2x5_t test_vset_v_u32mf2_u32mf2x5(vuint32mf2x5_t dest, size_t index, vuint32mf2_t val) { + return __riscv_vset_v_u32mf2_u32mf2x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u32mf2_u32mf2x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint32mf2x6_t test_vset_v_u32mf2_u32mf2x6(vuint32mf2x6_t dest, size_t index, vuint32mf2_t val) { + return __riscv_vset_v_u32mf2_u32mf2x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u32mf2_u32mf2x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint32mf2x7_t test_vset_v_u32mf2_u32mf2x7(vuint32mf2x7_t dest, size_t index, vuint32mf2_t val) { + return __riscv_vset_v_u32mf2_u32mf2x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u32mf2_u32mf2x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint32mf2x8_t test_vset_v_u32mf2_u32mf2x8(vuint32mf2x8_t dest, size_t index, vuint32mf2_t val) { + return __riscv_vset_v_u32mf2_u32mf2x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u32m1_u32m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint32m1x2_t test_vset_v_u32m1_u32m1x2(vuint32m1x2_t dest, size_t index, vuint32m1_t val) { + return __riscv_vset_v_u32m1_u32m1x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u32m1_u32m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint32m1x3_t test_vset_v_u32m1_u32m1x3(vuint32m1x3_t dest, size_t index, vuint32m1_t val) { + return __riscv_vset_v_u32m1_u32m1x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u32m1_u32m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint32m1x4_t test_vset_v_u32m1_u32m1x4(vuint32m1x4_t dest, size_t index, vuint32m1_t val) { + return __riscv_vset_v_u32m1_u32m1x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u32m1_u32m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint32m1x5_t test_vset_v_u32m1_u32m1x5(vuint32m1x5_t dest, size_t index, vuint32m1_t val) { + return __riscv_vset_v_u32m1_u32m1x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u32m1_u32m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint32m1x6_t test_vset_v_u32m1_u32m1x6(vuint32m1x6_t dest, size_t index, vuint32m1_t val) { + return __riscv_vset_v_u32m1_u32m1x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u32m1_u32m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint32m1x7_t test_vset_v_u32m1_u32m1x7(vuint32m1x7_t dest, size_t index, vuint32m1_t val) { + return __riscv_vset_v_u32m1_u32m1x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u32m1_u32m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint32m1x8_t test_vset_v_u32m1_u32m1x8(vuint32m1x8_t dest, size_t index, vuint32m1_t val) { + return __riscv_vset_v_u32m1_u32m1x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u32m2_u32m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint32m2x2_t test_vset_v_u32m2_u32m2x2(vuint32m2x2_t dest, size_t index, vuint32m2_t val) { + return __riscv_vset_v_u32m2_u32m2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u32m2_u32m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint32m2x3_t test_vset_v_u32m2_u32m2x3(vuint32m2x3_t dest, size_t index, vuint32m2_t val) { + return __riscv_vset_v_u32m2_u32m2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u32m2_u32m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint32m2x4_t test_vset_v_u32m2_u32m2x4(vuint32m2x4_t dest, size_t index, vuint32m2_t val) { + return __riscv_vset_v_u32m2_u32m2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u32m4_u32m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint32m4x2_t test_vset_v_u32m4_u32m4x2(vuint32m4x2_t dest, size_t index, vuint32m4_t val) { + return __riscv_vset_v_u32m4_u32m4x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u64m1_u64m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint64m1x2_t test_vset_v_u64m1_u64m1x2(vuint64m1x2_t dest, size_t index, vuint64m1_t val) { + return __riscv_vset_v_u64m1_u64m1x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u64m1_u64m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint64m1x3_t test_vset_v_u64m1_u64m1x3(vuint64m1x3_t dest, size_t index, vuint64m1_t val) { + return __riscv_vset_v_u64m1_u64m1x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u64m1_u64m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint64m1x4_t test_vset_v_u64m1_u64m1x4(vuint64m1x4_t dest, size_t index, vuint64m1_t val) { + return __riscv_vset_v_u64m1_u64m1x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u64m1_u64m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint64m1x5_t test_vset_v_u64m1_u64m1x5(vuint64m1x5_t dest, size_t index, vuint64m1_t val) { + return __riscv_vset_v_u64m1_u64m1x5(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u64m1_u64m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint64m1x6_t test_vset_v_u64m1_u64m1x6(vuint64m1x6_t dest, size_t index, vuint64m1_t val) { + return __riscv_vset_v_u64m1_u64m1x6(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u64m1_u64m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint64m1x7_t test_vset_v_u64m1_u64m1x7(vuint64m1x7_t dest, size_t index, vuint64m1_t val) { + return __riscv_vset_v_u64m1_u64m1x7(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u64m1_u64m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint64m1x8_t test_vset_v_u64m1_u64m1x8(vuint64m1x8_t dest, size_t index, vuint64m1_t val) { + return __riscv_vset_v_u64m1_u64m1x8(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u64m2_u64m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint64m2x2_t test_vset_v_u64m2_u64m2x2(vuint64m2x2_t dest, size_t index, vuint64m2_t val) { + return __riscv_vset_v_u64m2_u64m2x2(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u64m2_u64m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint64m2x3_t test_vset_v_u64m2_u64m2x3(vuint64m2x3_t dest, size_t index, vuint64m2_t val) { + return __riscv_vset_v_u64m2_u64m2x3(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u64m2_u64m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint64m2x4_t test_vset_v_u64m2_u64m2x4(vuint64m2x4_t dest, size_t index, vuint64m2_t val) { + return __riscv_vset_v_u64m2_u64m2x4(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u64m4_u64m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint64m4x2_t test_vset_v_u64m4_u64m4x2(vuint64m4x2_t dest, size_t index, vuint64m4_t val) { + return __riscv_vset_v_u64m4_u64m4x2(dest, 0, val); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset_tuple.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset_tuple.c deleted file mode 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset_tuple.c +++ /dev/null @@ -1,20 +0,0 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2 -// REQUIRES: riscv-registered-target -// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \ -// RUN: -target-feature +experimental-zvfh -disable-O0-optnone \ -// RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \ -// RUN: FileCheck --check-prefix=CHECK-RV64 %s - -#include - -// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i32m1x2_i32m1 -// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[VAL:%.*]]) #[[ATTR0:[0-9]+]] { -// CHECK-RV64-NEXT: entry: -// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 -// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 -// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 -// CHECK-RV64-NEXT: ret { , } [[TMP2]] -// -vint32m1x2_t test_vset_v_i32m1x2_i32m1(vint32m1x2_t dest, vint32m1_t val) { - return __riscv_vset_v_i32m1x2_i32m1(dest, 0, val); -} diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vset.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vset.c --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vset.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vset.c @@ -667,3 +667,3294 @@ return __riscv_vset(dest, 0, val); } +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f16mf4_f16mf4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat16mf4x2_t test_vset_v_f16mf4_f16mf4x2(vfloat16mf4x2_t dest, size_t index, vfloat16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_f16mf4_f16mf4x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vfloat16mf4x3_t test_vset_v_f16mf4_f16mf4x3(vfloat16mf4x3_t dest, size_t index, vfloat16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_f16mf4_f16mf4x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vfloat16mf4x4_t test_vset_v_f16mf4_f16mf4x4(vfloat16mf4x4_t dest, size_t index, vfloat16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_f16mf4_f16mf4x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vfloat16mf4x5_t test_vset_v_f16mf4_f16mf4x5(vfloat16mf4x5_t dest, size_t index, vfloat16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_f16mf4_f16mf4x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vfloat16mf4x6_t test_vset_v_f16mf4_f16mf4x6(vfloat16mf4x6_t dest, size_t index, vfloat16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_f16mf4_f16mf4x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vfloat16mf4x7_t test_vset_v_f16mf4_f16mf4x7(vfloat16mf4x7_t dest, size_t index, vfloat16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_f16mf4_f16mf4x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vfloat16mf4x8_t test_vset_v_f16mf4_f16mf4x8(vfloat16mf4x8_t dest, size_t index, vfloat16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f16mf2_f16mf2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat16mf2x2_t test_vset_v_f16mf2_f16mf2x2(vfloat16mf2x2_t dest, size_t index, vfloat16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_f16mf2_f16mf2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vfloat16mf2x3_t test_vset_v_f16mf2_f16mf2x3(vfloat16mf2x3_t dest, size_t index, vfloat16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_f16mf2_f16mf2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vfloat16mf2x4_t test_vset_v_f16mf2_f16mf2x4(vfloat16mf2x4_t dest, size_t index, vfloat16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_f16mf2_f16mf2x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vfloat16mf2x5_t test_vset_v_f16mf2_f16mf2x5(vfloat16mf2x5_t dest, size_t index, vfloat16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_f16mf2_f16mf2x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vfloat16mf2x6_t test_vset_v_f16mf2_f16mf2x6(vfloat16mf2x6_t dest, size_t index, vfloat16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_f16mf2_f16mf2x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vfloat16mf2x7_t test_vset_v_f16mf2_f16mf2x7(vfloat16mf2x7_t dest, size_t index, vfloat16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_f16mf2_f16mf2x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vfloat16mf2x8_t test_vset_v_f16mf2_f16mf2x8(vfloat16mf2x8_t dest, size_t index, vfloat16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f16m1_f16m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat16m1x2_t test_vset_v_f16m1_f16m1x2(vfloat16m1x2_t dest, size_t index, vfloat16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_f16m1_f16m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vfloat16m1x3_t test_vset_v_f16m1_f16m1x3(vfloat16m1x3_t dest, size_t index, vfloat16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_f16m1_f16m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vfloat16m1x4_t test_vset_v_f16m1_f16m1x4(vfloat16m1x4_t dest, size_t index, vfloat16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_f16m1_f16m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vfloat16m1x5_t test_vset_v_f16m1_f16m1x5(vfloat16m1x5_t dest, size_t index, vfloat16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_f16m1_f16m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vfloat16m1x6_t test_vset_v_f16m1_f16m1x6(vfloat16m1x6_t dest, size_t index, vfloat16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_f16m1_f16m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vfloat16m1x7_t test_vset_v_f16m1_f16m1x7(vfloat16m1x7_t dest, size_t index, vfloat16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_f16m1_f16m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vfloat16m1x8_t test_vset_v_f16m1_f16m1x8(vfloat16m1x8_t dest, size_t index, vfloat16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f16m2_f16m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat16m2x2_t test_vset_v_f16m2_f16m2x2(vfloat16m2x2_t dest, size_t index, vfloat16m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_f16m2_f16m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vfloat16m2x3_t test_vset_v_f16m2_f16m2x3(vfloat16m2x3_t dest, size_t index, vfloat16m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_f16m2_f16m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vfloat16m2x4_t test_vset_v_f16m2_f16m2x4(vfloat16m2x4_t dest, size_t index, vfloat16m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f16m4_f16m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat16m4x2_t test_vset_v_f16m4_f16m4x2(vfloat16m4x2_t dest, size_t index, vfloat16m4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f32mf2_f32mf2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat32mf2x2_t test_vset_v_f32mf2_f32mf2x2(vfloat32mf2x2_t dest, size_t index, vfloat32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_f32mf2_f32mf2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vfloat32mf2x3_t test_vset_v_f32mf2_f32mf2x3(vfloat32mf2x3_t dest, size_t index, vfloat32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_f32mf2_f32mf2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vfloat32mf2x4_t test_vset_v_f32mf2_f32mf2x4(vfloat32mf2x4_t dest, size_t index, vfloat32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_f32mf2_f32mf2x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vfloat32mf2x5_t test_vset_v_f32mf2_f32mf2x5(vfloat32mf2x5_t dest, size_t index, vfloat32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_f32mf2_f32mf2x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vfloat32mf2x6_t test_vset_v_f32mf2_f32mf2x6(vfloat32mf2x6_t dest, size_t index, vfloat32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_f32mf2_f32mf2x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vfloat32mf2x7_t test_vset_v_f32mf2_f32mf2x7(vfloat32mf2x7_t dest, size_t index, vfloat32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_f32mf2_f32mf2x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vfloat32mf2x8_t test_vset_v_f32mf2_f32mf2x8(vfloat32mf2x8_t dest, size_t index, vfloat32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f32m1_f32m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat32m1x2_t test_vset_v_f32m1_f32m1x2(vfloat32m1x2_t dest, size_t index, vfloat32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_f32m1_f32m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vfloat32m1x3_t test_vset_v_f32m1_f32m1x3(vfloat32m1x3_t dest, size_t index, vfloat32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_f32m1_f32m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vfloat32m1x4_t test_vset_v_f32m1_f32m1x4(vfloat32m1x4_t dest, size_t index, vfloat32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_f32m1_f32m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vfloat32m1x5_t test_vset_v_f32m1_f32m1x5(vfloat32m1x5_t dest, size_t index, vfloat32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_f32m1_f32m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vfloat32m1x6_t test_vset_v_f32m1_f32m1x6(vfloat32m1x6_t dest, size_t index, vfloat32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_f32m1_f32m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vfloat32m1x7_t test_vset_v_f32m1_f32m1x7(vfloat32m1x7_t dest, size_t index, vfloat32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_f32m1_f32m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vfloat32m1x8_t test_vset_v_f32m1_f32m1x8(vfloat32m1x8_t dest, size_t index, vfloat32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f32m2_f32m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat32m2x2_t test_vset_v_f32m2_f32m2x2(vfloat32m2x2_t dest, size_t index, vfloat32m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_f32m2_f32m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vfloat32m2x3_t test_vset_v_f32m2_f32m2x3(vfloat32m2x3_t dest, size_t index, vfloat32m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_f32m2_f32m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vfloat32m2x4_t test_vset_v_f32m2_f32m2x4(vfloat32m2x4_t dest, size_t index, vfloat32m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f32m4_f32m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat32m4x2_t test_vset_v_f32m4_f32m4x2(vfloat32m4x2_t dest, size_t index, vfloat32m4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f64m1_f64m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat64m1x2_t test_vset_v_f64m1_f64m1x2(vfloat64m1x2_t dest, size_t index, vfloat64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_f64m1_f64m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vfloat64m1x3_t test_vset_v_f64m1_f64m1x3(vfloat64m1x3_t dest, size_t index, vfloat64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_f64m1_f64m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vfloat64m1x4_t test_vset_v_f64m1_f64m1x4(vfloat64m1x4_t dest, size_t index, vfloat64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_f64m1_f64m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vfloat64m1x5_t test_vset_v_f64m1_f64m1x5(vfloat64m1x5_t dest, size_t index, vfloat64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_f64m1_f64m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vfloat64m1x6_t test_vset_v_f64m1_f64m1x6(vfloat64m1x6_t dest, size_t index, vfloat64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_f64m1_f64m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vfloat64m1x7_t test_vset_v_f64m1_f64m1x7(vfloat64m1x7_t dest, size_t index, vfloat64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_f64m1_f64m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vfloat64m1x8_t test_vset_v_f64m1_f64m1x8(vfloat64m1x8_t dest, size_t index, vfloat64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f64m2_f64m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat64m2x2_t test_vset_v_f64m2_f64m2x2(vfloat64m2x2_t dest, size_t index, vfloat64m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_f64m2_f64m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vfloat64m2x3_t test_vset_v_f64m2_f64m2x3(vfloat64m2x3_t dest, size_t index, vfloat64m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_f64m2_f64m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vfloat64m2x4_t test_vset_v_f64m2_f64m2x4(vfloat64m2x4_t dest, size_t index, vfloat64m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_f64m4_f64m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vfloat64m4x2_t test_vset_v_f64m4_f64m4x2(vfloat64m4x2_t dest, size_t index, vfloat64m4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i8mf8_i8mf8x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint8mf8x2_t test_vset_v_i8mf8_i8mf8x2(vint8mf8x2_t dest, size_t index, vint8mf8_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i8mf8_i8mf8x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint8mf8x3_t test_vset_v_i8mf8_i8mf8x3(vint8mf8x3_t dest, size_t index, vint8mf8_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i8mf8_i8mf8x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint8mf8x4_t test_vset_v_i8mf8_i8mf8x4(vint8mf8x4_t dest, size_t index, vint8mf8_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i8mf8_i8mf8x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint8mf8x5_t test_vset_v_i8mf8_i8mf8x5(vint8mf8x5_t dest, size_t index, vint8mf8_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i8mf8_i8mf8x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint8mf8x6_t test_vset_v_i8mf8_i8mf8x6(vint8mf8x6_t dest, size_t index, vint8mf8_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i8mf8_i8mf8x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint8mf8x7_t test_vset_v_i8mf8_i8mf8x7(vint8mf8x7_t dest, size_t index, vint8mf8_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i8mf8_i8mf8x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint8mf8x8_t test_vset_v_i8mf8_i8mf8x8(vint8mf8x8_t dest, size_t index, vint8mf8_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i8mf4_i8mf4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint8mf4x2_t test_vset_v_i8mf4_i8mf4x2(vint8mf4x2_t dest, size_t index, vint8mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i8mf4_i8mf4x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint8mf4x3_t test_vset_v_i8mf4_i8mf4x3(vint8mf4x3_t dest, size_t index, vint8mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i8mf4_i8mf4x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint8mf4x4_t test_vset_v_i8mf4_i8mf4x4(vint8mf4x4_t dest, size_t index, vint8mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i8mf4_i8mf4x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint8mf4x5_t test_vset_v_i8mf4_i8mf4x5(vint8mf4x5_t dest, size_t index, vint8mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i8mf4_i8mf4x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint8mf4x6_t test_vset_v_i8mf4_i8mf4x6(vint8mf4x6_t dest, size_t index, vint8mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i8mf4_i8mf4x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint8mf4x7_t test_vset_v_i8mf4_i8mf4x7(vint8mf4x7_t dest, size_t index, vint8mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i8mf4_i8mf4x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint8mf4x8_t test_vset_v_i8mf4_i8mf4x8(vint8mf4x8_t dest, size_t index, vint8mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i8mf2_i8mf2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint8mf2x2_t test_vset_v_i8mf2_i8mf2x2(vint8mf2x2_t dest, size_t index, vint8mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i8mf2_i8mf2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint8mf2x3_t test_vset_v_i8mf2_i8mf2x3(vint8mf2x3_t dest, size_t index, vint8mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i8mf2_i8mf2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint8mf2x4_t test_vset_v_i8mf2_i8mf2x4(vint8mf2x4_t dest, size_t index, vint8mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i8mf2_i8mf2x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint8mf2x5_t test_vset_v_i8mf2_i8mf2x5(vint8mf2x5_t dest, size_t index, vint8mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i8mf2_i8mf2x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint8mf2x6_t test_vset_v_i8mf2_i8mf2x6(vint8mf2x6_t dest, size_t index, vint8mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i8mf2_i8mf2x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint8mf2x7_t test_vset_v_i8mf2_i8mf2x7(vint8mf2x7_t dest, size_t index, vint8mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i8mf2_i8mf2x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint8mf2x8_t test_vset_v_i8mf2_i8mf2x8(vint8mf2x8_t dest, size_t index, vint8mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i8m1_i8m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint8m1x2_t test_vset_v_i8m1_i8m1x2(vint8m1x2_t dest, size_t index, vint8m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i8m1_i8m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint8m1x3_t test_vset_v_i8m1_i8m1x3(vint8m1x3_t dest, size_t index, vint8m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i8m1_i8m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint8m1x4_t test_vset_v_i8m1_i8m1x4(vint8m1x4_t dest, size_t index, vint8m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i8m1_i8m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint8m1x5_t test_vset_v_i8m1_i8m1x5(vint8m1x5_t dest, size_t index, vint8m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i8m1_i8m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint8m1x6_t test_vset_v_i8m1_i8m1x6(vint8m1x6_t dest, size_t index, vint8m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i8m1_i8m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint8m1x7_t test_vset_v_i8m1_i8m1x7(vint8m1x7_t dest, size_t index, vint8m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i8m1_i8m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint8m1x8_t test_vset_v_i8m1_i8m1x8(vint8m1x8_t dest, size_t index, vint8m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i8m2_i8m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint8m2x2_t test_vset_v_i8m2_i8m2x2(vint8m2x2_t dest, size_t index, vint8m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i8m2_i8m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint8m2x3_t test_vset_v_i8m2_i8m2x3(vint8m2x3_t dest, size_t index, vint8m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i8m2_i8m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint8m2x4_t test_vset_v_i8m2_i8m2x4(vint8m2x4_t dest, size_t index, vint8m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i8m4_i8m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint8m4x2_t test_vset_v_i8m4_i8m4x2(vint8m4x2_t dest, size_t index, vint8m4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i16mf4_i16mf4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint16mf4x2_t test_vset_v_i16mf4_i16mf4x2(vint16mf4x2_t dest, size_t index, vint16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i16mf4_i16mf4x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint16mf4x3_t test_vset_v_i16mf4_i16mf4x3(vint16mf4x3_t dest, size_t index, vint16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i16mf4_i16mf4x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint16mf4x4_t test_vset_v_i16mf4_i16mf4x4(vint16mf4x4_t dest, size_t index, vint16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i16mf4_i16mf4x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint16mf4x5_t test_vset_v_i16mf4_i16mf4x5(vint16mf4x5_t dest, size_t index, vint16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i16mf4_i16mf4x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint16mf4x6_t test_vset_v_i16mf4_i16mf4x6(vint16mf4x6_t dest, size_t index, vint16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i16mf4_i16mf4x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint16mf4x7_t test_vset_v_i16mf4_i16mf4x7(vint16mf4x7_t dest, size_t index, vint16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i16mf4_i16mf4x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint16mf4x8_t test_vset_v_i16mf4_i16mf4x8(vint16mf4x8_t dest, size_t index, vint16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i16mf2_i16mf2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint16mf2x2_t test_vset_v_i16mf2_i16mf2x2(vint16mf2x2_t dest, size_t index, vint16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i16mf2_i16mf2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint16mf2x3_t test_vset_v_i16mf2_i16mf2x3(vint16mf2x3_t dest, size_t index, vint16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i16mf2_i16mf2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint16mf2x4_t test_vset_v_i16mf2_i16mf2x4(vint16mf2x4_t dest, size_t index, vint16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i16mf2_i16mf2x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint16mf2x5_t test_vset_v_i16mf2_i16mf2x5(vint16mf2x5_t dest, size_t index, vint16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i16mf2_i16mf2x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint16mf2x6_t test_vset_v_i16mf2_i16mf2x6(vint16mf2x6_t dest, size_t index, vint16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i16mf2_i16mf2x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint16mf2x7_t test_vset_v_i16mf2_i16mf2x7(vint16mf2x7_t dest, size_t index, vint16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i16mf2_i16mf2x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint16mf2x8_t test_vset_v_i16mf2_i16mf2x8(vint16mf2x8_t dest, size_t index, vint16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i16m1_i16m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint16m1x2_t test_vset_v_i16m1_i16m1x2(vint16m1x2_t dest, size_t index, vint16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i16m1_i16m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint16m1x3_t test_vset_v_i16m1_i16m1x3(vint16m1x3_t dest, size_t index, vint16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i16m1_i16m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint16m1x4_t test_vset_v_i16m1_i16m1x4(vint16m1x4_t dest, size_t index, vint16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i16m1_i16m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint16m1x5_t test_vset_v_i16m1_i16m1x5(vint16m1x5_t dest, size_t index, vint16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i16m1_i16m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint16m1x6_t test_vset_v_i16m1_i16m1x6(vint16m1x6_t dest, size_t index, vint16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i16m1_i16m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint16m1x7_t test_vset_v_i16m1_i16m1x7(vint16m1x7_t dest, size_t index, vint16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i16m1_i16m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint16m1x8_t test_vset_v_i16m1_i16m1x8(vint16m1x8_t dest, size_t index, vint16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i16m2_i16m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint16m2x2_t test_vset_v_i16m2_i16m2x2(vint16m2x2_t dest, size_t index, vint16m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i16m2_i16m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint16m2x3_t test_vset_v_i16m2_i16m2x3(vint16m2x3_t dest, size_t index, vint16m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i16m2_i16m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint16m2x4_t test_vset_v_i16m2_i16m2x4(vint16m2x4_t dest, size_t index, vint16m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i16m4_i16m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint16m4x2_t test_vset_v_i16m4_i16m4x2(vint16m4x2_t dest, size_t index, vint16m4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i32mf2_i32mf2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint32mf2x2_t test_vset_v_i32mf2_i32mf2x2(vint32mf2x2_t dest, size_t index, vint32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i32mf2_i32mf2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint32mf2x3_t test_vset_v_i32mf2_i32mf2x3(vint32mf2x3_t dest, size_t index, vint32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i32mf2_i32mf2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint32mf2x4_t test_vset_v_i32mf2_i32mf2x4(vint32mf2x4_t dest, size_t index, vint32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i32mf2_i32mf2x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint32mf2x5_t test_vset_v_i32mf2_i32mf2x5(vint32mf2x5_t dest, size_t index, vint32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i32mf2_i32mf2x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint32mf2x6_t test_vset_v_i32mf2_i32mf2x6(vint32mf2x6_t dest, size_t index, vint32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i32mf2_i32mf2x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint32mf2x7_t test_vset_v_i32mf2_i32mf2x7(vint32mf2x7_t dest, size_t index, vint32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i32mf2_i32mf2x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint32mf2x8_t test_vset_v_i32mf2_i32mf2x8(vint32mf2x8_t dest, size_t index, vint32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i32m1_i32m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint32m1x2_t test_vset_v_i32m1_i32m1x2(vint32m1x2_t dest, size_t index, vint32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i32m1_i32m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint32m1x3_t test_vset_v_i32m1_i32m1x3(vint32m1x3_t dest, size_t index, vint32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i32m1_i32m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint32m1x4_t test_vset_v_i32m1_i32m1x4(vint32m1x4_t dest, size_t index, vint32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i32m1_i32m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint32m1x5_t test_vset_v_i32m1_i32m1x5(vint32m1x5_t dest, size_t index, vint32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i32m1_i32m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint32m1x6_t test_vset_v_i32m1_i32m1x6(vint32m1x6_t dest, size_t index, vint32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i32m1_i32m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint32m1x7_t test_vset_v_i32m1_i32m1x7(vint32m1x7_t dest, size_t index, vint32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i32m1_i32m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint32m1x8_t test_vset_v_i32m1_i32m1x8(vint32m1x8_t dest, size_t index, vint32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i32m2_i32m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint32m2x2_t test_vset_v_i32m2_i32m2x2(vint32m2x2_t dest, size_t index, vint32m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i32m2_i32m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint32m2x3_t test_vset_v_i32m2_i32m2x3(vint32m2x3_t dest, size_t index, vint32m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i32m2_i32m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint32m2x4_t test_vset_v_i32m2_i32m2x4(vint32m2x4_t dest, size_t index, vint32m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i32m4_i32m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint32m4x2_t test_vset_v_i32m4_i32m4x2(vint32m4x2_t dest, size_t index, vint32m4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i64m1_i64m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint64m1x2_t test_vset_v_i64m1_i64m1x2(vint64m1x2_t dest, size_t index, vint64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i64m1_i64m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint64m1x3_t test_vset_v_i64m1_i64m1x3(vint64m1x3_t dest, size_t index, vint64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i64m1_i64m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint64m1x4_t test_vset_v_i64m1_i64m1x4(vint64m1x4_t dest, size_t index, vint64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_i64m1_i64m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vint64m1x5_t test_vset_v_i64m1_i64m1x5(vint64m1x5_t dest, size_t index, vint64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_i64m1_i64m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vint64m1x6_t test_vset_v_i64m1_i64m1x6(vint64m1x6_t dest, size_t index, vint64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_i64m1_i64m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vint64m1x7_t test_vset_v_i64m1_i64m1x7(vint64m1x7_t dest, size_t index, vint64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_i64m1_i64m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vint64m1x8_t test_vset_v_i64m1_i64m1x8(vint64m1x8_t dest, size_t index, vint64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i64m2_i64m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint64m2x2_t test_vset_v_i64m2_i64m2x2(vint64m2x2_t dest, size_t index, vint64m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_i64m2_i64m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vint64m2x3_t test_vset_v_i64m2_i64m2x3(vint64m2x3_t dest, size_t index, vint64m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_i64m2_i64m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vint64m2x4_t test_vset_v_i64m2_i64m2x4(vint64m2x4_t dest, size_t index, vint64m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_i64m4_i64m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vint64m4x2_t test_vset_v_i64m4_i64m4x2(vint64m4x2_t dest, size_t index, vint64m4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u8mf8_u8mf8x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint8mf8x2_t test_vset_v_u8mf8_u8mf8x2(vuint8mf8x2_t dest, size_t index, vuint8mf8_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u8mf8_u8mf8x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint8mf8x3_t test_vset_v_u8mf8_u8mf8x3(vuint8mf8x3_t dest, size_t index, vuint8mf8_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u8mf8_u8mf8x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint8mf8x4_t test_vset_v_u8mf8_u8mf8x4(vuint8mf8x4_t dest, size_t index, vuint8mf8_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u8mf8_u8mf8x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint8mf8x5_t test_vset_v_u8mf8_u8mf8x5(vuint8mf8x5_t dest, size_t index, vuint8mf8_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u8mf8_u8mf8x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint8mf8x6_t test_vset_v_u8mf8_u8mf8x6(vuint8mf8x6_t dest, size_t index, vuint8mf8_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u8mf8_u8mf8x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint8mf8x7_t test_vset_v_u8mf8_u8mf8x7(vuint8mf8x7_t dest, size_t index, vuint8mf8_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u8mf8_u8mf8x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint8mf8x8_t test_vset_v_u8mf8_u8mf8x8(vuint8mf8x8_t dest, size_t index, vuint8mf8_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u8mf4_u8mf4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint8mf4x2_t test_vset_v_u8mf4_u8mf4x2(vuint8mf4x2_t dest, size_t index, vuint8mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u8mf4_u8mf4x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint8mf4x3_t test_vset_v_u8mf4_u8mf4x3(vuint8mf4x3_t dest, size_t index, vuint8mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u8mf4_u8mf4x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint8mf4x4_t test_vset_v_u8mf4_u8mf4x4(vuint8mf4x4_t dest, size_t index, vuint8mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u8mf4_u8mf4x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint8mf4x5_t test_vset_v_u8mf4_u8mf4x5(vuint8mf4x5_t dest, size_t index, vuint8mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u8mf4_u8mf4x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint8mf4x6_t test_vset_v_u8mf4_u8mf4x6(vuint8mf4x6_t dest, size_t index, vuint8mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u8mf4_u8mf4x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint8mf4x7_t test_vset_v_u8mf4_u8mf4x7(vuint8mf4x7_t dest, size_t index, vuint8mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u8mf4_u8mf4x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint8mf4x8_t test_vset_v_u8mf4_u8mf4x8(vuint8mf4x8_t dest, size_t index, vuint8mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u8mf2_u8mf2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint8mf2x2_t test_vset_v_u8mf2_u8mf2x2(vuint8mf2x2_t dest, size_t index, vuint8mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u8mf2_u8mf2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint8mf2x3_t test_vset_v_u8mf2_u8mf2x3(vuint8mf2x3_t dest, size_t index, vuint8mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u8mf2_u8mf2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint8mf2x4_t test_vset_v_u8mf2_u8mf2x4(vuint8mf2x4_t dest, size_t index, vuint8mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u8mf2_u8mf2x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint8mf2x5_t test_vset_v_u8mf2_u8mf2x5(vuint8mf2x5_t dest, size_t index, vuint8mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u8mf2_u8mf2x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint8mf2x6_t test_vset_v_u8mf2_u8mf2x6(vuint8mf2x6_t dest, size_t index, vuint8mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u8mf2_u8mf2x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint8mf2x7_t test_vset_v_u8mf2_u8mf2x7(vuint8mf2x7_t dest, size_t index, vuint8mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u8mf2_u8mf2x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint8mf2x8_t test_vset_v_u8mf2_u8mf2x8(vuint8mf2x8_t dest, size_t index, vuint8mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u8m1_u8m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint8m1x2_t test_vset_v_u8m1_u8m1x2(vuint8m1x2_t dest, size_t index, vuint8m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u8m1_u8m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint8m1x3_t test_vset_v_u8m1_u8m1x3(vuint8m1x3_t dest, size_t index, vuint8m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u8m1_u8m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint8m1x4_t test_vset_v_u8m1_u8m1x4(vuint8m1x4_t dest, size_t index, vuint8m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u8m1_u8m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint8m1x5_t test_vset_v_u8m1_u8m1x5(vuint8m1x5_t dest, size_t index, vuint8m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u8m1_u8m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint8m1x6_t test_vset_v_u8m1_u8m1x6(vuint8m1x6_t dest, size_t index, vuint8m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u8m1_u8m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint8m1x7_t test_vset_v_u8m1_u8m1x7(vuint8m1x7_t dest, size_t index, vuint8m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u8m1_u8m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint8m1x8_t test_vset_v_u8m1_u8m1x8(vuint8m1x8_t dest, size_t index, vuint8m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u8m2_u8m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint8m2x2_t test_vset_v_u8m2_u8m2x2(vuint8m2x2_t dest, size_t index, vuint8m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u8m2_u8m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint8m2x3_t test_vset_v_u8m2_u8m2x3(vuint8m2x3_t dest, size_t index, vuint8m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u8m2_u8m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint8m2x4_t test_vset_v_u8m2_u8m2x4(vuint8m2x4_t dest, size_t index, vuint8m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u8m4_u8m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint8m4x2_t test_vset_v_u8m4_u8m4x2(vuint8m4x2_t dest, size_t index, vuint8m4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u16mf4_u16mf4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint16mf4x2_t test_vset_v_u16mf4_u16mf4x2(vuint16mf4x2_t dest, size_t index, vuint16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u16mf4_u16mf4x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint16mf4x3_t test_vset_v_u16mf4_u16mf4x3(vuint16mf4x3_t dest, size_t index, vuint16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u16mf4_u16mf4x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint16mf4x4_t test_vset_v_u16mf4_u16mf4x4(vuint16mf4x4_t dest, size_t index, vuint16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u16mf4_u16mf4x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint16mf4x5_t test_vset_v_u16mf4_u16mf4x5(vuint16mf4x5_t dest, size_t index, vuint16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u16mf4_u16mf4x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint16mf4x6_t test_vset_v_u16mf4_u16mf4x6(vuint16mf4x6_t dest, size_t index, vuint16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u16mf4_u16mf4x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint16mf4x7_t test_vset_v_u16mf4_u16mf4x7(vuint16mf4x7_t dest, size_t index, vuint16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u16mf4_u16mf4x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint16mf4x8_t test_vset_v_u16mf4_u16mf4x8(vuint16mf4x8_t dest, size_t index, vuint16mf4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u16mf2_u16mf2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint16mf2x2_t test_vset_v_u16mf2_u16mf2x2(vuint16mf2x2_t dest, size_t index, vuint16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u16mf2_u16mf2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint16mf2x3_t test_vset_v_u16mf2_u16mf2x3(vuint16mf2x3_t dest, size_t index, vuint16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u16mf2_u16mf2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint16mf2x4_t test_vset_v_u16mf2_u16mf2x4(vuint16mf2x4_t dest, size_t index, vuint16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u16mf2_u16mf2x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint16mf2x5_t test_vset_v_u16mf2_u16mf2x5(vuint16mf2x5_t dest, size_t index, vuint16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u16mf2_u16mf2x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint16mf2x6_t test_vset_v_u16mf2_u16mf2x6(vuint16mf2x6_t dest, size_t index, vuint16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u16mf2_u16mf2x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint16mf2x7_t test_vset_v_u16mf2_u16mf2x7(vuint16mf2x7_t dest, size_t index, vuint16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u16mf2_u16mf2x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint16mf2x8_t test_vset_v_u16mf2_u16mf2x8(vuint16mf2x8_t dest, size_t index, vuint16mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u16m1_u16m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint16m1x2_t test_vset_v_u16m1_u16m1x2(vuint16m1x2_t dest, size_t index, vuint16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u16m1_u16m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint16m1x3_t test_vset_v_u16m1_u16m1x3(vuint16m1x3_t dest, size_t index, vuint16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u16m1_u16m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint16m1x4_t test_vset_v_u16m1_u16m1x4(vuint16m1x4_t dest, size_t index, vuint16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u16m1_u16m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint16m1x5_t test_vset_v_u16m1_u16m1x5(vuint16m1x5_t dest, size_t index, vuint16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u16m1_u16m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint16m1x6_t test_vset_v_u16m1_u16m1x6(vuint16m1x6_t dest, size_t index, vuint16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u16m1_u16m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint16m1x7_t test_vset_v_u16m1_u16m1x7(vuint16m1x7_t dest, size_t index, vuint16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u16m1_u16m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint16m1x8_t test_vset_v_u16m1_u16m1x8(vuint16m1x8_t dest, size_t index, vuint16m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u16m2_u16m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint16m2x2_t test_vset_v_u16m2_u16m2x2(vuint16m2x2_t dest, size_t index, vuint16m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u16m2_u16m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint16m2x3_t test_vset_v_u16m2_u16m2x3(vuint16m2x3_t dest, size_t index, vuint16m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u16m2_u16m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint16m2x4_t test_vset_v_u16m2_u16m2x4(vuint16m2x4_t dest, size_t index, vuint16m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u16m4_u16m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint16m4x2_t test_vset_v_u16m4_u16m4x2(vuint16m4x2_t dest, size_t index, vuint16m4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u32mf2_u32mf2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint32mf2x2_t test_vset_v_u32mf2_u32mf2x2(vuint32mf2x2_t dest, size_t index, vuint32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u32mf2_u32mf2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint32mf2x3_t test_vset_v_u32mf2_u32mf2x3(vuint32mf2x3_t dest, size_t index, vuint32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u32mf2_u32mf2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint32mf2x4_t test_vset_v_u32mf2_u32mf2x4(vuint32mf2x4_t dest, size_t index, vuint32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u32mf2_u32mf2x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint32mf2x5_t test_vset_v_u32mf2_u32mf2x5(vuint32mf2x5_t dest, size_t index, vuint32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u32mf2_u32mf2x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint32mf2x6_t test_vset_v_u32mf2_u32mf2x6(vuint32mf2x6_t dest, size_t index, vuint32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u32mf2_u32mf2x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint32mf2x7_t test_vset_v_u32mf2_u32mf2x7(vuint32mf2x7_t dest, size_t index, vuint32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u32mf2_u32mf2x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint32mf2x8_t test_vset_v_u32mf2_u32mf2x8(vuint32mf2x8_t dest, size_t index, vuint32mf2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u32m1_u32m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint32m1x2_t test_vset_v_u32m1_u32m1x2(vuint32m1x2_t dest, size_t index, vuint32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u32m1_u32m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint32m1x3_t test_vset_v_u32m1_u32m1x3(vuint32m1x3_t dest, size_t index, vuint32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u32m1_u32m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint32m1x4_t test_vset_v_u32m1_u32m1x4(vuint32m1x4_t dest, size_t index, vuint32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u32m1_u32m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint32m1x5_t test_vset_v_u32m1_u32m1x5(vuint32m1x5_t dest, size_t index, vuint32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u32m1_u32m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint32m1x6_t test_vset_v_u32m1_u32m1x6(vuint32m1x6_t dest, size_t index, vuint32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u32m1_u32m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint32m1x7_t test_vset_v_u32m1_u32m1x7(vuint32m1x7_t dest, size_t index, vuint32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u32m1_u32m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint32m1x8_t test_vset_v_u32m1_u32m1x8(vuint32m1x8_t dest, size_t index, vuint32m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u32m2_u32m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint32m2x2_t test_vset_v_u32m2_u32m2x2(vuint32m2x2_t dest, size_t index, vuint32m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u32m2_u32m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint32m2x3_t test_vset_v_u32m2_u32m2x3(vuint32m2x3_t dest, size_t index, vuint32m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u32m2_u32m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint32m2x4_t test_vset_v_u32m2_u32m2x4(vuint32m2x4_t dest, size_t index, vuint32m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u32m4_u32m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint32m4x2_t test_vset_v_u32m4_u32m4x2(vuint32m4x2_t dest, size_t index, vuint32m4_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u64m1_u64m1x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint64m1x2_t test_vset_v_u64m1_u64m1x2(vuint64m1x2_t dest, size_t index, vuint64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u64m1_u64m1x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint64m1x3_t test_vset_v_u64m1_u64m1x3(vuint64m1x3_t dest, size_t index, vuint64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u64m1_u64m1x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint64m1x4_t test_vset_v_u64m1_u64m1x4(vuint64m1x4_t dest, size_t index, vuint64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , } @test_vset_v_u64m1_u64m1x5 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , } [[TMP4]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , } [[TMP5]] +// +vuint64m1x5_t test_vset_v_u64m1_u64m1x5(vuint64m1x5_t dest, size_t index, vuint64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , } @test_vset_v_u64m1_u64m1x6 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , } [[TMP5]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , } [[TMP6]] +// +vuint64m1x6_t test_vset_v_u64m1_u64m1x6(vuint64m1x6_t dest, size_t index, vuint64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , } @test_vset_v_u64m1_u64m1x7 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , } [[TMP6]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , } [[TMP7]] +// +vuint64m1x7_t test_vset_v_u64m1_u64m1x7(vuint64m1x7_t dest, size_t index, vuint64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , , , , , } @test_vset_v_u64m1_u64m1x8 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], [[DEST_COERCE4:%.*]], [[DEST_COERCE5:%.*]], [[DEST_COERCE6:%.*]], [[DEST_COERCE7:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , , , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , , , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , , , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , , , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , , , , , } [[TMP3]], [[DEST_COERCE4]], 4 +// CHECK-RV64-NEXT: [[TMP5:%.*]] = insertvalue { , , , , , , , } [[TMP4]], [[DEST_COERCE5]], 5 +// CHECK-RV64-NEXT: [[TMP6:%.*]] = insertvalue { , , , , , , , } [[TMP5]], [[DEST_COERCE6]], 6 +// CHECK-RV64-NEXT: [[TMP7:%.*]] = insertvalue { , , , , , , , } [[TMP6]], [[DEST_COERCE7]], 7 +// CHECK-RV64-NEXT: [[TMP8:%.*]] = insertvalue { , , , , , , , } [[TMP7]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , , , , , } [[TMP8]] +// +vuint64m1x8_t test_vset_v_u64m1_u64m1x8(vuint64m1x8_t dest, size_t index, vuint64m1_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u64m2_u64m2x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint64m2x2_t test_vset_v_u64m2_u64m2x2(vuint64m2x2_t dest, size_t index, vuint64m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , } @test_vset_v_u64m2_u64m2x3 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , } [[TMP2]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , } [[TMP3]] +// +vuint64m2x3_t test_vset_v_u64m2_u64m2x3(vuint64m2x3_t dest, size_t index, vuint64m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , , , } @test_vset_v_u64m2_u64m2x4 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], [[DEST_COERCE2:%.*]], [[DEST_COERCE3:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , , , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , , , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , , , } [[TMP1]], [[DEST_COERCE2]], 2 +// CHECK-RV64-NEXT: [[TMP3:%.*]] = insertvalue { , , , } [[TMP2]], [[DEST_COERCE3]], 3 +// CHECK-RV64-NEXT: [[TMP4:%.*]] = insertvalue { , , , } [[TMP3]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , , , } [[TMP4]] +// +vuint64m2x4_t test_vset_v_u64m2_u64m2x4(vuint64m2x4_t dest, size_t index, vuint64m2_t val) { + return __riscv_vset(dest, 0, val); +} + +// CHECK-RV64-LABEL: define dso_local { , } @test_vset_v_u64m4_u64m4x2 +// CHECK-RV64-SAME: ( [[DEST_COERCE0:%.*]], [[DEST_COERCE1:%.*]], i64 noundef [[INDEX:%.*]], [[VAL:%.*]]) #[[ATTR0]] { +// CHECK-RV64-NEXT: entry: +// CHECK-RV64-NEXT: [[TMP0:%.*]] = insertvalue { , } poison, [[DEST_COERCE0]], 0 +// CHECK-RV64-NEXT: [[TMP1:%.*]] = insertvalue { , } [[TMP0]], [[DEST_COERCE1]], 1 +// CHECK-RV64-NEXT: [[TMP2:%.*]] = insertvalue { , } [[TMP1]], [[VAL]], 0 +// CHECK-RV64-NEXT: ret { , } [[TMP2]] +// +vuint64m4x2_t test_vset_v_u64m4_u64m4x2(vuint64m4x2_t dest, size_t index, vuint64m4_t val) { + return __riscv_vset(dest, 0, val); +} + diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c @@ -340,7 +340,7 @@ return __riscv_vset_v_f16m4_f16m8(dest, 2, val); } -vint32m1x2_t test_vset_v_i32m1x2_i32m1(vint32m1x2_t dest, vint32m1_t val) { +vint32m1x2_t test_vset_v_i32m1_i32m1x2(vint32m1x2_t dest, vint32m1_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return __riscv_vset_v_i32m1x2_i32m1(dest, 2, val); + return __riscv_vset_v_i32m1_i32m1x2(dest, 2, val); }