diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -93,6 +93,8 @@
 * Added Assembly Support for the 2022 A-profile extensions FEAT_GCS (Guarded
   Control Stacks), FEAT_CHK (Check Feature Status), and FEAT_ATS1A.
 * Support for preserve_all calling convention is added.
+* Added support for missing arch extensions in the assembly directives
+  ``.arch <level>+<ext>`` and ``.arch_extension``.
 
 Changes to the AMDGPU Backend
 -----------------------------
diff --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
--- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h
+++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
@@ -176,6 +176,8 @@
       1000; // Maximum priority for FMV feature
 };
 
+// NOTE: If adding a new extension here, consider adding it to ExtensionMap
+// in AArch64AsmParser too, if supported as an extension name by binutils.
 // clang-format off
 inline constexpr ExtensionInfo Extensions[] = {
     {"aes", AArch64::AEK_AES, "+aes", "-aes", FEAT_AES, "+fp-armv8,+neon", 150},
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -3677,10 +3677,24 @@
     {"cssc", {AArch64::FeatureCSSC}},
     {"rcpc3", {AArch64::FeatureRCPC3}},
     {"gcs", {AArch64::FeatureGCS}},
-    // FIXME: Unsupported extensions
-    {"lor", {}},
-    {"rdma", {}},
-    {"profile", {}},
+    {"bf16", {AArch64::FeatureBF16}},
+    {"compnum", {AArch64::FeatureComplxNum}},
+    {"dotprod", {AArch64::FeatureDotProd}},
+    {"f32mm", {AArch64::FeatureMatMulFP32}},
+    {"f64mm", {AArch64::FeatureMatMulFP64}},
+    {"fp16", {AArch64::FeatureFullFP16}},
+    {"fp16fml", {AArch64::FeatureFP16FML}},
+    {"i8mm", {AArch64::FeatureMatMulInt8}},
+    {"lor", {AArch64::FeatureLOR}},
+    {"profile", {AArch64::FeatureSPE}},
+    // "rdma" is the name documented by binutils for the feature, but
+    // binutils also accepts incomplete prefixes of features, so "rdm"
+    // works too. Support both spellings here.
+    {"rdm", {AArch64::FeatureRDM}},
+    {"rdma", {AArch64::FeatureRDM}},
+    {"sb", {AArch64::FeatureSB}},
+    {"ssbs", {AArch64::FeatureSSBS}},
+    {"tme", {AArch64::FeatureTME}},
 };
 
 static void setRequiredFeatureString(FeatureBitset FBS, std::string &Str) {
diff --git a/llvm/test/MC/AArch64/directive-arch_extension.s b/llvm/test/MC/AArch64/directive-arch_extension.s
--- a/llvm/test/MC/AArch64/directive-arch_extension.s
+++ b/llvm/test/MC/AArch64/directive-arch_extension.s
@@ -132,3 +132,60 @@
 .arch_extension gcs
 gcspushm x0
 // CHECK: gcspushm x0
+
+.arch_extension bf16
+bfdot v0.2s, v0.4h, v0.4h
+// CHECK: bfdot v0.2s, v0.4h, v0.4h
+
+.arch_extension compnum
+fcmla v1.2d, v2.2d, v3.2d, #0
+// CHECK: fcmla v1.2d, v2.2d, v3.2d, #0
+
+.arch_extension dotprod
+udot v0.4s, v0.16b, v0.16b
+// CHECK: udot v0.4s, v0.16b, v0.16b
+
+.arch_extension f32mm
+fmmla z0.s, z1.s, z2.s
+// CHECK: fmmla z0.s, z1.s, z2.s
+
+.arch_extension f64mm
+fmmla z0.d, z1.d, z2.d
+// CHECK: fmmla z0.d, z1.d, z2.d
+
+.arch_extension fp16
+fadd v0.8h, v0.8h, v0.8h
+// CHECK: fadd v0.8h, v0.8h, v0.8h
+
+.arch_extension fp16fml
+fmlal v0.2s, v1.2h, v2.2h
+// CHECK: fmlal v0.2s, v1.2h, v2.2h
+
+.arch_extension i8mm
+usdot v0.4s, v0.16b, v0.16b
+// CHECK: usdot v0.4s, v0.16b, v0.16b
+
+.arch_extension lor
+stllr x0, [x0]
+// CHECK: stllr x0, [x0]
+
+.arch_extension profile
+msr PMBLIMITR_EL1, x0
+// CHECK: msr PMBLIMITR_EL1, x0
+
+.arch_extension rdm
+.arch_extension rdma
+sqrdmlah v0.8h, v0.8h, v0.8h
+// CHECK: sqrdmlah v0.8h, v0.8h, v0.8h
+
+.arch_extension sb
+sb
+// CHECK: sb
+
+.arch_extension ssbs
+msr SSBS, #1
+// CHECK: msr SSBS, #1
+
+.arch_extension tme
+tstart x0
+// CHECK: tstart x0